diff --git a/embassy-stm32/build.rs b/embassy-stm32/build.rs index 73860c64a..a4ed86bdf 100644 --- a/embassy-stm32/build.rs +++ b/embassy-stm32/build.rs @@ -1599,7 +1599,7 @@ fn main() { for e in rcc_registers.ir.enums { fn is_rcc_name(e: &str) -> bool { match e { - "Pllp" | "Pllq" | "Pllr" | "Pllm" | "Plln" | "Prediv1" | "Prediv2" => true, + "Pllp" | "Pllq" | "Pllr" | "Pllm" | "Plln" | "Prediv1" | "Prediv2" | "Hpre5" => true, "Timpre" | "Pllrclkpre" => false, e if e.ends_with("pre") || e.ends_with("pres") || e.ends_with("div") || e.ends_with("mul") => true, _ => false, diff --git a/embassy-stm32/src/rcc/wba.rs b/embassy-stm32/src/rcc/wba.rs index 0025d2a51..5f9d4d30a 100644 --- a/embassy-stm32/src/rcc/wba.rs +++ b/embassy-stm32/src/rcc/wba.rs @@ -1,6 +1,5 @@ pub use crate::pac::pwr::vals::Vos as VoltageScale; use crate::pac::rcc::regs::Cfgr1; -use core::ops::Div; pub use crate::pac::rcc::vals::{ Hpre as AHBPrescaler, Hsepre as HsePrescaler, Ppre as APBPrescaler, Sw as Sysclk, Pllsrc as PllSource, Plldiv as PllDiv, Pllm as PllPreDiv, Plln as PllMul, Hpre5 as AHB5Prescaler, Hdiv5, @@ -21,23 +20,6 @@ pub const HSI_FREQ: Hertz = Hertz(16_000_000); // HSE speed pub const HSE_FREQ: Hertz = Hertz(32_000_000); -// Allow dividing a Hertz value by an AHB5 prescaler directly -impl Div for Hertz { - type Output = Hertz; - fn div(self, rhs: AHB5Prescaler) -> Hertz { - // Map the prescaler enum to its integer divisor - let divisor = match rhs { - AHB5Prescaler::DIV1 => 1, - AHB5Prescaler::DIV2 => 2, - AHB5Prescaler::DIV3 => 3, - AHB5Prescaler::DIV4 => 4, - AHB5Prescaler::DIV6 => 6, - _ => unreachable!("Invalid AHB5 prescaler: {:?}", rhs), - }; - Hertz(self.0 / divisor) - } -} - #[derive(Clone, Copy, Eq, PartialEq)] pub struct Hse { pub prescaler: HsePrescaler, @@ -95,8 +77,7 @@ pub struct Config { pub apb7_pre: APBPrescaler, // low speed LSI/LSE/RTC - pub lsi: super::LsConfig, - // pub lsi2: super::LsConfig, + pub ls: super::LsConfig, pub voltage_scale: VoltageScale, @@ -116,7 +97,7 @@ impl Config { apb1_pre: APBPrescaler::DIV1, apb2_pre: APBPrescaler::DIV1, apb7_pre: APBPrescaler::DIV1, - lsi: crate::rcc::LsConfig::new(), + ls: crate::rcc::LsConfig::new(), // lsi2: crate::rcc::LsConfig::new(), voltage_scale: VoltageScale::RANGE2, mux: super::mux::ClockMux::default(), @@ -151,7 +132,7 @@ pub(crate) unsafe fn init(config: Config) { crate::pac::PWR.vosr().write(|w| w.set_vos(config.voltage_scale)); while !crate::pac::PWR.vosr().read().vosrdy() {} - let rtc = config.lsi.init(); + let rtc = config.ls.init(); let hsi = config.hsi.then(|| { hsi_enable(); @@ -276,7 +257,7 @@ pub(crate) unsafe fn init(config: Config) { w.set_clksel(usb_refck_sel); }); - let lsi = config.lsi.lsi.then_some(LSI_FREQ); + let lsi = config.ls.lsi.then_some(LSI_FREQ); config.mux.init(); diff --git a/embassy-stm32/src/usb/otg.rs b/embassy-stm32/src/usb/otg.rs index b074cfa1b..81e6bff4c 100644 --- a/embassy-stm32/src/usb/otg.rs +++ b/embassy-stm32/src/usb/otg.rs @@ -336,7 +336,7 @@ impl<'d, T: Instance> Bus<'d, T> { critical_section::with(|_| { crate::pac::RCC.ahb2enr().modify(|w| { w.set_usb_otg_hsen(true); - w.set_otghsphyen(true); + w.set_usb_otg_hs_phyen(true); }); }); } diff --git a/examples/stm32wba/src/bin/pwm.rs b/examples/stm32wba/src/bin/pwm.rs index 54d223d34..611d7c097 100644 --- a/examples/stm32wba/src/bin/pwm.rs +++ b/examples/stm32wba/src/bin/pwm.rs @@ -5,7 +5,7 @@ use defmt::*; use defmt_rtt as _; // global logger use embassy_executor::Spawner; use embassy_stm32::gpio::OutputType; -use embassy_stm32::rcc::{mux, AHB5Prescaler, AHBPrescaler, APBPrescaler, Sysclk, VoltageScale}; +use embassy_stm32::rcc::{AHB5Prescaler, AHBPrescaler, APBPrescaler, Sysclk, VoltageScale}; use embassy_stm32::rcc::{PllDiv, PllMul, PllPreDiv, PllSource}; use embassy_stm32::time::khz; use embassy_stm32::timer::simple_pwm::{PwmPin, SimplePwm}; @@ -39,7 +39,6 @@ async fn main(_spawner: Spawner) { // voltage scale for max performance config.rcc.voltage_scale = VoltageScale::RANGE1; // route PLL1_P into the USB‐OTG‐HS block - config.rcc.mux.otghssel = mux::Otghssel::PLL1_P; config.rcc.sys = Sysclk::PLL1_R; let p = embassy_stm32::init(config);