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https://github.com/embassy-rs/embassy.git
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Refactor Onewire PIO implementation
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Marc
parent
8474e573fb
commit
29bcddaa10
@ -1,11 +1,18 @@
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//! OneWire pio driver
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use crate::pio::{Common, Config, Instance, LoadedProgram, PioPin, ShiftConfig, ShiftDirection, StateMachine};
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use crate::clocks::clk_sys_freq;
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use crate::gpio::Level;
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use crate::pio::{
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Common, Config, Direction, Instance, LoadedProgram, PioPin, ShiftConfig, ShiftDirection, StateMachine,
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};
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use crate::Peri;
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/// This struct represents an onewire driver program
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/// This struct represents a onewire driver program
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pub struct PioOneWireProgram<'a, PIO: Instance> {
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prg: LoadedProgram<'a, PIO>,
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reset_addr: u8,
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next_bit_addr: u8,
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search_addr: u8,
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}
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impl<'a, PIO: Instance> PioOneWireProgram<'a, PIO> {
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@ -13,56 +20,86 @@ impl<'a, PIO: Instance> PioOneWireProgram<'a, PIO> {
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pub fn new(common: &mut Common<'a, PIO>) -> Self {
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let prg = pio::pio_asm!(
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r#"
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.wrap_target
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again:
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pull block
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mov x, osr
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jmp !x, read
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write:
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set pindirs, 1
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set pins, 0
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loop1:
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jmp x--,loop1
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set pindirs, 0 [31]
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wait 1 pin 0 [31]
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pull block
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mov x, osr
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bytes1:
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pull block
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set y, 7
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set pindirs, 1
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bit1:
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set pins, 0 [1]
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out pins,1 [31]
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set pins, 1 [20]
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jmp y--,bit1
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jmp x--,bytes1
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set pindirs, 0 [31]
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jmp again
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read:
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pull block
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mov x, osr
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bytes2:
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set y, 7
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bit2:
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set pindirs, 1
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set pins, 0 [1]
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set pindirs, 0 [5]
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in pins,1 [10]
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jmp y--,bit2
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jmp x--,bytes2
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.wrap
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"#,
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);
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let prg = common.load_program(&prg.program);
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; We need to use the pins direction to simulate open drain output
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; This results in all the side-set values being swapped from the actual pin value
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.side_set 1 pindirs
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Self { prg }
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; Set the origin to 0 so we can correctly use jmp instructions externally
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.origin 0
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; Tick rate is 1 tick per 6us, so all delays should be calculated back to that
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; All the instructions have a calculated delay in [], -1 for the instruction
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; The delay also be 0 which will take 6us for the instruction itself
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.define CLK 6
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; Write the reset block after trigger
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public reset:
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set x, 4 side 0 [(60 / CLK) - 1] ; idle before reset
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reset_inner: ; Repeat the following 5 times, so 5*96us = 480us in total
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nop side 1 [(90 / CLK) - 1]
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jmp x--, reset_inner side 1 [( 6 / CLK) - 1]
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; Fallthrough
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; Check for presence of one or more devices.
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; This samples 32 times with an interval of 12us after a 18us delay.
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; If any bit is zero in the end value, there is a detection
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; This whole function takes 480us
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set x, 31 side 0 [(24 / CLK) - 1] ; Loop 32 times -> 32*12us = 384us
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presence_check:
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in pins, 1 side 0 [( 6 / CLK) - 1] ; poll pin and push to isr
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jmp x--, presence_check side 0 [( 6 / CLK) - 1]
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jmp next_bit side 0 [(72 / CLK) - 1]
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; The low pulse was already done, we only need to delay and poll the bit in case we are reading
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write_1:
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nop side 0 [( 6 / CLK) - 1] ; Delay before sampling the input pin
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in pins, 1 side 0 [(54 / CLK) - 1] ; This writes the state of the pin into the ISR
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; Fallthrough
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; This is the entry point when reading and writing data
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public next_bit:
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.wrap_target
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out x, 1 side 0 [(18 / CLK) - 1] ; Stalls if no data available in TX FIFO and OSR
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jmp x--, write_1 side 1 [(12 / CLK) - 1] ; Do the always low part of a bit, jump to write_1 if we want to write a 1 bit
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in null, 1 side 1 [(60 / CLK) - 1] ; Do the remainder of the low part of a 0 bit
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; This writes 0 into the ISR so that the shift count stays in sync
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.wrap
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public search:
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set x, 1 side 0 [(78 / CLK) - 1] ; Set x to 1 for the inner loop
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search_inner:
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; Read 2 bits
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nop side 1 [(12 / CLK) - 1] ; Do the always low part of a bit
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nop side 0 [( 6 / CLK) - 1] ; Delay before sampling the input pin
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in pins, 1 side 0 [(54 / CLK) - 1] ; This writes the state of the pin into the ISR
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jmp x--, search_inner side 0 [(18 / CLK) - 1]
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; Fallthrough
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; Write output
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out x, 1 side 0 [( 6 / CLK) - 1] ; Stalls if no data available in TX FIFO and OSR
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jmp x--, search side 1 [(12 / CLK) - 1] ; Do the always low part of a bit, jump to search to write a 1 bit
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; Fallthrough
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set x, 1 side 1 [(60 / CLK) - 1] ; Set x to 1 for the inner loop, write the remainder of the low part of a 0 bit
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jmp search_inner side 0 [(18 / CLK) - 1]
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"#
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);
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Self {
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prg: common.load_program(&prg.program),
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reset_addr: prg.public_defines.reset as u8,
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next_bit_addr: prg.public_defines.next_bit as u8,
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search_addr: prg.public_defines.search as u8,
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}
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}
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}
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/// Pio backed OneWire driver
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pub struct PioOneWire<'d, PIO: Instance, const SM: usize> {
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sm: StateMachine<'d, PIO, SM>,
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cfg: Config<'d, PIO>,
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reset_addr: u8,
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search_addr: u8,
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next_bit_addr: u8,
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}
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impl<'d, PIO: Instance, const SM: usize> PioOneWire<'d, PIO, SM> {
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@ -74,37 +111,193 @@ impl<'d, PIO: Instance, const SM: usize> PioOneWire<'d, PIO, SM> {
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program: &PioOneWireProgram<'d, PIO>,
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) -> Self {
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let pin = common.make_pio_pin(pin);
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sm.set_pin_dirs(Direction::In, &[&pin]);
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sm.set_pins(Level::Low, &[&pin]);
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let mut cfg = Config::default();
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cfg.use_program(&program.prg, &[]);
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cfg.set_out_pins(&[&pin]);
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cfg.use_program(&program.prg, &[&pin]);
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cfg.set_in_pins(&[&pin]);
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cfg.set_set_pins(&[&pin]);
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cfg.shift_in = ShiftConfig {
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let byte_shift = ShiftConfig {
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auto_fill: true,
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direction: ShiftDirection::Right,
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threshold: 8,
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};
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cfg.clock_divider = 255_u8.into();
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cfg.shift_in = byte_shift;
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cfg.shift_out = byte_shift;
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let divider = (clk_sys_freq() / 1000000) as u16 * 6;
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cfg.clock_divider = divider.into();
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sm.set_config(&cfg);
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sm.clear_fifos();
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sm.restart();
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unsafe {
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sm.exec_jmp(program.next_bit_addr);
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}
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sm.set_enable(true);
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Self { sm }
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Self {
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sm,
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cfg,
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reset_addr: program.reset_addr,
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search_addr: program.search_addr,
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next_bit_addr: program.next_bit_addr,
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}
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}
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pub async fn reset(&mut self) -> bool {
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// The state machine immediately starts running when jumping to this address
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unsafe {
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self.sm.exec_jmp(self.reset_addr);
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}
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let rx = self.sm.rx();
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let mut found = false;
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for _ in 0..4 {
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if rx.wait_pull().await != 0 {
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found = true;
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}
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}
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found
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}
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/// Write bytes over the wire
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pub async fn write_bytes(&mut self, bytes: &[u8]) {
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self.sm.tx().wait_push(250).await;
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self.sm.tx().wait_push(bytes.len() as u32 - 1).await;
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for b in bytes {
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self.sm.tx().wait_push(*b as u32).await;
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pub async fn write_bytes(&mut self, data: &[u8]) {
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let (rx, tx) = self.sm.rx_tx();
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for b in data {
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tx.wait_push(*b as u32).await;
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// Empty the buffer that is always filled
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let _ = rx.wait_pull().await;
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}
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}
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/// Read bytes from the wire
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pub async fn read_bytes(&mut self, bytes: &mut [u8]) {
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self.sm.tx().wait_push(0).await;
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self.sm.tx().wait_push(bytes.len() as u32 - 1).await;
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for b in bytes.iter_mut() {
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*b = (self.sm.rx().wait_pull().await >> 24) as u8;
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pub async fn read_bytes(&mut self, data: &mut [u8]) {
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let (rx, tx) = self.sm.rx_tx();
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for b in data {
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// Write all 1's so that we can read what the device responds
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tx.wait_push(0xff).await;
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*b = (rx.wait_pull().await >> 24) as u8;
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}
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}
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async fn search(&mut self, state: &mut PioOneWireSearch) -> Option<u64> {
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let _ = self.reset().await;
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self.write_bytes(&[0xF0]).await;
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let shift_cfg = self.prepare_search();
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let (rx, tx) = self.sm.rx_tx();
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let mut value = 0u64;
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let mut last_zero = 0;
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for bit in 0..64 {
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let push = match rx.wait_pull().await {
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0b00 => {
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let write_value = if bit < state.last_discrepancy {
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(state.last_rom & (1 << bit)) != 0
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} else {
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bit == state.last_discrepancy
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};
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if write_value {
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1
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} else {
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last_zero = bit;
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0
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}
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}
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0b01 => 0,
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0b10 => 1,
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_ => {
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self.restore_after_search(&shift_cfg);
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state.finished = true;
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return None;
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}
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};
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value >>= 1;
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if push == 1 {
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value |= 1 << 63;
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}
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tx.wait_push(push).await;
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}
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self.restore_after_search(&shift_cfg);
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state.last_discrepancy = last_zero;
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state.finished = last_zero == 0;
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state.last_rom = value;
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Some(value)
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}
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fn prepare_search(&mut self) -> ShiftConfig {
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let shift_cfg = self.cfg.shift_in;
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self.cfg.shift_in = ShiftConfig {
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auto_fill: true,
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direction: ShiftDirection::Left,
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threshold: 2,
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};
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self.cfg.shift_out = ShiftConfig {
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auto_fill: true,
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direction: ShiftDirection::Right,
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threshold: 1,
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};
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self.sm.set_enable(false);
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self.sm.set_config(&self.cfg);
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unsafe {
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self.sm.exec_jmp(self.search_addr);
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}
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self.sm.set_enable(true);
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shift_cfg
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}
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fn restore_after_search(&mut self, cfg: &ShiftConfig) {
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self.cfg.shift_in = *cfg;
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self.cfg.shift_out = *cfg;
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self.sm.set_enable(false);
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self.sm.set_config(&self.cfg);
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unsafe {
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self.sm.exec_jmp(self.next_bit_addr);
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}
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self.sm.clear_fifos();
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self.sm.restart();
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self.sm.set_enable(true);
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}
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}
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pub struct PioOneWireSearch {
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last_rom: u64,
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last_discrepancy: u8,
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finished: bool,
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}
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impl PioOneWireSearch {
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pub fn new() -> Self {
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Self {
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last_rom: 0,
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last_discrepancy: 0,
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finished: false,
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}
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}
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pub async fn next<PIO: Instance, const SM: usize>(&mut self, pio: &mut PioOneWire<'_, PIO, SM>) -> Option<u64> {
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if self.finished {
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None
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} else {
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pio.search(self).await
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}
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}
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pub fn is_finished(&self) -> bool {
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self.finished
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}
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}
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