Merge pull request #3857 from swork/swork-add-pio-functions

Add PIO functions.
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Dario Nieuwenhuis 2025-02-07 20:28:07 +01:00 committed by GitHub
commit 3b734a7d08
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@ -651,7 +651,7 @@ impl<'d, PIO: Instance> Config<'d, PIO> {
/// of the program. The state machine is not started.
///
/// `side_set` sets the range of pins affected by side-sets. The range must be consecutive.
/// Side-set pins must configured as outputs using [`StateMachine::set_pin_dirs`] to be
/// Sideset pins must configured as outputs using [`StateMachine::set_pin_dirs`] to be
/// effective.
pub fn use_program(&mut self, prog: &LoadedProgram<'d, PIO>, side_set: &[&Pin<'d, PIO>]) {
assert!((prog.side_set.bits() - prog.side_set.optional() as u8) as usize == side_set.len());
@ -816,6 +816,51 @@ impl<'d, PIO: Instance + 'd, const SM: usize> StateMachine<'d, PIO, SM> {
}
}
/// Read current instruction address for this state machine
pub fn get_addr(&self) -> u8 {
let addr = Self::this_sm().addr();
addr.read().addr()
}
/// Read TX FIFO threshold for this state machine.
pub fn get_tx_threshold(&self) -> u8 {
let shiftctrl = Self::this_sm().shiftctrl();
shiftctrl.read().pull_thresh()
}
/// Set/change the TX FIFO threshold for this state machine.
pub fn set_tx_threshold(&mut self, threshold: u8) {
assert!(threshold <= 31);
let shiftctrl = Self::this_sm().shiftctrl();
shiftctrl.modify(|w| {
w.set_pull_thresh(threshold);
});
}
/// Read TX FIFO threshold for this state machine.
pub fn get_rx_threshold(&self) -> u8 {
Self::this_sm().shiftctrl().read().push_thresh()
}
/// Set/change the RX FIFO threshold for this state machine.
pub fn set_rx_threshold(&mut self, threshold: u8) {
assert!(threshold <= 31);
let shiftctrl = Self::this_sm().shiftctrl();
shiftctrl.modify(|w| {
w.set_push_thresh(threshold);
});
}
/// Set/change both TX and RX FIFO thresholds for this state machine.
pub fn set_thresholds(&mut self, threshold: u8) {
assert!(threshold <= 31);
let shiftctrl = Self::this_sm().shiftctrl();
shiftctrl.modify(|w| {
w.set_push_thresh(threshold);
w.set_pull_thresh(threshold);
});
}
/// Set the clock divider for this state machine.
pub fn set_clock_divider(&mut self, clock_divider: FixedU32<U8>) {
let sm = Self::this_sm();