diff --git a/embassy-stm32/src/dma/gpdma/mod.rs b/embassy-stm32/src/dma/gpdma/mod.rs index e906c7559..a158d30b8 100644 --- a/embassy-stm32/src/dma/gpdma/mod.rs +++ b/embassy-stm32/src/dma/gpdma/mod.rs @@ -178,15 +178,15 @@ impl AnyChannel { if sr.tcf() { ch.fcr().write(|w| w.set_tcf(true)); - let lli_count = state.lli_state.count.load(Ordering::Relaxed); + let lli_count = state.lli_state.count.load(Ordering::Acquire); let complete = if lli_count > 0 { - let next_lli_index = state.lli_state.index.load(Ordering::Relaxed) + 1; + let next_lli_index = state.lli_state.index.load(Ordering::Acquire) + 1; let complete = next_lli_index >= lli_count; state .lli_state .index - .store(if complete { 0 } else { next_lli_index }, Ordering::Relaxed); + .store(if complete { 0 } else { next_lli_index }, Ordering::Release); complete } else { diff --git a/embassy-stm32/src/dma/gpdma/ringbuffered.rs b/embassy-stm32/src/dma/gpdma/ringbuffered.rs index c49c6c73d..20f46b103 100644 --- a/embassy-stm32/src/dma/gpdma/ringbuffered.rs +++ b/embassy-stm32/src/dma/gpdma/ringbuffered.rs @@ -20,11 +20,11 @@ impl<'a> DmaCtrl for DmaCtrlImpl<'a> { let state = &STATE[self.0.id as usize]; let current_remaining = self.0.get_remaining_transfers() as usize; - let lli_count = state.lli_state.count.load(Ordering::Relaxed); + let lli_count = state.lli_state.count.load(Ordering::Acquire); if lli_count > 0 { - let lli_index = state.lli_state.index.load(Ordering::Relaxed); - let single_transfer_count = state.lli_state.transfer_count.load(Ordering::Relaxed) / lli_count; + let lli_index = state.lli_state.index.load(Ordering::Acquire); + let single_transfer_count = state.lli_state.transfer_count.load(Ordering::Acquire) / lli_count; (lli_count - lli_index - 1) * single_transfer_count + current_remaining } else {