From 876ad001128823e8069625c6ad7428c0fdabf7a8 Mon Sep 17 00:00:00 2001 From: obe1line Date: Mon, 21 Jul 2025 12:52:23 +1000 Subject: [PATCH 01/10] Update Cargo.toml Added STMC071 and other missing C0 chips --- embassy-stm32/Cargo.toml | 41 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 1a73d84b6..248639385 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -237,6 +237,47 @@ stm32c031g4 = [ "stm32-metapac/stm32c031g4" ] stm32c031g6 = [ "stm32-metapac/stm32c031g6" ] stm32c031k4 = [ "stm32-metapac/stm32c031k4" ] stm32c031k6 = [ "stm32-metapac/stm32c031k6" ] +stm32c051c6 = [ "stm32-metapac/stm32c051c6" ] +stm32c051c8 = [ "stm32-metapac/stm32c051c8" ] +stm32c051d8 = [ "stm32-metapac/stm32c051d8" ] +stm32c051f6 = [ "stm32-metapac/stm32c051f6" ] +stm32c051f8 = [ "stm32-metapac/stm32c051f8" ] +stm32c051g6 = [ "stm32-metapac/stm32c051g6" ] +stm32c051g8 = [ "stm32-metapac/stm32c051g8" ] +stm32c051k6 = [ "stm32-metapac/stm32c051k6" ] +stm32c051k8 = [ "stm32-metapac/stm32c051k8" ] +stm32c071c8 = [ "stm32-metapac/stm32c071c8" ] +stm32c071cb = [ "stm32-metapac/stm32c071cb" ] +stm32c071f8 = [ "stm32-metapac/stm32c071f8" ] +stm32c071fb = [ "stm32-metapac/stm32c071fb" ] +stm32c071g8 = [ "stm32-metapac/stm32c071g8" ] +stm32c071gb = [ "stm32-metapac/stm32c071gb" ] +stm32c071k8 = [ "stm32-metapac/stm32c071k8" ] +stm32c071kb = [ "stm32-metapac/stm32c071kb" ] +stm32c071r8 = [ "stm32-metapac/stm32c071r8" ] +stm32c071rb = [ "stm32-metapac/stm32c071rb" ] +stm32c091cb = [ "stm32-metapac/stm32c091cb" ] +stm32c091cc = [ "stm32-metapac/stm32c091cc" ] +stm32c091ec = [ "stm32-metapac/stm32c091ec" ] +stm32c091fb = [ "stm32-metapac/stm32c091fb" ] +stm32c091fc = [ "stm32-metapac/stm32c091fc" ] +stm32c091gb = [ "stm32-metapac/stm32c091gb" ] +stm32c091gc = [ "stm32-metapac/stm32c091gc" ] +stm32c091kb = [ "stm32-metapac/stm32c091kb" ] +stm32c091kc = [ "stm32-metapac/stm32c091kc" ] +stm32c091rb = [ "stm32-metapac/stm32c091rb" ] +stm32c091rc = [ "stm32-metapac/stm32c091rc" ] +stm32c092cb = [ "stm32-metapac/stm32c092cb" ] +stm32c092cc = [ "stm32-metapac/stm32c092cc" ] +stm32c092ec = [ "stm32-metapac/stm32c092ec" ] +stm32c092fb = [ "stm32-metapac/stm32c092fb" ] +stm32c092fc = [ "stm32-metapac/stm32c092fc" ] +stm32c092gb = [ "stm32-metapac/stm32c092gb" ] +stm32c092gc = [ "stm32-metapac/stm32c092gc" ] +stm32c092kb = [ "stm32-metapac/stm32c092kb" ] +stm32c092kc = [ "stm32-metapac/stm32c092kc" ] +stm32c092rb = [ "stm32-metapac/stm32c092rb" ] +stm32c092rc = [ "stm32-metapac/stm32c092rc" ] stm32f030c6 = [ "stm32-metapac/stm32f030c6" ] stm32f030c8 = [ "stm32-metapac/stm32f030c8" ] stm32f030cc = [ "stm32-metapac/stm32f030cc" ] From 87f469792a5e41cb415ce51dd6fa85908248b478 Mon Sep 17 00:00:00 2001 From: obe1line Date: Mon, 21 Jul 2025 13:37:48 +1000 Subject: [PATCH 02/10] Added rcc_c0v2 to fix undefined McoSource with STM32C071 --- embassy-stm32/src/rcc/mco.rs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/embassy-stm32/src/rcc/mco.rs b/embassy-stm32/src/rcc/mco.rs index 0371b9141..96e628b1a 100644 --- a/embassy-stm32/src/rcc/mco.rs +++ b/embassy-stm32/src/rcc/mco.rs @@ -74,7 +74,7 @@ macro_rules! impl_peri { }; } -#[cfg(any(rcc_c0, rcc_g0x0, rcc_g0x1, rcc_u0))] +#[cfg(any(rcc_c0, rcc_c0v2, rcc_g0x0, rcc_g0x1, rcc_u0))] #[allow(unused_imports)] use self::{McoSource as Mco1Source, McoSource as Mco2Source}; From 6bfdbf0ed827da7ab447359f97799cc1b707fde9 Mon Sep 17 00:00:00 2001 From: obe1line Date: Mon, 21 Jul 2025 14:27:05 +1000 Subject: [PATCH 03/10] Added stm32fc071 to cfg to force RCC.cr to be used --- embassy-stm32/src/rcc/hsi48.rs | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/rcc/hsi48.rs b/embassy-stm32/src/rcc/hsi48.rs index 3ea5c96c9..49be4af5e 100644 --- a/embassy-stm32/src/rcc/hsi48.rs +++ b/embassy-stm32/src/rcc/hsi48.rs @@ -39,9 +39,9 @@ pub(crate) fn init_hsi48(config: Hsi48Config) -> Hertz { }); // Enable HSI48 - #[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32f0)))] + #[cfg(not(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32f0, stm32c071)))] let r = RCC.crrcr(); - #[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba))] + #[cfg(any(stm32u5, stm32g0, stm32h5, stm32h7, stm32h7rs, stm32u5, stm32wba, stm32c071))] let r = RCC.cr(); #[cfg(any(stm32f0))] let r = RCC.cr2(); From ac996e7e0a08f0a8914c76e4ee040e75a4b2b19b Mon Sep 17 00:00:00 2001 From: obe1line Date: Mon, 21 Jul 2025 14:31:48 +1000 Subject: [PATCH 04/10] Added ccipr1 conditional for STM32C071 --- embassy-stm32/src/rcc/c0.rs | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/rcc/c0.rs b/embassy-stm32/src/rcc/c0.rs index cac2a9149..5a584d993 100644 --- a/embassy-stm32/src/rcc/c0.rs +++ b/embassy-stm32/src/rcc/c0.rs @@ -192,8 +192,12 @@ pub(crate) unsafe fn init(config: Config) { lse: None, ); - RCC.ccipr() - .modify(|w| w.set_adc1sel(stm32_metapac::rcc::vals::Adcsel::SYS)); + #[cfg(not(any(stm32c071)))] + let r = RCC.ccipr(); + #[cfg(any(stm32c071))] + let r = RCC.ccipr1(); + + r.modify(|w| w.set_adc1sel(stm32_metapac::rcc::vals::Adcsel::SYS)); } mod max { From 26232778e69bdfddcd1df0747b7414ef936e3ea2 Mon Sep 17 00:00:00 2001 From: obe1line Date: Mon, 21 Jul 2025 14:39:07 +1000 Subject: [PATCH 05/10] hsi48 field missing for STM32C071 --- embassy-stm32/src/rcc/c0.rs | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/rcc/c0.rs b/embassy-stm32/src/rcc/c0.rs index 5a584d993..d44914719 100644 --- a/embassy-stm32/src/rcc/c0.rs +++ b/embassy-stm32/src/rcc/c0.rs @@ -186,7 +186,10 @@ pub(crate) unsafe fn init(config: Config) { hsiker: hsiker, hse: hse, rtc: rtc, - + + #[cfg(any(stm32c071))] + hsi48: hsi, + // TODO lsi: None, lse: None, From e64c23076d2c003efe60419eab6b86630d7886b4 Mon Sep 17 00:00:00 2001 From: Chris Storah Date: Wed, 23 Jul 2025 12:38:58 +1000 Subject: [PATCH 06/10] Updated version of stm32-data and added c071 and c051 into ci.sh --- ci.sh | 3 +++ embassy-stm32/Cargo.toml | 4 ++-- embassy-stm32/src/rcc/c0.rs | 11 ++--------- tests/stm32/Cargo.toml | 1 + tests/stm32/build.rs | 1 + tests/stm32/src/common.rs | 10 +++++++++- 6 files changed, 18 insertions(+), 12 deletions(-) diff --git a/ci.sh b/ci.sh index 229ddaae8..b2277a6d7 100755 --- a/ci.sh +++ b/ci.sh @@ -102,6 +102,8 @@ cargo batch \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,dual-bank,defmt,exti \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,dual-bank,defmt \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv8m.main-none-eabihf --features stm32l552ze,single-bank,defmt \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c071rb,defmt,exti,time-driver-any,time \ + --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c051f6,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32f038f6,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32f030c6,defmt,exti,time-driver-any,time \ --- build --release --manifest-path embassy-stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32f058t8,defmt,exti,time-driver-any,time \ @@ -299,6 +301,7 @@ cargo batch \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32g491re --artifact-dir out/tests/stm32g491re \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32g071rb --artifact-dir out/tests/stm32g071rb \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c031c6 --artifact-dir out/tests/stm32c031c6 \ + --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv6m-none-eabi --features stm32c071rb --artifact-dir out/tests/stm32c071rb \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h755zi --artifact-dir out/tests/stm32h755zi \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h753zi --artifact-dir out/tests/stm32h753zi \ --- build --release --manifest-path tests/stm32/Cargo.toml --target thumbv7em-none-eabi --features stm32h7a3zi --artifact-dir out/tests/stm32h7a3zi \ diff --git a/embassy-stm32/Cargo.toml b/embassy-stm32/Cargo.toml index 248639385..8f3a471af 100644 --- a/embassy-stm32/Cargo.toml +++ b/embassy-stm32/Cargo.toml @@ -81,7 +81,7 @@ futures-util = { version = "0.3.30", default-features = false } sdio-host = "0.9.0" critical-section = "1.1" #stm32-metapac = { version = "16" } -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-dded8a33a460ae0eb182aee3ccb048beb659982b" } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9fc86ca7b3a8bc05182bf1ce3045602df1f5dce3" } vcell = "0.1.3" nb = "1.0.0" @@ -110,7 +110,7 @@ proc-macro2 = "1.0.36" quote = "1.0.15" #stm32-metapac = { version = "16", default-features = false, features = ["metadata"]} -stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-dded8a33a460ae0eb182aee3ccb048beb659982b", default-features = false, features = ["metadata"] } +stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-9fc86ca7b3a8bc05182bf1ce3045602df1f5dce3", default-features = false, features = ["metadata"] } [features] default = ["rt"] diff --git a/embassy-stm32/src/rcc/c0.rs b/embassy-stm32/src/rcc/c0.rs index d44914719..b9773d1af 100644 --- a/embassy-stm32/src/rcc/c0.rs +++ b/embassy-stm32/src/rcc/c0.rs @@ -187,20 +187,13 @@ pub(crate) unsafe fn init(config: Config) { hse: hse, rtc: rtc, - #[cfg(any(stm32c071))] - hsi48: hsi, - // TODO lsi: None, lse: None, + hsi48: None, ); - #[cfg(not(any(stm32c071)))] - let r = RCC.ccipr(); - #[cfg(any(stm32c071))] - let r = RCC.ccipr1(); - - r.modify(|w| w.set_adc1sel(stm32_metapac::rcc::vals::Adcsel::SYS)); + RCC.ccipr().modify(|w| w.set_adc1sel(stm32_metapac::rcc::vals::Adcsel::SYS)); } mod max { diff --git a/tests/stm32/Cargo.toml b/tests/stm32/Cargo.toml index 8d10f6593..7c32c0ce1 100644 --- a/tests/stm32/Cargo.toml +++ b/tests/stm32/Cargo.toml @@ -7,6 +7,7 @@ autobins = false [features] stm32c031c6 = ["embassy-stm32/stm32c031c6", "cm0", "not-gpdma"] +stm32c071rb = ["embassy-stm32/stm32c071rb", "cm0", "not-gpdma"] stm32f103c8 = ["embassy-stm32/stm32f103c8", "spi-v1", "not-gpdma"] stm32f207zg = ["embassy-stm32/stm32f207zg", "spi-v1", "chrono", "not-gpdma", "eth", "rng"] stm32f303ze = ["embassy-stm32/stm32f303ze", "chrono", "not-gpdma"] diff --git a/tests/stm32/build.rs b/tests/stm32/build.rs index 722671bf1..556d77a20 100644 --- a/tests/stm32/build.rs +++ b/tests/stm32/build.rs @@ -12,6 +12,7 @@ fn main() -> Result<(), Box> { // too little RAM to run from RAM. feature = "stm32f103c8", // 20 kb feature = "stm32c031c6", // 6 kb + feature = "stm32c071rb", // 24 kb feature = "stm32l073rz", // 20 kb feature = "stm32h503rb", // 32 kb // no VTOR, so interrupts can't work when running from RAM diff --git a/tests/stm32/src/common.rs b/tests/stm32/src/common.rs index 829f2cff0..a4d8048ce 100644 --- a/tests/stm32/src/common.rs +++ b/tests/stm32/src/common.rs @@ -34,6 +34,8 @@ teleprobe_meta::target!(b"nucleo-stm32u5a5zj"); teleprobe_meta::target!(b"nucleo-stm32h563zi"); #[cfg(feature = "stm32c031c6")] teleprobe_meta::target!(b"nucleo-stm32c031c6"); +#[cfg(feature = "stm32c071rb")] +teleprobe_meta::target!(b"nucleo-stm32c071rb"); #[cfg(feature = "stm32l073rz")] teleprobe_meta::target!(b"nucleo-stm32l073rz"); #[cfg(feature = "stm32l152re")] @@ -186,6 +188,12 @@ define_peris!( SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, ); +#[cfg(feature = "stm32c071rb")] +define_peris!( + UART = USART1, UART_TX = PB6, UART_RX = PB7, UART_TX_DMA = DMA1_CH1, UART_RX_DMA = DMA1_CH2, + SPI = SPI1, SPI_SCK = PA5, SPI_MOSI = PA7, SPI_MISO = PA6, SPI_TX_DMA = DMA1_CH1, SPI_RX_DMA = DMA1_CH2, + @irq UART = {USART1 => embassy_stm32::usart::InterruptHandler;}, +); #[cfg(feature = "stm32l496zg")] define_peris!( UART = USART3, UART_TX = PD8, UART_RX = PD9, UART_TX_DMA = DMA1_CH2, UART_RX_DMA = DMA1_CH3, @@ -271,7 +279,7 @@ pub fn config() -> Config { #[allow(unused_mut)] let mut config = Config::default(); - #[cfg(feature = "stm32c031c6")] + #[cfg(any(feature = "stm32c031c6", feature = "stm32c071rb"))] { config.rcc.hsi = Some(Hsi { sys_div: HsiSysDiv::DIV1, // 48Mhz From bb29fdd3e2b864325bbdea53810843cc2447d3c3 Mon Sep 17 00:00:00 2001 From: Chris Storah Date: Wed, 23 Jul 2025 12:50:01 +1000 Subject: [PATCH 07/10] Formatting update to resolve rustfmt error --- embassy-stm32/src/rcc/c0.rs | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/embassy-stm32/src/rcc/c0.rs b/embassy-stm32/src/rcc/c0.rs index b9773d1af..763f1b19c 100644 --- a/embassy-stm32/src/rcc/c0.rs +++ b/embassy-stm32/src/rcc/c0.rs @@ -186,14 +186,15 @@ pub(crate) unsafe fn init(config: Config) { hsiker: hsiker, hse: hse, rtc: rtc, - + // TODO lsi: None, lse: None, hsi48: None, ); - RCC.ccipr().modify(|w| w.set_adc1sel(stm32_metapac::rcc::vals::Adcsel::SYS)); + RCC.ccipr() + .modify(|w| w.set_adc1sel(stm32_metapac::rcc::vals::Adcsel::SYS)); } mod max { From 487b42f62cd11292d421831a8943de01b2b25a39 Mon Sep 17 00:00:00 2001 From: Chris Storah Date: Wed, 23 Jul 2025 15:52:36 +1000 Subject: [PATCH 08/10] Added missing guard for hsi48. Updated use of removed enums from stm32-data u5 chip --- embassy-stm32/src/flash/u5.rs | 22 +++++++++++----------- embassy-stm32/src/rcc/c0.rs | 1 + 2 files changed, 12 insertions(+), 11 deletions(-) diff --git a/embassy-stm32/src/flash/u5.rs b/embassy-stm32/src/flash/u5.rs index 131caa195..2d06fdc67 100644 --- a/embassy-stm32/src/flash/u5.rs +++ b/embassy-stm32/src/flash/u5.rs @@ -30,19 +30,19 @@ pub(crate) unsafe fn enable_blocking_write() { #[cfg(feature = "trustzone-secure")] pac::FLASH.seccr().write(|w| { - w.set_pg(pac::flash::vals::SeccrPg::B_0X1); + w.set_pg(true); }); #[cfg(not(feature = "trustzone-secure"))] pac::FLASH.nscr().write(|w| { - w.set_pg(pac::flash::vals::NscrPg::B_0X1); + w.set_pg(true); }); } pub(crate) unsafe fn disable_blocking_write() { #[cfg(feature = "trustzone-secure")] - pac::FLASH.seccr().write(|w| w.set_pg(pac::flash::vals::SeccrPg::B_0X0)); + pac::FLASH.seccr().write(|w| w.set_pg(false)); #[cfg(not(feature = "trustzone-secure"))] - pac::FLASH.nscr().write(|w| w.set_pg(pac::flash::vals::NscrPg::B_0X0)); + pac::FLASH.nscr().write(|w| w.set_pg(false)); } pub(crate) unsafe fn blocking_write(start_address: u32, buf: &[u8; WRITE_SIZE]) -> Result<(), Error> { @@ -65,19 +65,19 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E w.set_pnb(sector.index_in_bank); // TODO: add check for bank swap w.set_bker(match sector.bank { - FlashBank::Bank1 => pac::flash::vals::SeccrBker::B_0X0, - FlashBank::Bank2 => pac::flash::vals::SeccrBker::B_0X1, + FlashBank::Bank1 => false, + FlashBank::Bank2 => true, _ => unreachable!(), }); }); #[cfg(not(feature = "trustzone-secure"))] pac::FLASH.nscr().modify(|w| { - w.set_per(pac::flash::vals::NscrPer::B_0X1); + w.set_per(true); w.set_pnb(sector.index_in_bank); // TODO: add check for bank swap w.set_bker(match sector.bank { - FlashBank::Bank1 => pac::flash::vals::NscrBker::B_0X0, - FlashBank::Bank2 => pac::flash::vals::NscrBker::B_0X1, + FlashBank::Bank1 => false, + FlashBank::Bank2 => true, _ => unreachable!(), }); }); @@ -95,11 +95,11 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E #[cfg(feature = "trustzone-secure")] pac::FLASH .seccr() - .modify(|w| w.set_per(pac::flash::vals::SeccrPer::B_0X0)); + .modify(|w| w.set_per(false)); #[cfg(not(feature = "trustzone-secure"))] pac::FLASH .nscr() - .modify(|w| w.set_per(pac::flash::vals::NscrPer::B_0X0)); + .modify(|w| w.set_per(false)); clear_all_err(); ret } diff --git a/embassy-stm32/src/rcc/c0.rs b/embassy-stm32/src/rcc/c0.rs index 763f1b19c..c2295bab6 100644 --- a/embassy-stm32/src/rcc/c0.rs +++ b/embassy-stm32/src/rcc/c0.rs @@ -190,6 +190,7 @@ pub(crate) unsafe fn init(config: Config) { // TODO lsi: None, lse: None, + #[cfg(crs)] hsi48: None, ); From 420cbb437fb37a0679859a459ed3b45239b60467 Mon Sep 17 00:00:00 2001 From: Chris Storah Date: Wed, 23 Jul 2025 15:55:14 +1000 Subject: [PATCH 09/10] Fix formatting of u5 file --- embassy-stm32/src/flash/u5.rs | 8 ++------ 1 file changed, 2 insertions(+), 6 deletions(-) diff --git a/embassy-stm32/src/flash/u5.rs b/embassy-stm32/src/flash/u5.rs index 2d06fdc67..6c3d4b422 100644 --- a/embassy-stm32/src/flash/u5.rs +++ b/embassy-stm32/src/flash/u5.rs @@ -93,13 +93,9 @@ pub(crate) unsafe fn blocking_erase_sector(sector: &FlashSector) -> Result<(), E let ret: Result<(), Error> = blocking_wait_ready(); #[cfg(feature = "trustzone-secure")] - pac::FLASH - .seccr() - .modify(|w| w.set_per(false)); + pac::FLASH.seccr().modify(|w| w.set_per(false)); #[cfg(not(feature = "trustzone-secure"))] - pac::FLASH - .nscr() - .modify(|w| w.set_per(false)); + pac::FLASH.nscr().modify(|w| w.set_per(false)); clear_all_err(); ret } From e9211682a1a7067ae3a1fac36f94d981aab44912 Mon Sep 17 00:00:00 2001 From: Dario Nieuwenhuis Date: Wed, 23 Jul 2025 12:23:51 +0200 Subject: [PATCH 10/10] stm32: do not run stm32c071rb tests. --- ci.sh | 3 +++ 1 file changed, 3 insertions(+) diff --git a/ci.sh b/ci.sh index 6be6e98e4..94f70aae8 100755 --- a/ci.sh +++ b/ci.sh @@ -385,6 +385,9 @@ rm out/tests/pimoroni-pico-plus-2/pwm rm out/tests/rpi-pico/pwm rm out/tests/rpi-pico/cyw43-perf +# tests are implemented but the HIL test farm doesn't actually have this board yet +rm -rf out/tests/stm32c071rb + if [[ -z "${TELEPROBE_TOKEN-}" ]]; then echo No teleprobe token found, skipping running HIL tests exit