From e9b842082df4d8138d3100ecc8ad177245391f38 Mon Sep 17 00:00:00 2001
From: dimi <dimi.polonski@gmail.com>
Date: Tue, 18 Mar 2025 17:00:40 +0100
Subject: [PATCH] `embassy-stm32::hspi`: gate derive(defmt::Format) behind
 feature flag

---
 embassy-stm32/src/hspi/enums.rs | 33 ++++++++++++++++++++++-----------
 embassy-stm32/src/hspi/mod.rs   |  3 ++-
 2 files changed, 24 insertions(+), 12 deletions(-)

diff --git a/embassy-stm32/src/hspi/enums.rs b/embassy-stm32/src/hspi/enums.rs
index 351fc9ec6..83a88f4d9 100644
--- a/embassy-stm32/src/hspi/enums.rs
+++ b/embassy-stm32/src/hspi/enums.rs
@@ -1,7 +1,8 @@
 //! Enums used in Hspi configuration.
 
 #[allow(dead_code)]
-#[derive(Copy, Clone, defmt::Format)]
+#[derive(Copy, Clone)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub(crate) enum HspiMode {
     IndirectWrite,
     IndirectRead,
@@ -22,7 +23,8 @@ impl Into<u8> for HspiMode {
 
 /// Hspi lane width
 #[allow(dead_code)]
-#[derive(Copy, Clone, defmt::Format)]
+#[derive(Copy, Clone)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum HspiWidth {
     /// None
     NONE,
@@ -53,7 +55,8 @@ impl Into<u8> for HspiWidth {
 
 /// Flash bank selection
 #[allow(dead_code)]
-#[derive(Copy, Clone, defmt::Format)]
+#[derive(Copy, Clone)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum FlashSelection {
     /// Bank 1
     Flash1,
@@ -73,7 +76,8 @@ impl Into<bool> for FlashSelection {
 /// Wrap Size
 #[allow(dead_code)]
 #[allow(missing_docs)]
-#[derive(Copy, Clone, defmt::Format)]
+#[derive(Copy, Clone)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum WrapSize {
     None,
     _16Bytes,
@@ -97,7 +101,8 @@ impl Into<u8> for WrapSize {
 /// Memory Type
 #[allow(missing_docs)]
 #[allow(dead_code)]
-#[derive(Copy, Clone, defmt::Format)]
+#[derive(Copy, Clone)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum MemoryType {
     Micron,
     Macronix,
@@ -122,7 +127,8 @@ impl Into<u8> for MemoryType {
 
 /// Hspi memory size.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, defmt::Format)]
+#[derive(Copy, Clone)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum MemorySize {
     _1KiB,
     _2KiB,
@@ -182,7 +188,8 @@ impl Into<u8> for MemorySize {
 }
 
 /// Hspi Address size
-#[derive(Copy, Clone, defmt::Format)]
+#[derive(Copy, Clone)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum AddressSize {
     /// 8-bit address
     _8Bit,
@@ -207,7 +214,8 @@ impl Into<u8> for AddressSize {
 
 /// Time the Chip Select line stays high.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, defmt::Format)]
+#[derive(Copy, Clone)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum ChipSelectHighTime {
     _1Cycle,
     _2Cycle,
@@ -236,7 +244,8 @@ impl Into<u8> for ChipSelectHighTime {
 
 /// FIFO threshold.
 #[allow(missing_docs)]
-#[derive(Copy, Clone, defmt::Format)]
+#[derive(Copy, Clone)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum FIFOThresholdLevel {
     _1Bytes,
     _2Bytes,
@@ -313,7 +322,8 @@ impl Into<u8> for FIFOThresholdLevel {
 
 /// Dummy cycle count
 #[allow(missing_docs)]
-#[derive(Copy, Clone, defmt::Format)]
+#[derive(Copy, Clone)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum DummyCycles {
     _0,
     _1,
@@ -391,7 +401,8 @@ impl Into<u8> for DummyCycles {
 /// Functional mode
 #[allow(missing_docs)]
 #[allow(dead_code)]
-#[derive(Copy, Clone, defmt::Format)]
+#[derive(Copy, Clone)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum FunctionalMode {
     IndirectWrite,
     IndirectRead,
diff --git a/embassy-stm32/src/hspi/mod.rs b/embassy-stm32/src/hspi/mod.rs
index 97e1993dd..54b442481 100644
--- a/embassy-stm32/src/hspi/mod.rs
+++ b/embassy-stm32/src/hspi/mod.rs
@@ -24,7 +24,8 @@ use crate::rcc::{self, RccPeripheral};
 use crate::{peripherals, Peripheral};
 
 /// HSPI driver config.
-#[derive(Clone, Copy, defmt::Format)]
+#[derive(Clone, Copy)]
+#[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub struct Config {
     /// Fifo threshold used by the peripheral to generate the interrupt indicating data
     /// or space is available in the FIFO