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Fixed usb_hs_serial example

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This commit is contained in:
Gerzain Mata 2025-07-25 18:46:09 -07:00
parent 75c1039aa1
commit 8733a5f56a
1 changed files with 7 additions and 8 deletions
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15
examples/stm32wba/src/bin/usb_hs_serial.rs
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@ -5,8 +5,8 @@ use defmt::{panic, *};
use defmt_rtt as _; // global logger
use embassy_executor::Spawner;
use embassy_futures::join::join;
use embassy_stm32::rcc::{PllSource, PllPreDiv, PllMul, PllDiv};
use embassy_stm32::rcc::{mux, AHBPrescaler, AHB5Prescaler, APBPrescaler, Hse, HsePrescaler, Sysclk, VoltageScale};
use embassy_stm32::rcc::{mux, AHB5Prescaler, AHBPrescaler, APBPrescaler, Hse, HsePrescaler, Sysclk, VoltageScale};
use embassy_stm32::rcc::{PllDiv, PllMul, PllPreDiv, PllSource};
use embassy_stm32::usb::{Driver, Instance};
use embassy_stm32::{bind_interrupts, peripherals, usb, Config};
use embassy_usb::class::cdc_acm::{CdcAcmClass, State};
@ -29,17 +29,16 @@ async fn main(_spawner: Spawner) {
// prescaler: HsePrescaler::DIV2,
// });
// Fine-tune PLL1 dividers/multipliers
config.rcc.pll1 = Some(embassy_stm32::rcc::Pll {
source: PllSource::HSI,
prediv: PllPreDiv::DIV1, // PLLM = 1 → HSI / 1 = 16 MHz
mul: PllMul::MUL30, // PLLN = 30 → 16 MHz * 30 = 480 MHz VCO
divr: Some(PllDiv::DIV5), // PLLR = 5 → 96 MHz (Sysclk)
prediv: PllPreDiv::DIV1, // PLLM = 1 → HSI / 1 = 16 MHz
mul: PllMul::MUL30, // PLLN = 30 → 16 MHz * 30 = 480 MHz VCO
divr: Some(PllDiv::DIV5), // PLLR = 5 → 96 MHz (Sysclk)
// divq: Some(PllDiv::DIV10), // PLLQ = 10 → 48 MHz (NOT USED)
divq: None,
divp: Some(PllDiv::DIV30), // PLLP = 30 → 16 MHz (USBOTG)
frac: Some(0), // Fractional part (enabled)
divp: Some(PllDiv::DIV30), // PLLP = 30 → 16 MHz (USBOTG)
frac: Some(0), // Fractional part (enabled)
});
config.rcc.ahb_pre = AHBPrescaler::DIV1;