From 88c4274547db9fe6e6e720c69e61c4912fe03abd Mon Sep 17 00:00:00 2001 From: Birk Tjelmeland Date: Mon, 8 Sep 2025 13:48:48 +0200 Subject: [PATCH] stm32/usart: fix blocking flush The PR in #2416 fixes buffered usart flushing, but only for the async functions. This commit introduces the same fixes to the blocking functions. --- embassy-stm32/CHANGELOG.md | 1 + embassy-stm32/src/usart/buffered.rs | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md index ba565f663..4ea11b664 100644 --- a/embassy-stm32/CHANGELOG.md +++ b/embassy-stm32/CHANGELOG.md @@ -15,6 +15,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 - Add I2S support for STM32F1, STM32C0, STM32F0, STM32F3, STM32F7, STM32G0, STM32WL, STM32H5, STM32H7RS - fix: STM32: Prevent dropped DacChannel from disabling Dac peripheral if another DacChannel is still in scope ([#4577](https://github.com/embassy-rs/embassy/pull/4577)) - feat: Added support for more OctoSPI configurations (e.g. APS6408 RAM) ([#4581](https://github.com/embassy-rs/embassy/pull/4581)) +- fix: stm32/usart: fix bug with blocking flush in buffered uart ([#4648](https://github.com/embassy-rs/embassy/pull/4648)) ## 0.4.0 - 2025-08-26 diff --git a/embassy-stm32/src/usart/buffered.rs b/embassy-stm32/src/usart/buffered.rs index 890c8a80e..c734eed49 100644 --- a/embassy-stm32/src/usart/buffered.rs +++ b/embassy-stm32/src/usart/buffered.rs @@ -692,6 +692,8 @@ impl<'d> BufferedUartTx<'d> { fn blocking_write(&self, buf: &[u8]) -> Result { loop { let state = self.state; + state.tx_done.store(false, Ordering::Release); + let empty = state.tx_buf.is_empty(); let mut tx_writer = unsafe { state.tx_buf.writer() }; @@ -713,7 +715,7 @@ impl<'d> BufferedUartTx<'d> { fn blocking_flush(&self) -> Result<(), Error> { loop { let state = self.state; - if state.tx_buf.is_empty() { + if state.tx_done.load(Ordering::Acquire) { return Ok(()); } }