From be881875917b93a8cdb7a4ab07876e1239fbe1be Mon Sep 17 00:00:00 2001 From: elagil Date: Mon, 25 Aug 2025 21:10:59 +0200 Subject: [PATCH] fix: transfer options --- embassy-stm32/src/dma/gpdma/mod.rs | 3 +++ embassy-stm32/src/dma/gpdma/ringbuffered.rs | 6 +++++- 2 files changed, 8 insertions(+), 1 deletion(-) diff --git a/embassy-stm32/src/dma/gpdma/mod.rs b/embassy-stm32/src/dma/gpdma/mod.rs index 1d2811ab4..b23c22dfb 100644 --- a/embassy-stm32/src/dma/gpdma/mod.rs +++ b/embassy-stm32/src/dma/gpdma/mod.rs @@ -283,6 +283,9 @@ impl AnyChannel { state.lli_state.transfer_count.store(0, Ordering::Relaxed) } + /// Configure a linked-list transfer. + /// + /// Transfer options apply only to the base register transfer, not the linked-list items. unsafe fn configure_linked_list( &self, table: &Table, diff --git a/embassy-stm32/src/dma/gpdma/ringbuffered.rs b/embassy-stm32/src/dma/gpdma/ringbuffered.rs index 6bd48258b..a5b127d08 100644 --- a/embassy-stm32/src/dma/gpdma/ringbuffered.rs +++ b/embassy-stm32/src/dma/gpdma/ringbuffered.rs @@ -69,6 +69,8 @@ pub struct ReadableRingBuffer<'a, W: Word> { impl<'a, W: Word> ReadableRingBuffer<'a, W> { /// Create a new ring buffer. + /// + /// Transfer options are applied to the individual linked list items. pub unsafe fn new( channel: impl Peripheral

+ 'a, request: Request, @@ -220,6 +222,8 @@ pub struct WritableRingBuffer<'a, W: Word> { impl<'a, W: Word> WritableRingBuffer<'a, W> { /// Create a new ring buffer. + /// + /// Transfer options are applied to the individual linked list items. pub unsafe fn new( channel: impl Peripheral

+ 'a, request: Request, @@ -279,7 +283,7 @@ impl<'a, W: Word> WritableRingBuffer<'a, W> { self.channel.configure_linked_list( &self.table, TransferOptions { - half_transfer_ir: true, + half_transfer_ir: false, complete_transfer_ir: true, ..Default::default() },