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Merge pull request #4588 from tomaz-suller/fix-wb-mckdiv

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stm32/sai: fix WB MCKDIV
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Ulf Lilleengen 2025-08-26 09:13:08 +00:00 committed by GitHub
commit ccafed430c
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1 changed files with 4 additions and 4 deletions
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8
embassy-stm32/src/sai/mod.rs
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@ -390,7 +390,7 @@ impl OutputDrive {
/// Master clock divider. /// Master clock divider.
#[derive(Copy, Clone, PartialEq)] #[derive(Copy, Clone, PartialEq)]
#[allow(missing_docs)] #[allow(missing_docs)]
#[cfg(any(sai_v1, sai_v1_4pdm, sai_v2))] #[cfg(any(sai_v1, sai_v2))]
pub enum MasterClockDivider { pub enum MasterClockDivider {
MasterClockDisabled, MasterClockDisabled,
Div1, Div1,
@ -414,7 +414,7 @@ pub enum MasterClockDivider {
/// Master clock divider. /// Master clock divider.
#[derive(Copy, Clone, PartialEq)] #[derive(Copy, Clone, PartialEq)]
#[allow(missing_docs)] #[allow(missing_docs)]
#[cfg(any(sai_v3_2pdm, sai_v3_4pdm, sai_v4_2pdm, sai_v4_4pdm))] #[cfg(any(sai_v1_4pdm, sai_v3_2pdm, sai_v3_4pdm, sai_v4_2pdm, sai_v4_4pdm))]
pub enum MasterClockDivider { pub enum MasterClockDivider {
MasterClockDisabled, MasterClockDisabled,
Div1, Div1,
@ -483,7 +483,7 @@ pub enum MasterClockDivider {
} }
impl MasterClockDivider { impl MasterClockDivider {
#[cfg(any(sai_v1, sai_v1_4pdm, sai_v2))] #[cfg(any(sai_v1, sai_v2))]
const fn mckdiv(&self) -> u8 { const fn mckdiv(&self) -> u8 {
match self { match self {
MasterClockDivider::MasterClockDisabled => 0, MasterClockDivider::MasterClockDisabled => 0,
@ -506,7 +506,7 @@ impl MasterClockDivider {
} }
} }
#[cfg(any(sai_v3_2pdm, sai_v3_4pdm, sai_v4_2pdm, sai_v4_4pdm))] #[cfg(any(sai_v1_4pdm, sai_v3_2pdm, sai_v3_4pdm, sai_v4_2pdm, sai_v4_4pdm))]
const fn mckdiv(&self) -> u8 { const fn mckdiv(&self) -> u8 {
match self { match self {
MasterClockDivider::MasterClockDisabled => 0, MasterClockDivider::MasterClockDisabled => 0,