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set PLLI2S M and SRC for f4 chips which support it

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vinsynth 2025-02-02 18:12:34 -05:00
parent 69925764dc
commit ce04cf8340
1 changed files with 5 additions and 0 deletions
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5
embassy-stm32/src/rcc/f247.rs
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@ -414,6 +414,11 @@ fn init_pll(instance: PllInstance, config: Option<Pll>, input: &PllInput) -> Pll
}),
#[cfg(any(all(stm32f4, not(stm32f410)), stm32f7))]
PllInstance::Plli2s => RCC.plli2scfgr().write(|w| {
#[cfg(any(stm32f411, stm32f412, stm32f413, stm32f446))]
w.set_pllm(pll.prediv);
#[cfg(any(stm32f412, stm32f413))]
w.set_pllsrc(input.source);
write_fields!(w);
}),
#[cfg(stm32f2)]