diff --git a/embassy-stm32/CHANGELOG.md b/embassy-stm32/CHANGELOG.md
index da8bce0e2..dd82613d9 100644
--- a/embassy-stm32/CHANGELOG.md
+++ b/embassy-stm32/CHANGELOG.md
@@ -14,6 +14,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - fix: Fix performing a hash after performing a hmac
 - chore: Updated stm32-metapac and stm32-data dependencies
 - feat: stm32/adc/v3: allow DMA reads to loop through enable channels
+- fix: Fix XSPI not disabling alternate bytes when they were previously enabled
 
 ## 0.3.0 - 2025-08-12
 
diff --git a/embassy-stm32/src/xspi/mod.rs b/embassy-stm32/src/xspi/mod.rs
index 44c10b961..60ccf3c97 100644
--- a/embassy-stm32/src/xspi/mod.rs
+++ b/embassy-stm32/src/xspi/mod.rs
@@ -429,6 +429,11 @@ impl<'d, T: Instance, M: PeriMode> Xspi<'d, T, M> {
                 w.set_abdtr(command.abdtr);
                 w.set_absize(CcrAbsize::from_bits(command.absize.into()));
             })
+        } else {
+            T::REGS.ccr().modify(|w| {
+                // disable alternate bytes
+                w.set_abmode(CcrAbmode::B_0X0);
+            })
         }
 
         // Configure dummy cycles