From d5bf29a30308211bb5d415e59d91507e233b6d4a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?S=C3=BCha=20=C3=9Cn=C3=BCvar?=
 <87157627+phycrax@users.noreply.github.com>
Date: Fri, 8 Aug 2025 23:14:08 +0800
Subject: [PATCH] stm32 i2c v2: rename freq to frequency

---
 embassy-stm32/src/i2c/v2.rs | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/embassy-stm32/src/i2c/v2.rs b/embassy-stm32/src/i2c/v2.rs
index 76f0d25dc..4d341bab1 100644
--- a/embassy-stm32/src/i2c/v2.rs
+++ b/embassy-stm32/src/i2c/v2.rs
@@ -1320,9 +1320,9 @@ struct Timings {
 }
 
 impl Timings {
-    fn new(i2cclk: Hertz, freq: Hertz) -> Self {
+    fn new(i2cclk: Hertz, frequency: Hertz) -> Self {
         let i2cclk = i2cclk.0;
-        let freq = freq.0;
+        let frequency = frequency.0;
         // Refer to RM0433 Rev 7 Figure 539 for setup and hold timing:
         //
         // t_I2CCLK = 1 / PCLK1
@@ -1332,13 +1332,13 @@ impl Timings {
         //
         // t_SYNC1 + t_SYNC2 > 4 * t_I2CCLK
         // t_SCL ~= t_SYNC1 + t_SYNC2 + t_SCLL + t_SCLH
-        let ratio = i2cclk / freq;
+        let ratio = i2cclk / frequency;
 
         // For the standard-mode configuration method, we must have a ratio of 4
         // or higher
         assert!(ratio >= 4, "The I2C PCLK must be at least 4 times the bus frequency!");
 
-        let (presc_reg, scll, sclh, sdadel, scldel) = if freq > 100_000 {
+        let (presc_reg, scll, sclh, sdadel, scldel) = if frequency > 100_000 {
             // Fast-mode (Fm) or Fast-mode Plus (Fm+)
             // here we pick SCLL + 1 = 2 * (SCLH + 1)
 
@@ -1352,7 +1352,7 @@ impl Timings {
             let sclh = ((ratio / presc) - 3) / 3;
             let scll = (2 * (sclh + 1)) - 1;
 
-            let (sdadel, scldel) = if freq > 400_000 {
+            let (sdadel, scldel) = if frequency > 400_000 {
                 // Fast-mode Plus (Fm+)
                 assert!(i2cclk >= 17_000_000); // See table in datsheet