itsscb/embassy
1
0
Fork 0
mirror of https://github.com/embassy-rs/embassy.git synced 2025-09-28 12:50:37 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge pull request #3704 from CNLHC/pwm_support_gp32

Browse Source 
feat: Add 32-bit timer support for waveform function
This commit is contained in:
Dario Nieuwenhuis 2025-01-21 22:57:47 +00:00 committed by GitHub
commit eda51673f5
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
6 changed files with 96 additions and 50 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
embassy-stm32/src/cryp/mod.rs
View File

@ -1785,9 +1785,9 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> {
assert_eq!(blocks.len() % block_size, 0);
// Configure DMA to transfer input to crypto core.
let dma_request = dma.request();
let dst_ptr = T::regs().din().as_ptr();
let dst_ptr: *mut u32 = T::regs().din().as_ptr();
let num_words = blocks.len() / 4;
let src_ptr = ptr::slice_from_raw_parts(blocks.as_ptr().cast(), num_words);
let src_ptr: *const [u8] = ptr::slice_from_raw_parts(blocks.as_ptr().cast(), num_words);
let options = TransferOptions {
#[cfg(not(gpdma))]
priority: crate::dma::Priority::High,
@ -1825,9 +1825,9 @@ impl<'d, T: Instance, DmaIn, DmaOut> Cryp<'d, T, DmaIn, DmaOut> {
assert_eq!((blocks.len() * 4) % block_size, 0);
// Configure DMA to transfer input to crypto core.
let dma_request = dma.request();
let dst_ptr = T::regs().din().as_ptr();
let dst_ptr: *mut u32 = T::regs().din().as_ptr();
let num_words = blocks.len();
let src_ptr = ptr::slice_from_raw_parts(blocks.as_ptr().cast(), num_words);
let src_ptr: *const [u32] = ptr::slice_from_raw_parts(blocks.as_ptr().cast(), num_words);
let options = TransferOptions {
#[cfg(not(gpdma))]
priority: crate::dma::Priority::High,

44
embassy-stm32/src/dma/dma_bdma.rs
View File

@ -340,7 +340,8 @@ impl AnyChannel {
mem_addr: *mut u32,
mem_len: usize,
incr_mem: bool,
data_size: WordSize,
mem_size: WordSize,
peripheral_size: WordSize,
options: TransferOptions,
) {
let info = self.info();
@ -380,8 +381,8 @@ impl AnyChannel {
});
ch.cr().write(|w| {
w.set_dir(dir.into());
w.set_msize(data_size.into());
w.set_psize(data_size.into());
w.set_msize(mem_size.into());
w.set_psize(peripheral_size.into());
w.set_pl(options.priority.into());
w.set_minc(incr_mem);
w.set_pinc(false);
@ -414,8 +415,8 @@ impl AnyChannel {
ch.mar().write_value(mem_addr as u32);
ch.ndtr().write(|w| w.set_ndt(mem_len as u16));
ch.cr().write(|w| {
w.set_psize(data_size.into());
w.set_msize(data_size.into());
w.set_psize(peripheral_size.into());
w.set_msize(mem_size.into());
w.set_minc(incr_mem);
w.set_dir(dir.into());
w.set_teie(true);
@ -602,27 +603,28 @@ impl<'a> Transfer<'a> {
buf.len(),
true,
W::size(),
W::size(),
options,
)
}
/// Create a new write DMA transfer (memory to peripheral).
pub unsafe fn new_write<W: Word>(
pub unsafe fn new_write<MW: Word, PW: Word>(
channel: impl Peripheral<P = impl Channel> + 'a,
request: Request,
buf: &'a [W],
peri_addr: *mut W,
buf: &'a [MW],
peri_addr: *mut PW,
options: TransferOptions,
) -> Self {
Self::new_write_raw(channel, request, buf, peri_addr, options)
}
/// Create a new write DMA transfer (memory to peripheral), using raw pointers.
pub unsafe fn new_write_raw<W: Word>(
pub unsafe fn new_write_raw<MW: Word, PW: Word>(
channel: impl Peripheral<P = impl Channel> + 'a,
request: Request,
buf: *const [W],
peri_addr: *mut W,
buf: *const [MW],
peri_addr: *mut PW,
options: TransferOptions,
) -> Self {
into_ref!(channel);
@ -632,10 +634,11 @@ impl<'a> Transfer<'a> {
request,
Dir::MemoryToPeripheral,
peri_addr as *const u32,
buf as *const W as *mut u32,
buf as *const MW as *mut u32,
buf.len(),
true,
W::size(),
MW::size(),
PW::size(),
options,
)
}
@ -660,6 +663,7 @@ impl<'a> Transfer<'a> {
count,
false,
W::size(),
W::size(),
options,
)
}
@ -673,15 +677,23 @@ impl<'a> Transfer<'a> {
mem_len: usize,
incr_mem: bool,
data_size: WordSize,
peripheral_size: WordSize,
options: TransferOptions,
) -> Self {
assert!(mem_len > 0 && mem_len <= 0xFFFF);
channel.configure(
_request, dir, peri_addr, mem_addr, mem_len, incr_mem, data_size, options,
_request,
dir,
peri_addr,
mem_addr,
mem_len,
incr_mem,
data_size,
peripheral_size,
options,
);
channel.start();
Self { channel }
}
@ -814,6 +826,7 @@ impl<'a, W: Word> ReadableRingBuffer<'a, W> {
len,
true,
data_size,
data_size,
options,
);
@ -966,6 +979,7 @@ impl<'a, W: Word> WritableRingBuffer<'a, W> {
len,
true,
data_size,
data_size,
options,
);

32
embassy-stm32/src/dma/gpdma.rs
View File

@ -143,27 +143,28 @@ impl<'a> Transfer<'a> {
buf.len(),
true,
W::size(),
W::size(),
options,
)
}
/// Create a new write DMA transfer (memory to peripheral).
pub unsafe fn new_write<W: Word>(
pub unsafe fn new_write<MW: Word, PW: Word>(
channel: impl Peripheral<P = impl Channel> + 'a,
request: Request,
buf: &'a [W],
peri_addr: *mut W,
buf: &'a [MW],
peri_addr: *mut PW,
options: TransferOptions,
) -> Self {
Self::new_write_raw(channel, request, buf, peri_addr, options)
}
/// Create a new write DMA transfer (memory to peripheral), using raw pointers.
pub unsafe fn new_write_raw<W: Word>(
pub unsafe fn new_write_raw<MW: Word, PW: Word>(
channel: impl Peripheral<P = impl Channel> + 'a,
request: Request,
buf: *const [W],
peri_addr: *mut W,
buf: *const [MW],
peri_addr: *mut PW,
options: TransferOptions,
) -> Self {
into_ref!(channel);
@ -173,21 +174,22 @@ impl<'a> Transfer<'a> {
request,
Dir::MemoryToPeripheral,
peri_addr as *const u32,
buf as *const W as *mut u32,
buf as *const MW as *mut u32,
buf.len(),
true,
W::size(),
MW::size(),
PW::size(),
options,
)
}
/// Create a new write DMA transfer (memory to peripheral), writing the same value repeatedly.
pub unsafe fn new_write_repeated<W: Word>(
pub unsafe fn new_write_repeated<MW: Word, PW: Word>(
channel: impl Peripheral<P = impl Channel> + 'a,
request: Request,
repeated: &'a W,
repeated: &'a MW,
count: usize,
peri_addr: *mut W,
peri_addr: *mut PW,
options: TransferOptions,
) -> Self {
into_ref!(channel);
@ -197,10 +199,11 @@ impl<'a> Transfer<'a> {
request,
Dir::MemoryToPeripheral,
peri_addr as *const u32,
repeated as *const W as *mut u32,
repeated as *const MW as *mut u32,
count,
false,
W::size(),
MW::size(),
PW::size(),
options,
)
}
@ -214,6 +217,7 @@ impl<'a> Transfer<'a> {
mem_len: usize,
incr_mem: bool,
data_size: WordSize,
dst_size: WordSize,
_options: TransferOptions,
) -> Self {
// BNDT is specified as bytes, not as number of transfers.
@ -234,7 +238,7 @@ impl<'a> Transfer<'a> {
ch.llr().write(|_| {}); // no linked list
ch.tr1().write(|w| {
w.set_sdw(data_size.into());
w.set_ddw(data_size.into());
w.set_ddw(dst_size.into());
w.set_sinc(dir == Dir::MemoryToPeripheral && incr_mem);
w.set_dinc(dir == Dir::PeripheralToMemory && incr_mem);
});

15
embassy-stm32/src/hash/mod.rs
View File

@ -515,14 +515,21 @@ impl<'d, T: Instance, D> Hash<'d, T, D> {
// Configure DMA to transfer input to hash core.
let dma_request = self.dma.request();
let dst_ptr = T::regs().din().as_ptr();
let dst_ptr: *mut u32 = T::regs().din().as_ptr();
let mut num_words = input.len() / 4;
if input.len() % 4 > 0 {
num_words += 1;
}
let src_ptr = ptr::slice_from_raw_parts(input.as_ptr().cast(), num_words);
let dma_transfer =
unsafe { Transfer::new_write_raw(&mut self.dma, dma_request, src_ptr, dst_ptr, Default::default()) };
let src_ptr: *const [u8] = ptr::slice_from_raw_parts(input.as_ptr().cast(), num_words);
let dma_transfer = unsafe {
Transfer::new_write_raw(
&mut self.dma,
dma_request,
src_ptr,
dst_ptr as *mut u32,
Default::default(),
)
};
T::regs().cr().modify(|w| w.set_dmae(true));
// Wait for the transfer to complete.

5
embassy-stm32/src/timer/low_level.rs
View File

@ -235,6 +235,11 @@ impl<'d, T: CoreInstance> Timer<'d, T> {
self.regs_core().cnt().write(|r| r.set_cnt(0));
}
/// get the capability of the timer
pub fn bits(&self) -> TimerBits {
T::BITS
}
/// Set the frequency of how many times per second the timer counts up to the max value or down to 0.
///
/// This means that in the default edge-aligned mode,

42
embassy-stm32/src/timer/simple_pwm.rs
View File

@ -6,7 +6,7 @@ use core::mem::ManuallyDrop;
use embassy_hal_internal::{into_ref, PeripheralRef};
use super::low_level::{CountingMode, OutputCompareMode, OutputPolarity, Timer};
use super::{Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance4Channel};
use super::{Channel, Channel1Pin, Channel2Pin, Channel3Pin, Channel4Pin, GeneralInstance4Channel, TimerBits};
use crate::gpio::{AfType, AnyPin, OutputType, Speed};
use crate::time::Hertz;
use crate::Peripheral;
@ -334,7 +334,7 @@ impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
&mut dma,
req,
duty,
self.inner.regs_1ch().ccr(channel.index()).as_ptr() as *mut _,
self.inner.regs_1ch().ccr(channel.index()).as_ptr() as *mut u16,
dma_transfer_option,
)
.await
@ -362,9 +362,6 @@ macro_rules! impl_waveform_chx {
($fn_name:ident, $dma_ch:ident, $cc_ch:ident) => {
impl<'d, T: GeneralInstance4Channel> SimplePwm<'d, T> {
/// Generate a sequence of PWM waveform
///
/// Note:
/// you will need to provide corresponding TIMx_CHy DMA channel to use this method.
pub async fn $fn_name(&mut self, dma: impl Peripheral<P = impl super::$dma_ch<T>>, duty: &[u16]) {
use crate::pac::timer::vals::Ccds;
@ -406,14 +403,33 @@ macro_rules! impl_waveform_chx {
..Default::default()
};
Transfer::new_write(
&mut dma,
req,
duty,
self.inner.regs_gp16().ccr(cc_channel.index()).as_ptr() as *mut _,
dma_transfer_option,
)
.await
match self.inner.bits() {
TimerBits::Bits16 => {
Transfer::new_write(
&mut dma,
req,
duty,
self.inner.regs_gp16().ccr(cc_channel.index()).as_ptr() as *mut u16,
dma_transfer_option,
)
.await
}
#[cfg(not(any(stm32l0)))]
TimerBits::Bits32 => {
#[cfg(not(any(bdma, gpdma)))]
panic!("unsupported timer bits");
#[cfg(any(bdma, gpdma))]
Transfer::new_write(
&mut dma,
req,
duty,
self.inner.regs_gp16().ccr(cc_channel.index()).as_ptr() as *mut u32,
dma_transfer_option,
)
.await
}
};
};
// restore output compare state