itsscb/embassy
1
0
Fork 0
mirror of https://github.com/embassy-rs/embassy.git synced 2025-09-26 20:00:27 +00:00
Code Issues Packages Projects Releases Wiki Activity

BufferedUart initialization

Browse Source 
This change modifies UART initialization throughout Embassy to take pins
before interrupts.

Related to #1304.
This commit is contained in:
Michael Gomez 2025-03-19 20:44:16 -07:00
parent a44abaf7e4
commit f1feedf190
24 changed files with 40 additions and 34 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
embassy-nrf/CHANGELOG.md
View File

@ -11,6 +11,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- bugfix: nrf twim return errors in async\_wait instead of waiting indefinitely
- bugfix: fix missing setting input as disconnected.
- changed: Modify Uarte and BufferedUarte initialization to take pins before interrupts ([#3983](https://github.com/embassy-rs/embassy/pull/3983))
## 0.3.0 - 2025-01-06

10
embassy-nrf/src/buffered_uarte.rs
View File

@ -227,9 +227,9 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
ppi_ch1: Peri<'d, impl ConfigurableChannel>,
ppi_ch2: Peri<'d, impl ConfigurableChannel>,
ppi_group: Peri<'d, impl Group>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
rxd: Peri<'d, impl GpioPin>,
txd: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
config: Config,
rx_buffer: &'d mut [u8],
tx_buffer: &'d mut [u8],
@ -262,11 +262,11 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarte<'d, U, T> {
ppi_ch1: Peri<'d, impl ConfigurableChannel>,
ppi_ch2: Peri<'d, impl ConfigurableChannel>,
ppi_group: Peri<'d, impl Group>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
rxd: Peri<'d, impl GpioPin>,
txd: Peri<'d, impl GpioPin>,
cts: Peri<'d, impl GpioPin>,
rts: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
config: Config,
rx_buffer: &'d mut [u8],
tx_buffer: &'d mut [u8],
@ -377,8 +377,8 @@ impl<'d, U: UarteInstance> BufferedUarteTx<'d, U> {
/// Create a new BufferedUarteTx without hardware flow control.
pub fn new(
uarte: Peri<'d, U>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
txd: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
config: Config,
tx_buffer: &'d mut [u8],
) -> Self {
@ -392,9 +392,9 @@ impl<'d, U: UarteInstance> BufferedUarteTx<'d, U> {
/// Panics if `rx_buffer.len()` is odd.
pub fn new_with_cts(
uarte: Peri<'d, U>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
txd: Peri<'d, impl GpioPin>,
cts: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
config: Config,
tx_buffer: &'d mut [u8],
) -> Self {
@ -588,9 +588,9 @@ impl<'d, U: UarteInstance, T: TimerInstance> BufferedUarteRx<'d, U, T> {
ppi_ch1: Peri<'d, impl ConfigurableChannel>,
ppi_ch2: Peri<'d, impl ConfigurableChannel>,
ppi_group: Peri<'d, impl Group>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
rxd: Peri<'d, impl GpioPin>,
rts: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<U::Interrupt, InterruptHandler<U>> + 'd,
config: Config,
rx_buffer: &'d mut [u8],
) -> Self {

4
embassy-nrf/src/uarte.rs
View File

@ -155,9 +155,9 @@ impl<'d, T: Instance> Uarte<'d, T> {
/// Create a new UARTE without hardware flow control
pub fn new(
uarte: Peri<'d, T>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
rxd: Peri<'d, impl GpioPin>,
txd: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
config: Config,
) -> Self {
Self::new_inner(uarte, rxd.into(), txd.into(), None, None, config)
@ -166,11 +166,11 @@ impl<'d, T: Instance> Uarte<'d, T> {
/// Create a new UARTE with hardware flow control (RTS/CTS)
pub fn new_with_rtscts(
uarte: Peri<'d, T>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
rxd: Peri<'d, impl GpioPin>,
txd: Peri<'d, impl GpioPin>,
cts: Peri<'d, impl GpioPin>,
rts: Peri<'d, impl GpioPin>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
config: Config,
) -> Self {
Self::new_inner(

1
embassy-rp/CHANGELOG.md
View File

@ -16,6 +16,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- rp235x: add ImageDef features. ([#3890](https://github.com/embassy-rs/embassy/pull/3890))
- doc: Fix "the the" ([#3903](https://github.com/embassy-rs/embassy/pull/3903))
- pio: Add access to DMA engine byte swapping ([#3935](https://github.com/embassy-rs/embassy/pull/3935))
- Modify BufferedUart initialization to take pins before interrupts ([#3983](https://github.com/embassy-rs/embassy/pull/3983))
## 0.3.1 - 2025-02-06

4
embassy-rp/src/uart/buffered.rs
View File

@ -91,9 +91,9 @@ impl<'d, T: Instance> BufferedUart<'d, T> {
/// Create a buffered UART instance.
pub fn new(
_uart: Peri<'d, T>,
irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
tx: Peri<'d, impl TxPin<T>>,
rx: Peri<'d, impl RxPin<T>>,
irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
tx_buffer: &'d mut [u8],
rx_buffer: &'d mut [u8],
config: Config,
@ -110,11 +110,11 @@ impl<'d, T: Instance> BufferedUart<'d, T> {
/// Create a buffered UART instance with flow control.
pub fn new_with_rtscts(
_uart: Peri<'d, T>,
irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
tx: Peri<'d, impl TxPin<T>>,
rx: Peri<'d, impl RxPin<T>>,
rts: Peri<'d, impl RtsPin<T>>,
cts: Peri<'d, impl CtsPin<T>>,
irq: impl Binding<T::Interrupt, BufferedInterruptHandler<T>>,
tx_buffer: &'d mut [u8],
rx_buffer: &'d mut [u8],
config: Config,

5
embassy-stm32/CHANGELOG.md
View File

@ -5,6 +5,9 @@ All notable changes to this project will be documented in this file.
The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/),
and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
## Unreleased
- Modify BufferedUart initialization to take pins before interrupts ([#3983](https://github.com/embassy-rs/embassy/pull/3983))
## 0.2.0 - 2025-01-10
Starting 2025 strong with a release packed with new, exciting good stuff! 🚀
@ -272,4 +275,4 @@ Misc:
## 0.1.0 - 2024-01-12
First release.
First release.

10
embassy-stm32/src/usart/buffered.rs
View File

@ -208,11 +208,11 @@ impl<'d> BufferedUart<'d> {
/// Create a new bidirectional buffered UART driver
pub fn new<T: Instance>(
peri: Peri<'d, T>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
rx: Peri<'d, impl RxPin<T>>,
tx: Peri<'d, impl TxPin<T>>,
tx_buffer: &'d mut [u8],
rx_buffer: &'d mut [u8],
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
config: Config,
) -> Result<Self, ConfigError> {
Self::new_inner(
@ -231,11 +231,11 @@ impl<'d> BufferedUart<'d> {
/// Create a new bidirectional buffered UART driver with request-to-send and clear-to-send pins
pub fn new_with_rtscts<T: Instance>(
peri: Peri<'d, T>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
rx: Peri<'d, impl RxPin<T>>,
tx: Peri<'d, impl TxPin<T>>,
rts: Peri<'d, impl RtsPin<T>>,
cts: Peri<'d, impl CtsPin<T>>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
tx_buffer: &'d mut [u8],
rx_buffer: &'d mut [u8],
config: Config,
@ -256,10 +256,10 @@ impl<'d> BufferedUart<'d> {
/// Create a new bidirectional buffered UART driver with only the RTS pin as the DE pin
pub fn new_with_rts_as_de<T: Instance>(
peri: Peri<'d, T>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
rx: Peri<'d, impl RxPin<T>>,
tx: Peri<'d, impl TxPin<T>>,
rts: Peri<'d, impl RtsPin<T>>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
tx_buffer: &'d mut [u8],
rx_buffer: &'d mut [u8],
config: Config,
@ -280,10 +280,10 @@ impl<'d> BufferedUart<'d> {
/// Create a new bidirectional buffered UART driver with only the request-to-send pin
pub fn new_with_rts<T: Instance>(
peri: Peri<'d, T>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
rx: Peri<'d, impl RxPin<T>>,
tx: Peri<'d, impl TxPin<T>>,
rts: Peri<'d, impl RtsPin<T>>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
tx_buffer: &'d mut [u8],
rx_buffer: &'d mut [u8],
config: Config,
@ -305,10 +305,10 @@ impl<'d> BufferedUart<'d> {
#[cfg(not(any(usart_v1, usart_v2)))]
pub fn new_with_de<T: Instance>(
peri: Peri<'d, T>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
rx: Peri<'d, impl RxPin<T>>,
tx: Peri<'d, impl TxPin<T>>,
de: Peri<'d, impl DePin<T>>,
_irq: impl interrupt::typelevel::Binding<T::Interrupt, InterruptHandler<T>> + 'd,
tx_buffer: &'d mut [u8],
rx_buffer: &'d mut [u8],
config: Config,

2
examples/nrf52840/src/bin/buffered_uart.rs
View File

@ -28,9 +28,9 @@ async fn main(_spawner: Spawner) {
p.PPI_CH0,
p.PPI_CH1,
p.PPI_GROUP0,
Irqs,
p.P0_08,
p.P0_06,
Irqs,
config,
&mut rx_buffer,
&mut tx_buffer,

2
examples/nrf52840/src/bin/uart.rs
View File

@ -17,7 +17,7 @@ async fn main(_spawner: Spawner) {
config.parity = uarte::Parity::EXCLUDED;
config.baudrate = uarte::Baudrate::BAUD115200;
let mut uart = uarte::Uarte::new(p.UARTE0, Irqs, p.P0_08, p.P0_06, config);
let mut uart = uarte::Uarte::new(p.UARTE0, p.P0_08, p.P0_06, Irqs, config);
info!("uarte initialized!");

2
examples/nrf52840/src/bin/uart_idle.rs
View File

@ -18,7 +18,7 @@ async fn main(_spawner: Spawner) {
config.parity = uarte::Parity::EXCLUDED;
config.baudrate = uarte::Baudrate::BAUD115200;
let uart = uarte::Uarte::new(p.UARTE0, Irqs, p.P0_08, p.P0_06, config);
let uart = uarte::Uarte::new(p.UARTE0, p.P0_08, p.P0_06, Irqs, config);
let (mut tx, mut rx) = uart.split_with_idle(p.TIMER0, p.PPI_CH0, p.PPI_CH1);
info!("uarte initialized!");

2
examples/nrf52840/src/bin/uart_split.rs
View File

@ -23,7 +23,7 @@ async fn main(spawner: Spawner) {
config.parity = uarte::Parity::EXCLUDED;
config.baudrate = uarte::Baudrate::BAUD115200;
let uart = uarte::Uarte::new(p.UARTE0, Irqs, p.P0_08, p.P0_06, config);
let uart = uarte::Uarte::new(p.UARTE0, p.P0_08, p.P0_06, Irqs, config);
let (mut tx, rx) = uart.split();
info!("uarte initialized!");

2
examples/nrf5340/src/bin/uart.rs
View File

@ -18,7 +18,7 @@ async fn main(_spawner: Spawner) {
config.parity = uarte::Parity::EXCLUDED;
config.baudrate = uarte::Baudrate::BAUD115200;
let mut uart = uarte::Uarte::new(p.SERIAL0, Irqs, p.P1_00, p.P1_01, config);
let mut uart = uarte::Uarte::new(p.SERIAL0, p.P1_00, p.P1_01, Irqs, config);
info!("uarte initialized!");

2
examples/nrf9151/ns/src/bin/uart.rs
View File

@ -17,7 +17,7 @@ async fn main(_spawner: Spawner) {
config.parity = uarte::Parity::EXCLUDED;
config.baudrate = uarte::Baudrate::BAUD115200;
let mut uart = uarte::Uarte::new(p.SERIAL0, Irqs, p.P0_26, p.P0_27, config);
let mut uart = uarte::Uarte::new(p.SERIAL0, p.P0_26, p.P0_27, Irqs, config);
info!("uarte initialized!");

2
examples/nrf9160/src/bin/modem_tcp_client.rs
View File

@ -127,8 +127,8 @@ async fn main(spawner: Spawner) {
let uart = BufferedUarteTx::new(
//let trace_uart = BufferedUarteTx::new(
unsafe { peripherals::SERIAL0::steal() },
Irqs,
unsafe { peripherals::P0_01::steal() },
Irqs,
//unsafe { peripherals::P0_14::steal() },
config,
unsafe { &mut *addr_of_mut!(TRACE_BUF) },

2
examples/rp/src/bin/uart_buffered_split.rs
View File

@ -30,7 +30,7 @@ async fn main(spawner: Spawner) {
let tx_buf = &mut TX_BUF.init([0; 16])[..];
static RX_BUF: StaticCell<[u8; 16]> = StaticCell::new();
let rx_buf = &mut RX_BUF.init([0; 16])[..];
let uart = BufferedUart::new(uart, Irqs, tx_pin, rx_pin, tx_buf, rx_buf, Config::default());
let uart = BufferedUart::new(uart, tx_pin, rx_pin, Irqs, tx_buf, rx_buf, Config::default());
let (mut tx, rx) = uart.split();
unwrap!(spawner.spawn(reader(rx)));

2
examples/rp235x/src/bin/uart_buffered_split.rs
View File

@ -30,7 +30,7 @@ async fn main(spawner: Spawner) {
let tx_buf = &mut TX_BUF.init([0; 16])[..];
static RX_BUF: StaticCell<[u8; 16]> = StaticCell::new();
let rx_buf = &mut RX_BUF.init([0; 16])[..];
let uart = BufferedUart::new(uart, Irqs, tx_pin, rx_pin, tx_buf, rx_buf, Config::default());
let uart = BufferedUart::new(uart, tx_pin, rx_pin, Irqs, tx_buf, rx_buf, Config::default());
let (mut tx, rx) = uart.split();
unwrap!(spawner.spawn(reader(rx)));

2
examples/stm32f4/src/bin/usart_buffered.rs
View File

@ -21,7 +21,7 @@ async fn main(_spawner: Spawner) {
let mut tx_buf = [0u8; 32];
let mut rx_buf = [0u8; 32];
let mut buf_usart = BufferedUart::new(p.USART3, Irqs, p.PD9, p.PD8, &mut tx_buf, &mut rx_buf, config).unwrap();
let mut buf_usart = BufferedUart::new(p.USART3, p.PD9, p.PD8, &mut tx_buf, &mut rx_buf, Irqs, config).unwrap();
loop {
let buf = buf_usart.fill_buf().await.unwrap();

2
examples/stm32g0/src/bin/usart_buffered.rs
View File

@ -21,7 +21,7 @@ async fn main(_spawner: Spawner) {
config.baudrate = 115200;
let mut tx_buf = [0u8; 256];
let mut rx_buf = [0u8; 256];
let mut usart = BufferedUart::new(p.USART1, Irqs, p.PB7, p.PB6, &mut tx_buf, &mut rx_buf, config).unwrap();
let mut usart = BufferedUart::new(p.USART1, p.PB7, p.PB6, &mut tx_buf, &mut rx_buf, Irqs, config).unwrap();
usart.write_all(b"Hello Embassy World!\r\n").await.unwrap();
info!("wrote Hello, starting echo");

2
examples/stm32l0/src/bin/usart_irq.rs
View File

@ -21,7 +21,7 @@ async fn main(_spawner: Spawner) {
config.baudrate = 9600;
let mut tx_buf = [0u8; 256];
let mut rx_buf = [0u8; 256];
let mut usart = BufferedUart::new(p.USART2, Irqs, p.PA3, p.PA2, &mut tx_buf, &mut rx_buf, config).unwrap();
let mut usart = BufferedUart::new(p.USART2, p.PA3, p.PA2, &mut tx_buf, &mut rx_buf, Irqs, config).unwrap();
usart.write_all(b"Hello Embassy World!\r\n").await.unwrap();
info!("wrote Hello, starting echo");

2
tests/nrf/src/bin/buffered_uart.rs
View File

@ -30,9 +30,9 @@ async fn main(_spawner: Spawner) {
p.PPI_CH0.reborrow(),
p.PPI_CH1.reborrow(),
p.PPI_GROUP0.reborrow(),
irqs!(UART0_BUFFERED),
peri!(p, PIN_A).reborrow(),
peri!(p, PIN_B).reborrow(),
irqs!(UART0_BUFFERED),
config.clone(),
&mut rx_buffer,
&mut tx_buffer,

2
tests/nrf/src/bin/buffered_uart_full.rs
View File

@ -28,9 +28,9 @@ async fn main(_spawner: Spawner) {
p.PPI_CH0,
p.PPI_CH1,
p.PPI_GROUP0,
irqs!(UART0_BUFFERED),
peri!(p, PIN_A),
peri!(p, PIN_B),
irqs!(UART0_BUFFERED),
config.clone(),
&mut rx_buffer,
&mut tx_buffer,

2
tests/nrf/src/bin/buffered_uart_halves.rs
View File

@ -28,8 +28,8 @@ async fn main(_spawner: Spawner) {
let mut tx = BufferedUarteTx::new(
peri!(p, UART1).reborrow(),
irqs!(UART1_BUFFERED),
peri!(p, PIN_A).reborrow(),
irqs!(UART1_BUFFERED),
config.clone(),
&mut tx_buffer,
);

2
tests/nrf/src/bin/uart_split.rs
View File

@ -22,9 +22,9 @@ async fn main(_spawner: Spawner) {
let uarte = Uarte::new(
peri!(p, UART0).reborrow(),
irqs!(UART0),
peri!(p, PIN_A).reborrow(),
peri!(p, PIN_B).reborrow(),
irqs!(UART0),
config.clone(),
);
let (mut tx, mut rx) = uarte.split();

6
tests/rp/src/bin/uart_buffered.rs
View File

@ -75,9 +75,9 @@ async fn main(_spawner: Spawner) {
let rx_buf = &mut [0u8; 16];
let mut uart = BufferedUart::new(
uart.reborrow(),
Irqs,
tx.reborrow(),
rx.reborrow(),
Irqs,
tx_buf,
rx_buf,
config,
@ -103,9 +103,9 @@ async fn main(_spawner: Spawner) {
let rx_buf = &mut [0u8; 16];
let mut uart = BufferedUart::new(
uart.reborrow(),
Irqs,
tx.reborrow(),
rx.reborrow(),
Irqs,
tx_buf,
rx_buf,
config,
@ -146,9 +146,9 @@ async fn main(_spawner: Spawner) {
let rx_buf = &mut [0u8; 16];
let mut uart = BufferedUart::new(
uart.reborrow(),
Irqs,
tx.reborrow(),
rx.reborrow(),
Irqs,
tx_buf,
rx_buf,
config,