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i2s frequency relative to sysclk

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vinsynth 2024-12-14 11:02:18 -05:00
parent 854d1f3743
commit ffbef9316d
1 changed files with 1 additions and 2 deletions
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embassy-rp/src/pio_programs/i2s.rs
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@ -51,7 +51,6 @@ impl<'a, P: Instance, const S: usize> PioI2sOut<'a, P, S> {
data_pin: impl PioPin,
bit_clock_pin: impl PioPin,
lr_clock_pin: impl PioPin,
sysclk_frequency: u32,
sample_rate: u32,
bit_depth: u32,
channels: u32,
@ -68,7 +67,7 @@ impl<'a, P: Instance, const S: usize> PioI2sOut<'a, P, S> {
cfg.use_program(&program.prg, &[&bit_clock_pin, &left_right_clock_pin]);
cfg.set_out_pins(&[&data_pin]);
let clock_frequency = sample_rate * bit_depth * channels;
cfg.clock_divider = (sysclk_frequency as f64 / clock_frequency as f64 / 2.).to_fixed();
cfg.clock_divider = (crate::clocks::clk_sys_freq() as f64 / clock_frequency as f64 / 2.).to_fixed();
cfg.shift_out = ShiftConfig {
threshold: 32,
direction: ShiftDirection::Left,