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1e23b8114b
This also fixes a bug in the uart clock calculation where it could select an oversampling faster than what the hardware is providing.
7 lines
177 B
Plaintext
7 lines
177 B
Plaintext
MEMORY
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{
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FLASH : ORIGIN = 0x00000000, LENGTH = 128K
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/* Select non-parity range of SRAM due to SRAM_ERR_01 errata in SLAZ758 */
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RAM : ORIGIN = 0x20200000, LENGTH = 32K
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}
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