mirror of
https://github.com/embassy-rs/embassy.git
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354 lines
12 KiB
Rust
354 lines
12 KiB
Rust
//! GPDMA ring buffer implementation.
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//!
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//! FIXME: add request_pause functionality?
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use core::future::poll_fn;
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use core::sync::atomic::{fence, Ordering};
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use core::task::Waker;
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use embassy_hal_internal::Peri;
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use super::{AnyChannel, TransferOptions, STATE};
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use crate::dma::gpdma::linked_list::{LinearItem, RunMode, Table};
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use crate::dma::ringbuffer::{DmaCtrl, Error, ReadableDmaRingBuffer, WritableDmaRingBuffer};
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use crate::dma::word::Word;
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use crate::dma::{Channel, Request};
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struct DmaCtrlImpl<'a>(Peri<'a, AnyChannel>);
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impl<'a> DmaCtrl for DmaCtrlImpl<'a> {
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fn get_remaining_transfers(&self) -> usize {
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let state = &STATE[self.0.id as usize];
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let current_remaining = self.0.get_remaining_transfers() as usize;
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let lli_count = state.lli_state.count.load(Ordering::Acquire);
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if lli_count > 0 {
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// In linked-list mode, the remaining transfers are the sum of the full lengths of LLIs that follow,
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// and the remaining transfers for the current LLI.
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let lli_index = state.lli_state.index.load(Ordering::Acquire);
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let single_transfer_count = state.lli_state.transfer_count.load(Ordering::Acquire) / lli_count;
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(lli_count - lli_index - 1) * single_transfer_count + current_remaining
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} else {
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// No linked-list mode.
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current_remaining
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}
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}
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fn reset_complete_count(&mut self) -> usize {
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let state = &STATE[self.0.id as usize];
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state.complete_count.swap(0, Ordering::AcqRel)
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}
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fn set_waker(&mut self, waker: &Waker) {
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STATE[self.0.id as usize].waker.register(waker);
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}
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}
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/// Ringbuffer for receiving data using GPDMA linked-list mode.
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pub struct ReadableRingBuffer<'a, W: Word> {
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channel: Peri<'a, AnyChannel>,
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ringbuf: ReadableDmaRingBuffer<'a, W>,
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table: Table<2>,
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}
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impl<'a, W: Word> ReadableRingBuffer<'a, W> {
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/// Create a new ring buffer.
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///
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/// Transfer options are applied to the individual linked list items.
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pub unsafe fn new(
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channel: Peri<'a, impl Channel>,
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request: Request,
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peri_addr: *mut W,
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buffer: &'a mut [W],
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_options: TransferOptions,
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) -> Self {
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let channel: Peri<'a, AnyChannel> = channel.into();
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// Buffer halves should be the same length.
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let half_len = buffer.len() / 2;
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assert_eq!(half_len * 2, buffer.len());
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let items = [
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LinearItem::new_read(request, peri_addr, &mut buffer[..half_len]),
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LinearItem::new_read(request, peri_addr, &mut buffer[half_len..]),
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];
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let table = Table::new(items);
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Self {
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channel,
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ringbuf: ReadableDmaRingBuffer::new(buffer),
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table,
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}
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}
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/// Start the ring buffer operation.
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///
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/// You must call this after creating it for it to work.
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pub fn start(&mut self) {
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unsafe { self.channel.configure_linked_list(&self.table, Default::default()) };
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self.table.link(RunMode::Circular);
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self.channel.start();
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}
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/// Clear all data in the ring buffer.
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pub fn clear(&mut self) {
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self.ringbuf.reset(&mut DmaCtrlImpl(self.channel.reborrow()));
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}
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/// Read elements from the ring buffer
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/// Return a tuple of the length read and the length remaining in the buffer
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/// If not all of the elements were read, then there will be some elements in the buffer remaining
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/// The length remaining is the capacity, ring_buf.len(), less the elements remaining after the read
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/// Error is returned if the portion to be read was overwritten by the DMA controller.
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pub fn read(&mut self, buf: &mut [W]) -> Result<(usize, usize), Error> {
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self.ringbuf.read(&mut DmaCtrlImpl(self.channel.reborrow()), buf)
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}
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/// Read an exact number of elements from the ringbuffer.
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///
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/// Returns the remaining number of elements available for immediate reading.
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/// Error is returned if the portion to be read was overwritten by the DMA controller.
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///
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/// Async/Wake Behavior:
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/// The underlying DMA peripheral only can wake us when its buffer pointer has reached the halfway point,
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/// and when it wraps around. This means that when called with a buffer of length 'M', when this
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/// ring buffer was created with a buffer of size 'N':
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/// - If M equals N/2 or N/2 divides evenly into M, this function will return every N/2 elements read on the DMA source.
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/// - Otherwise, this function may need up to N/2 extra elements to arrive before returning.
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pub async fn read_exact(&mut self, buffer: &mut [W]) -> Result<usize, Error> {
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self.ringbuf
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.read_exact(&mut DmaCtrlImpl(self.channel.reborrow()), buffer)
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.await
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}
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/// The current length of the ringbuffer
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pub fn len(&mut self) -> Result<usize, Error> {
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Ok(self.ringbuf.len(&mut DmaCtrlImpl(self.channel.reborrow()))?)
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}
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/// The capacity of the ringbuffer
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pub const fn capacity(&self) -> usize {
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self.ringbuf.cap()
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}
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/// Set a waker to be woken when at least one byte is received.
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pub fn set_waker(&mut self, waker: &Waker) {
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DmaCtrlImpl(self.channel.reborrow()).set_waker(waker);
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}
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/// Request the DMA to stop.
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/// The configuration for this channel will **not be preserved**. If you need to restart the transfer
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/// at a later point with the same configuration, see [`request_pause`](Self::request_pause) instead.
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///
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/// This doesn't immediately stop the transfer, you have to wait until [`is_running`](Self::is_running) returns false.
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pub fn request_stop(&mut self) {
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self.channel.request_stop()
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}
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/// Request the transfer to pause, keeping the existing configuration for this channel.
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/// To restart the transfer, call [`start`](Self::start) again.
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///
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/// This doesn't immediately stop the transfer, you have to wait until [`is_running`](Self::is_running) returns false.
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pub fn request_pause(&mut self) {
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self.channel.request_pause()
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}
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/// Return whether DMA is still running.
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///
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/// If this returns `false`, it can be because either the transfer finished, or
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/// it was requested to stop early with [`request_stop`](Self::request_stop).
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pub fn is_running(&mut self) -> bool {
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self.channel.is_running()
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}
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/// Stop the DMA transfer and await until the buffer is full.
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///
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/// This disables the DMA transfer's circular mode so that the transfer
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/// stops when the buffer is full.
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///
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/// This is designed to be used with streaming input data such as the
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/// I2S/SAI or ADC.
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///
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/// When using the UART, you probably want `request_stop()`.
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pub async fn stop(&mut self) {
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// wait until cr.susp reads as true
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poll_fn(|cx| {
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self.set_waker(cx.waker());
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self.channel.poll_stop()
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})
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.await
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}
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}
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impl<'a, W: Word> Drop for ReadableRingBuffer<'a, W> {
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fn drop(&mut self) {
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self.request_stop();
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while self.is_running() {}
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// "Subsequent reads and writes cannot be moved ahead of preceding reads."
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fence(Ordering::SeqCst);
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}
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}
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/// Ringbuffer for writing data using DMA circular mode.
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pub struct WritableRingBuffer<'a, W: Word> {
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channel: Peri<'a, AnyChannel>,
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ringbuf: WritableDmaRingBuffer<'a, W>,
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table: Table<2>,
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}
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impl<'a, W: Word> WritableRingBuffer<'a, W> {
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/// Create a new ring buffer.
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pub unsafe fn new(
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channel: Peri<'a, impl Channel>,
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request: Request,
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peri_addr: *mut W,
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buffer: &'a mut [W],
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_options: TransferOptions,
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) -> Self {
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let channel: Peri<'a, AnyChannel> = channel.into();
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// Buffer halves should be the same length.
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let half_len = buffer.len() / 2;
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assert_eq!(half_len * 2, buffer.len());
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let items = [
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LinearItem::new_write(request, &mut buffer[..half_len], peri_addr),
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LinearItem::new_write(request, &mut buffer[half_len..], peri_addr),
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];
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let table = Table::new(items);
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let this = Self {
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channel,
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ringbuf: WritableDmaRingBuffer::new(buffer),
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table,
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};
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this
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}
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/// Start the ring buffer operation.
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///
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/// You must call this after creating it for it to work.
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pub fn start(&mut self) {
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unsafe { self.channel.configure_linked_list(&self.table, Default::default()) };
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self.table.link(RunMode::Circular);
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self.channel.start();
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}
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/// Clear all data in the ring buffer.
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pub fn clear(&mut self) {
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self.ringbuf.reset(&mut DmaCtrlImpl(self.channel.reborrow()));
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}
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/// Write elements directly to the raw buffer.
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/// This can be used to fill the buffer before starting the DMA transfer.
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pub fn write_immediate(&mut self, buf: &[W]) -> Result<(usize, usize), Error> {
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self.ringbuf.write_immediate(buf)
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}
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/// Write elements from the ring buffer
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/// Return a tuple of the length written and the length remaining in the buffer
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pub fn write(&mut self, buf: &[W]) -> Result<(usize, usize), Error> {
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self.ringbuf.write(&mut DmaCtrlImpl(self.channel.reborrow()), buf)
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}
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/// Write an exact number of elements to the ringbuffer.
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pub async fn write_exact(&mut self, buffer: &[W]) -> Result<usize, Error> {
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// return self
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// .ringbuf
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// .write_exact(&mut DmaCtrlImpl(self.channel.reborrow()), buffer)
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// .await;
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let mut remaining_cap = 0;
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let mut written_len = 0;
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while written_len < buffer.len() {
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(written_len, remaining_cap) = self
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.ringbuf
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.write_half(&mut DmaCtrlImpl(self.channel.reborrow()), buffer)
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.await?;
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// info!("Written: {}/{}", written_len, buffer.len());
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}
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Ok(remaining_cap)
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}
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/// Wait for any ring buffer write error.
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pub async fn wait_write_error(&mut self) -> Result<usize, Error> {
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self.ringbuf
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.wait_write_error(&mut DmaCtrlImpl(self.channel.reborrow()))
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.await
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}
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/// The current length of the ringbuffer
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pub fn len(&mut self) -> Result<usize, Error> {
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Ok(self.ringbuf.len(&mut DmaCtrlImpl(self.channel.reborrow()))?)
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}
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/// The capacity of the ringbuffer
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pub const fn capacity(&self) -> usize {
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self.ringbuf.cap()
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}
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/// Set a waker to be woken when at least one byte is received.
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pub fn set_waker(&mut self, waker: &Waker) {
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DmaCtrlImpl(self.channel.reborrow()).set_waker(waker);
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}
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/// Request the DMA to stop.
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/// The configuration for this channel will **not be preserved**. If you need to restart the transfer
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/// at a later point with the same configuration, see [`request_pause`](Self::request_pause) instead.
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///
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/// This doesn't immediately stop the transfer, you have to wait until [`is_running`](Self::is_running) returns false.
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pub fn request_stop(&mut self) {
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self.channel.request_stop()
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}
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/// Request the transfer to pause, keeping the existing configuration for this channel.
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/// To restart the transfer, call [`start`](Self::start) again.
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///
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/// This doesn't immediately stop the transfer, you have to wait until [`is_running`](Self::is_running) returns false.
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pub fn request_pause(&mut self) {
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self.channel.request_pause()
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}
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/// Return whether DMA is still running.
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///
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/// If this returns `false`, it can be because either the transfer finished, or
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/// it was requested to stop early with [`request_stop`](Self::request_stop).
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pub fn is_running(&mut self) -> bool {
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self.channel.is_running()
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}
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/// Stop the DMA transfer and await until the buffer is full.
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///
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/// This disables the DMA transfer's circular mode so that the transfer
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/// stops when the buffer is full.
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///
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/// This is designed to be used with streaming input data such as the
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/// I2S/SAI or ADC.
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///
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/// When using the UART, you probably want `request_stop()`.
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pub async fn stop(&mut self) {
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// wait until cr.susp reads as true
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poll_fn(|cx| {
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self.set_waker(cx.waker());
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self.channel.poll_stop()
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})
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.await
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}
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}
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impl<'a, W: Word> Drop for WritableRingBuffer<'a, W> {
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fn drop(&mut self) {
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self.request_stop();
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while self.is_running() {}
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// "Subsequent reads and writes cannot be moved ahead of preceding reads."
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fence(Ordering::SeqCst);
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}
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}
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