Gabriel Smith 5a1be543ac stm32/adc/v3: allow DMA reads to loop through enabled channels ...

Tested on an STM32H533RE. Documentation of other chips has been
reviewed, but not extensively.

2025-08-22 14:56:19 -04:00

..

adc4.rs

derive Copy, Clone for adc config enums

2025-07-22 18:20:24 +02:00

c0.rs

derive Copy, Clone for adc config enums

2025-07-22 18:20:24 +02:00

f1.rs

stm32/adc: enable interrupt for stm32f1

2025-04-07 01:04:50 +02:00

f3_v1_1.rs

derive Copy, Clone for adc config enums

2025-07-22 18:20:24 +02:00

f3.rs

Remove Peripheral trait, rename PeripheralRef->Peri.

2025-03-27 15:18:06 +01:00

g4.rs

Removed reference to ADC3 for STM32G4x1 if the peripheral does not exist and added stm32g431kb to CI for testing

2025-07-17 13:55:09 +02:00

mod.rs

Adds ADC4 for WBA

2025-06-30 15:37:22 -05:00

ringbuffered_v2.rs

fixed n in set_sq to be indexed correctly

2025-05-29 23:06:01 +02:00

v1.rs

Added STM32 ADCv1 analog watchdog implementation

2025-06-26 21:07:12 -04:00

v2.rs

Remove Peripheral trait, rename PeripheralRef->Peri.

2025-03-27 15:18:06 +01:00

v3.rs

stm32/adc/v3: allow DMA reads to loop through enabled channels

2025-08-22 14:56:19 -04:00

v4.rs

derive Copy, Clone for adc config enums

2025-07-22 18:20:24 +02:00

watchdog_v1.rs

Added STM32 ADCv1 analog watchdog implementation

2025-06-26 21:07:12 -04:00