From 5415ee164bb3f4e178910420da42d1287b74e7df Mon Sep 17 00:00:00 2001 From: Jorge Aparicio Date: Mon, 8 Jan 2018 23:45:41 +0100 Subject: [PATCH] blocking I2C traits --- src/blocking/i2c.rs | 86 +++++++++++++++++++++++++++++++++++++++++++++ src/blocking/mod.rs | 1 + 2 files changed, 87 insertions(+) create mode 100644 src/blocking/i2c.rs diff --git a/src/blocking/i2c.rs b/src/blocking/i2c.rs new file mode 100644 index 0000000..7a8ea3f --- /dev/null +++ b/src/blocking/i2c.rs @@ -0,0 +1,86 @@ +//! Blocking I2C API + +/// Blocking read +pub trait Read { + /// Error type + type Error; + + /// Reads enough bytes from slave with `address` to fill `buffer` + /// + /// # I2C Events (contract) + /// + /// ``` text + /// Master: ST SAD+R MAK MAK ... NMAK SP + /// Slave: SAK B0 B1 ... BN + /// ``` + /// + /// Where + /// + /// - `ST` = start condition + /// - `SAD+R` = slave address with 8th bit set to 1 + /// - `SAK` = slave acknowledge + /// - `Bi` = ith byte of data + /// - `MAK` = master acknowledge + /// - `NMAK` = master no acknowledge + /// - `SP` = stop condition + fn read(&mut self, address: u8, buffer: &mut [u8]) -> Result<(), Self::Error>; +} + +/// Blocking write +pub trait Write { + /// Error type + type Error; + + /// Sends bytes to slave with address `addr` + /// + /// # I2C Events (contract) + /// + /// ``` text + /// Master: ST SAD+W B0 B1 ... BN SP + /// Slave: SAK SAK SAK ... SAK + /// ``` + /// + /// Where + /// + /// - `ST` = start condition + /// - `SAD+W` = slave address with 8th bit set to 0 + /// - `SAK` = slave acknowledge + /// - `Bi` = ith byte of data + /// - `SP` = stop condition + fn write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Self::Error>; +} + +/// Blocking write + read +pub trait WriteRead { + /// Error type + type Error; + + /// Sends bytes to slave with address `addr` and then reads enough bytes to fill `buffer` *in a + /// single transaction* + /// + /// # I2C Events (contract) + /// + /// ``` text + /// Master: ST SAD+W O0 O1 ... OM SR SAD+R MAK MAK ... NMAK SP + /// Slave: SAK SAK SAK ... SAK SAK I0 I1 ... IN + /// ``` + /// + /// Where + /// + /// - `ST` = start condition + /// - `SAD+W` = slave address with 8th bit set to 0 + /// - `SAK` = slave acknowledge + /// - `Oi` = ith outgoing byte of data + /// - `SR` = repeated start condition + /// - `SAD+R` = slave address with 8th bit set to 1 + /// - `Ii` = ith incoming byte of data + /// - `MAK` = master acknowledge + /// - `NMAK` = master no acknowledge + /// - `SP` = stop condition + fn write_read( + &mut self, + address: u8, + bytes: &[u8], + buffer: &mut [u8], + ) -> Result<(), Self::Error>; +} diff --git a/src/blocking/mod.rs b/src/blocking/mod.rs index 16d0900..dcbf6a0 100644 --- a/src/blocking/mod.rs +++ b/src/blocking/mod.rs @@ -1,3 +1,4 @@ //! Blocking API +pub mod i2c; pub mod spi;