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Merge #336
336: i2c: enforce all traits have the same Error type. r=therealprof a=Dirbaio Equivalent of #331 for i2c. Co-authored-by: Dario Nieuwenhuis <dirbaio@dirbaio.net>
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commit
baaaaa1d69
@ -21,6 +21,9 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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### Changed
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- `serial`: traits now enforce all impls on the same struct have the same `Error` type.
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### Changed
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- `i2c`: traits now enforce all impls on the same struct have the same `Error` type.
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## [v1.0.0-alpha.6] - 2021-11-19
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*** This is (also) an alpha release with breaking changes (sorry) ***
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70
src/i2c.rs
70
src/i2c.rs
@ -22,14 +22,13 @@
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//! Here is an example of an embedded-hal implementation of the `Write` trait
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//! for both modes:
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//! ```
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//! # use embedded_hal::i2c::{ErrorKind, SevenBitAddress, TenBitAddress, blocking::Write};
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//! # use embedded_hal::i2c::{ErrorKind, ErrorType, SevenBitAddress, TenBitAddress, blocking::Write};
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//! /// I2C0 hardware peripheral which supports both 7-bit and 10-bit addressing.
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//! pub struct I2c0;
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//!
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//! # impl ErrorType for I2c0 { type Error = ErrorKind; }
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//! impl Write<SevenBitAddress> for I2c0
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//! {
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//! # type Error = ErrorKind;
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//! #
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//! fn write(&mut self, addr: u8, output: &[u8]) -> Result<(), Self::Error> {
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//! // ...
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//! # Ok(())
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@ -38,8 +37,6 @@
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//!
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//! impl Write<TenBitAddress> for I2c0
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//! {
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//! # type Error = ErrorKind;
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//! #
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//! fn write(&mut self, addr: u16, output: &[u8]) -> Result<(), Self::Error> {
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//! // ...
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//! # Ok(())
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@ -184,6 +181,18 @@ impl core::fmt::Display for NoAcknowledgeSource {
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}
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}
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/// I2C error type trait
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///
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/// This just defines the error type, to be used by the other traits.
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pub trait ErrorType {
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/// Error type
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type Error: Error;
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}
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impl<T: ErrorType> ErrorType for &mut T {
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type Error = T::Error;
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}
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/// Address mode (7-bit / 10-bit)
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///
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/// Note: This trait is sealed and should not be implemented outside of this crate.
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@ -202,13 +211,10 @@ impl AddressMode for TenBitAddress {}
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/// Blocking I2C traits
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pub mod blocking {
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use super::{AddressMode, Error, SevenBitAddress};
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use super::{AddressMode, ErrorType, SevenBitAddress};
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/// Blocking read
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pub trait Read<A: AddressMode = SevenBitAddress> {
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/// Error type
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type Error: Error;
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pub trait Read<A: AddressMode = SevenBitAddress>: ErrorType {
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/// Reads enough bytes from slave with `address` to fill `buffer`
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///
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/// # I2C Events (contract)
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@ -231,18 +237,13 @@ pub mod blocking {
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}
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impl<A: AddressMode, T: Read<A>> Read<A> for &mut T {
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type Error = T::Error;
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fn read(&mut self, address: A, buffer: &mut [u8]) -> Result<(), Self::Error> {
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T::read(self, address, buffer)
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}
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}
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/// Blocking write
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pub trait Write<A: AddressMode = SevenBitAddress> {
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/// Error type
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type Error: Error;
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pub trait Write<A: AddressMode = SevenBitAddress>: ErrorType {
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/// Writes bytes to slave with address `address`
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///
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/// # I2C Events (contract)
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@ -263,18 +264,13 @@ pub mod blocking {
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}
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impl<A: AddressMode, T: Write<A>> Write<A> for &mut T {
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type Error = T::Error;
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fn write(&mut self, address: A, bytes: &[u8]) -> Result<(), Self::Error> {
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T::write(self, address, bytes)
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}
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}
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/// Blocking write (iterator version)
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pub trait WriteIter<A: AddressMode = SevenBitAddress> {
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/// Error type
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type Error: Error;
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pub trait WriteIter<A: AddressMode = SevenBitAddress>: ErrorType {
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/// Writes bytes to slave with address `address`
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///
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/// # I2C Events (contract)
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@ -286,8 +282,6 @@ pub mod blocking {
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}
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impl<A: AddressMode, T: WriteIter<A>> WriteIter<A> for &mut T {
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type Error = T::Error;
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fn write_iter<B>(&mut self, address: A, bytes: B) -> Result<(), Self::Error>
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where
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B: IntoIterator<Item = u8>,
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@ -297,10 +291,7 @@ pub mod blocking {
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}
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/// Blocking write + read
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pub trait WriteRead<A: AddressMode = SevenBitAddress> {
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/// Error type
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type Error: Error;
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pub trait WriteRead<A: AddressMode = SevenBitAddress>: ErrorType {
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/// Writes bytes to slave with address `address` and then reads enough bytes to fill `buffer` *in a
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/// single transaction*
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///
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@ -332,8 +323,6 @@ pub mod blocking {
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}
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impl<A: AddressMode, T: WriteRead<A>> WriteRead<A> for &mut T {
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type Error = T::Error;
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fn write_read(
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&mut self,
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address: A,
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@ -345,10 +334,7 @@ pub mod blocking {
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}
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/// Blocking write (iterator version) + read
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pub trait WriteIterRead<A: AddressMode = SevenBitAddress> {
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/// Error type
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type Error: Error;
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pub trait WriteIterRead<A: AddressMode = SevenBitAddress>: ErrorType {
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/// Writes bytes to slave with address `address` and then reads enough bytes to fill `buffer` *in a
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/// single transaction*
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///
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@ -366,8 +352,6 @@ pub mod blocking {
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}
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impl<A: AddressMode, T: WriteIterRead<A>> WriteIterRead<A> for &mut T {
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type Error = T::Error;
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fn write_iter_read<B>(
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&mut self,
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address: A,
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@ -395,10 +379,7 @@ pub mod blocking {
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/// Transactional I2C interface.
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///
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/// This allows combining operations within an I2C transaction.
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pub trait Transactional<A: AddressMode = SevenBitAddress> {
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/// Error type
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type Error: Error;
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pub trait Transactional<A: AddressMode = SevenBitAddress>: ErrorType {
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/// Execute the provided operations on the I2C bus.
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///
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/// Transaction contract:
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@ -420,8 +401,6 @@ pub mod blocking {
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}
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impl<A: AddressMode, T: Transactional<A>> Transactional<A> for &mut T {
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type Error = T::Error;
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fn exec<'a>(
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&mut self,
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address: A,
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@ -434,10 +413,7 @@ pub mod blocking {
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/// Transactional I2C interface (iterator version).
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///
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/// This allows combining operation within an I2C transaction.
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pub trait TransactionalIter<A: AddressMode = SevenBitAddress> {
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/// Error type
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type Error: Error;
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pub trait TransactionalIter<A: AddressMode = SevenBitAddress>: ErrorType {
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/// Execute the provided operations on the I2C bus (iterator version).
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///
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/// Transaction contract:
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@ -457,8 +433,6 @@ pub mod blocking {
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}
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impl<A: AddressMode, T: TransactionalIter<A>> TransactionalIter<A> for &mut T {
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type Error = T::Error;
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fn exec_iter<'a, O>(&mut self, address: A, operations: O) -> Result<(), Self::Error>
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where
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O: IntoIterator<Item = Operation<'a>>,
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