diff --git a/CHANGELOG.md b/CHANGELOG.md index fe8c48c..87bde65 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -15,6 +15,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/). ### Removed - `digital::blocking::IoPin` traits. +- `spi::blocking::ExclusiveDevice` and `spi::blocking::ExclusiveDeviceError`. These have been moved to a separate crate. ## [v1.0.0-alpha.8] - 2022-04-15 diff --git a/embedded-hal-bus/CHANGELOG.md b/embedded-hal-bus/CHANGELOG.md new file mode 100644 index 0000000..c07d965 --- /dev/null +++ b/embedded-hal-bus/CHANGELOG.md @@ -0,0 +1,8 @@ +# Change Log + +All notable changes to this project will be documented in this file. + +The format is based on [Keep a Changelog](http://keepachangelog.com/) +and this project adheres to [Semantic Versioning](http://semver.org/). + +## [Unreleased] diff --git a/embedded-hal-bus/Cargo.toml b/embedded-hal-bus/Cargo.toml new file mode 100644 index 0000000..02de941 --- /dev/null +++ b/embedded-hal-bus/Cargo.toml @@ -0,0 +1,17 @@ +[package] +authors = [ + "The Embedded HAL Team and Contributors ", +] +categories = ["embedded", "hardware-support", "no-std"] +description = "Bus/Device connection mechanisms for embedded-hal, a Hardware Abstraction Layer (HAL) for embedded systems" +documentation = "https://docs.rs/embedded-hal-bus" +edition = "2018" +keywords = ["hal", "IO"] +license = "MIT OR Apache-2.0" +name = "embedded-hal-bus" +readme = "README.md" +repository = "https://github.com/rust-embedded/embedded-hal" +version = "0.1.0-alpha.1" + +[dependencies] +embedded-hal = { version = "=1.0.0-alpha.8", path = ".." } diff --git a/embedded-hal-bus/LICENSE-APACHE b/embedded-hal-bus/LICENSE-APACHE new file mode 100644 index 0000000..16fe87b --- /dev/null +++ b/embedded-hal-bus/LICENSE-APACHE @@ -0,0 +1,201 @@ + Apache License + Version 2.0, January 2004 + http://www.apache.org/licenses/ + +TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION + +1. 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IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. diff --git a/embedded-hal-bus/README.md b/embedded-hal-bus/README.md new file mode 100644 index 0000000..2cc54fb --- /dev/null +++ b/embedded-hal-bus/README.md @@ -0,0 +1,60 @@ +[![crates.io](https://img.shields.io/crates/d/embedded-hal-bus.svg)](https://crates.io/crates/embedded-hal-bus) +[![crates.io](https://img.shields.io/crates/v/embedded-hal-bus.svg)](https://crates.io/crates/embedded-hal-bus) +[![Documentation](https://docs.rs/embedded-hal-bus/badge.svg)](https://docs.rs/embedded-hal-bus) + + +# `embedded-hal-bus` + +Bus/Device connection mechanisms for [`embedded-hal`], a Hardware Abstraction Layer (HAL) for embedded systems. + +It is possible to connect several peripherals to a bus like SPI or I2C. +To support this, `embedded-hal` provides the `SpiBus` and `SpiDevice` traits in the case of SPI, for example. + +`embedded-hal` trait implementations for microcontrollers should implement the `...Bus` traits. +However, device drivers should use the `...Device` traits, _not the `...Bus` traits_ if at all possible +in order to allow for sharing of the bus they are connected to. + +This crate provides mechanisms to connect a `...Bus` and a `...Device`. + +For further details on these traits, please consult the [`embedded-hal` documentation](https://docs.rs/embedded-hal). + +This project is developed and maintained by the [HAL team][team]. + +## [API reference] + +[API reference]: https://docs.rs/embedded-hal-bus + + + +## License + +Licensed under either of + +- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or + http://www.apache.org/licenses/LICENSE-2.0) +- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT) + +at your option. + +### Contribution + +Unless you explicitly state otherwise, any contribution intentionally submitted +for inclusion in the work by you, as defined in the Apache-2.0 license, shall be +dual licensed as above, without any additional terms or conditions. + +## Code of Conduct + +Contribution to this crate is organized under the terms of the [Rust Code of +Conduct][CoC], the maintainer of this crate, the [HAL team][team], promises +to intervene to uphold that code of conduct. + +[CoC]: ../CODE_OF_CONDUCT.md +[team]: https://github.com/rust-embedded/wg#the-hal-team +[`embedded-hal`]: https://crates.io/crates/embedded-hal \ No newline at end of file diff --git a/embedded-hal-bus/src/lib.rs b/embedded-hal-bus/src/lib.rs new file mode 100644 index 0000000..566e74b --- /dev/null +++ b/embedded-hal-bus/src/lib.rs @@ -0,0 +1,17 @@ +//! Bus/Device connection mechanisms for [`embedded-hal`], a Hardware Abstraction Layer (HAL) for embedded systems. +//! +//! It is possible to connect several peripherals to a bus like SPI or I2C. +//! To support this, `embedded-hal` provides the `SpiBus` and `SpiDevice` traits in the case of SPI, for example. +//! +//! `embedded-hal` trait implementations for microcontrollers should implement the `...Bus` traits. +//! However, device drivers should use the `...Device` traits, _not the `...Bus` traits_ if at all possible +//! in order to allow for sharing of the bus they are connected to. +//! +//! This crate provides mechanisms to connect a `...Bus` and a `...Device`. +//! +//! For further details on these traits, please consult the [`embedded-hal` documentation](https://docs.rs/embedded-hal). + +#![warn(missing_docs)] +#![no_std] + +pub mod spi; diff --git a/embedded-hal-bus/src/spi.rs b/embedded-hal-bus/src/spi.rs new file mode 100644 index 0000000..63007e6 --- /dev/null +++ b/embedded-hal-bus/src/spi.rs @@ -0,0 +1,86 @@ +//! SPI bus sharing mechanisms. + +/// SPI bus sharing with blocking traits +pub mod blocking { + use core::fmt::Debug; + use embedded_hal::{ + digital::blocking::OutputPin, + spi::{ + blocking::{SpiBusFlush, SpiDevice}, + Error, ErrorKind, ErrorType, + }, + }; + + /// Error type for [`ExclusiveDevice`] operations. + #[derive(Copy, Clone, Eq, PartialEq, Debug)] + pub enum ExclusiveDeviceError { + /// An inner SPI bus operation failed + Spi(BUS), + /// Asserting or deasserting CS failed + Cs(CS), + } + + impl Error for ExclusiveDeviceError + where + BUS: Error + Debug, + CS: Debug, + { + fn kind(&self) -> ErrorKind { + match self { + Self::Spi(e) => e.kind(), + Self::Cs(_) => ErrorKind::ChipSelectFault, + } + } + } + + /// [`SpiDevice`] implementation with exclusive access to the bus (not shared). + /// + /// This is the most straightforward way of obtaining an [`SpiDevice`] from an [`SpiBus`], + /// ideal for when no sharing is required (only one SPI device is present on the bus). + pub struct ExclusiveDevice { + bus: BUS, + cs: CS, + } + + impl ExclusiveDevice { + /// Create a new ExclusiveDevice + pub fn new(bus: BUS, cs: CS) -> Self { + Self { bus, cs } + } + } + + impl ErrorType for ExclusiveDevice + where + BUS: ErrorType, + CS: OutputPin, + { + type Error = ExclusiveDeviceError; + } + + impl SpiDevice for ExclusiveDevice + where + BUS: SpiBusFlush, + CS: OutputPin, + { + type Bus = BUS; + + fn transaction( + &mut self, + f: impl FnOnce(&mut Self::Bus) -> Result::Error>, + ) -> Result { + self.cs.set_low().map_err(ExclusiveDeviceError::Cs)?; + + let f_res = f(&mut self.bus); + + // On failure, it's important to still flush and deassert CS. + let flush_res = self.bus.flush(); + let cs_res = self.cs.set_high(); + + let f_res = f_res.map_err(ExclusiveDeviceError::Spi)?; + flush_res.map_err(ExclusiveDeviceError::Spi)?; + cs_res.map_err(ExclusiveDeviceError::Cs)?; + + Ok(f_res) + } + } +} diff --git a/src/spi/blocking.rs b/src/spi/blocking.rs index e974ee5..1aa08d2 100644 --- a/src/spi/blocking.rs +++ b/src/spi/blocking.rs @@ -167,11 +167,7 @@ //! for them to return before the bus is idle. For example, assuming SPI mode 0, the last bit is sampled on the first (rising) edge //! of SCK, at which point a method could return, but the second (falling) SCK edge still has to happen before the bus is idle. -use core::fmt::Debug; - -use crate::{digital::blocking::OutputPin, spi::ErrorType}; - -use super::{Error, ErrorKind}; +use crate::spi::ErrorType; /// SPI device trait /// @@ -350,76 +346,3 @@ impl, Word: Copy> SpiBus for &mut T { T::transfer_in_place(self, words) } } - -/// Error type for [`ExclusiveDevice`] operations. -#[derive(Copy, Clone, Eq, PartialEq, Debug)] -pub enum ExclusiveDeviceError { - /// An inner SPI bus operation failed - Spi(BUS), - /// Asserting or deasserting CS failed - Cs(CS), -} - -impl Error for ExclusiveDeviceError -where - BUS: Error + Debug, - CS: Debug, -{ - fn kind(&self) -> ErrorKind { - match self { - Self::Spi(e) => e.kind(), - Self::Cs(_) => ErrorKind::ChipSelectFault, - } - } -} - -/// [`SpiDevice`] implementation with exclusive access to the bus (not shared). -/// -/// This is the most straightforward way of obtaining an [`SpiDevice`] from an [`SpiBus`], -/// ideal for when no sharing is required (only one SPI device is present on the bus). -pub struct ExclusiveDevice { - bus: BUS, - cs: CS, -} - -impl ExclusiveDevice { - /// Create a new ExclusiveDevice - pub fn new(bus: BUS, cs: CS) -> Self { - Self { bus, cs } - } -} - -impl ErrorType for ExclusiveDevice -where - BUS: ErrorType, - CS: OutputPin, -{ - type Error = ExclusiveDeviceError; -} - -impl SpiDevice for ExclusiveDevice -where - BUS: SpiBusFlush, - CS: OutputPin, -{ - type Bus = BUS; - - fn transaction( - &mut self, - f: impl FnOnce(&mut Self::Bus) -> Result::Error>, - ) -> Result { - self.cs.set_low().map_err(ExclusiveDeviceError::Cs)?; - - let f_res = f(&mut self.bus); - - // On failure, it's important to still flush and deassert CS. - let flush_res = self.bus.flush(); - let cs_res = self.cs.set_high(); - - let f_res = f_res.map_err(ExclusiveDeviceError::Spi)?; - flush_res.map_err(ExclusiveDeviceError::Spi)?; - cs_res.map_err(ExclusiveDeviceError::Cs)?; - - Ok(f_res) - } -}