# ESP32-H2 Device Metadata
#
# Empty [`device.driver`] tables imply `partial` support status.
#
# If you modify a driver support status, run `cargo xtask update-metadata` to
# update the table in the esp-hal README.

[device]
name   = "esp32h2"
arch   = "riscv"
target = "riscv32imac-unknown-none-elf"
cores  = 1
trm    = "https://www.espressif.com/sites/default/files/documentation/esp32-h2_technical_reference_manual_en.pdf"

peripherals = [
    { name = "AES", interrupts = { peri = "AES" } },
    { name = "APB_SARADC" },
    { name = "ASSIST_DEBUG" },
    { name = "DMA" },
    { name = "DS" },
    { name = "ECC" },
    { name = "EFUSE" },
    { name = "GPIO" },
    { name = "GPIO_SD" },
    { name = "HMAC" },
    { name = "HP_APM" },
    { name = "HP_SYS" },
    { name = "I2C_ANA_MST" },
    { name = "I2C0", interrupts = { peri = "I2C_EXT0" } },
    { name = "I2C1", interrupts = { peri = "I2C_EXT1" } },
    { name = "I2S0", interrupts = { peri = "I2S0" } },
    { name = "IEEE802154" },
    { name = "INTERRUPT_CORE0" },
    { name = "INTPRI" },
    { name = "IO_MUX" },
    { name = "LEDC" },
    { name = "LPWR", pac = "LP_CLKRST" },
    { name = "LP_ANA" },
    { name = "LP_AON" },
    { name = "LP_APM" },
    { name = "LP_APM0" },
    { name = "LP_CLKRST" },
    { name = "LP_PERI" },
    { name = "LP_TIMER" },
    { name = "LP_WDT" },
    { name = "MCPWM0" },
    { name = "MEM_MONITOR" },
    { name = "MODEM_LPCON" },
    { name = "MODEM_SYSCON" },
    { name = "OTP_DEBUG" },
    { name = "PARL_IO", interrupts = { tx = "PARL_IO_TX", rx = "PARL_IO_RX" } },
    { name = "PAU" },
    { name = "PCNT" },
    { name = "PCR" },
    { name = "PLIC_MX" },
    { name = "PMU" },
    { name = "RMT" },
    { name = "RNG" },
    { name = "RSA", interrupts = { peri = "RSA" } },
    { name = "SHA", interrupts = { peri = "SHA" } },
    { name = "ETM", pac = "SOC_ETM" },
    { name = "SPI0" },
    { name = "SPI1" },
    { name = "SPI2", interrupts = { peri = "SPI2" } },
    { name = "SYSTEM", pac = "PCR" },
    { name = "SYSTIMER" },
    { name = "TEE" },
    { name = "TIMG0" },
    { name = "TIMG1" },
    { name = "TRACE0", pac = "TRACE" },
    { name = "TWAI0" },
    { name = "UART0", interrupts = { peri = "UART0" } },
    { name = "UART1", interrupts = { peri = "UART1" } },
    { name = "UHCI0" },
    { name = "USB_DEVICE", interrupts = { peri = "USB_DEVICE" } },

    { name = "DMA_CH0", virtual = true },
    { name = "DMA_CH1", virtual = true },
    { name = "DMA_CH2", virtual = true },

    { name = "ADC1", virtual = true },
    { name = "BT", virtual = true },
    { name = "FLASH", virtual = true },
    { name = "SW_INTERRUPT", virtual = true },
    { name = "MEM2MEM1", virtual = true },
    { name = "MEM2MEM4", virtual = true },
    { name = "MEM2MEM5", virtual = true },
    { name = "MEM2MEM10", virtual = true },
    { name = "MEM2MEM11", virtual = true },
    { name = "MEM2MEM12", virtual = true },
    { name = "MEM2MEM13", virtual = true },
    { name = "MEM2MEM14", virtual = true },
    { name = "MEM2MEM15", virtual = true },
]

symbols = [
    # Additional peripherals defined by us (the developers):
    "gdma",
    "plic",
    "phy",
    "swd",

    # ROM capabilities
    "rom_crc_le",
    "rom_crc_be",
    "rom_md5_bsd",
]

[device.soc]
cpu_has_csr_pc = true
cpu_has_prv_mode = true
rc_fast_clk_default = 8_500_000
rc_slow_clock = 136_000
xtal_options = [32]

memory_map = { ranges = [
    { name = "dram", start = 0x4080_0000, end = 0x4085_0000 },
    { name = "dram2_uninit", start = 0x4083_EFD0, end = 0x4084_FEE0 },
] }

clocks = { peripheral_clocks = { templates = [
    # templates
    { name = "default_clk_en_template", value = "{{control}}::regs().{{conf_register}}().modify(|_, w| w.{{clk_en_field}}().bit(enable));" },
    { name = "clk_en_template", value = "{{default_clk_en_template}}" }, # Indirection allows appending to the template for TWAI
    { name = "rst_template", value = "{{control}}::regs().{{conf_register}}().modify(|_, w| w.{{rst_field}}().bit(reset));" },
    # substitutions
    { name = "control", value = "crate::peripherals::SYSTEM" },
    { name = "conf_register", value = "{{peripheral}}_conf" },
    { name = "clk_en_field", value = "{{peripheral}}_clk_en" },
    { name = "rst_field", value = "{{peripheral}}_rst_en" },
    # {{peripheral}} is derived automatically (e.g. SpiDma -> spi_dma)
], peripheral_clocks = [
    # This list is based on TRM (v1.5) - 7.4.1 PCR Register Summary
    { name = "Uart0", template_params = { conf_register = "uart(0).conf", clk_en_field = "clk_en", rst_field = "rst_en" }, keep_enabled = true },
    { name = "Uart1", template_params = { conf_register = "uart(1).conf", clk_en_field = "clk_en", rst_field = "rst_en" } },
    { name = "I2cExt0", template_params = { peripheral = "i2c0" } },
    { name = "I2cExt1", template_params = { peripheral = "i2c1" } },
    { name = "Uhci0", template_params = { peripheral = "uhci" } },
    { name = "Rmt" },
    { name = "Ledc" },
    { name = "Timg0", template_params = { clk_en_template = "{{default_clk_en_template}} {{peri_clk_template}}", conf_register = "timergroup0_conf", peripheral = "tg0", peri_clk_template = "{{control}}::regs().timergroup0_timer_clk_conf().modify(|_, w| w.tg0_timer_clk_en().bit(enable));" }, keep_enabled = true }, # used for clock calibration
    { name = "Timg1", template_params = { clk_en_template = "{{default_clk_en_template}} {{peri_clk_template}}", conf_register = "timergroup1_conf", peripheral = "tg1", peri_clk_template = "{{control}}::regs().timergroup1_timer_clk_conf().modify(|_, w| w.tg1_timer_clk_en().bit(enable));" } },
    { name = "Systimer", keep_enabled = true },
    { name = "Twai0", template_params = { clk_en_template = "{{default_clk_en_template}} {{func_clk_template}}", func_clk_template = "{{control}}::regs().twai0_func_clk_conf().modify(|_, w| w.twai0_func_clk_en().bit(enable));" } },
    { name = "I2s0", template_params = { peripheral = "i2s" } },
    { name = "ApbSarAdc", template_params = { peripheral = "saradc", clk_en_field = "saradc_reg_clk_en", rst_field = "saradc_reg_rst_en" } },
    { name = "Tsens", template_params = { conf_register = "tsens_clk_conf" } },
    { name = "UsbDevice", keep_enabled = true },
    # { name = "Intmtx" },
    { name = "Pcnt" },
    { name = "Etm" },
    { name = "Mcpwm0", template_params = { peripheral = "pwm" } },
    { name = "ParlIo", template_params = { clk_en_field = "parl_clk_en", rst_field = "parl_rst_en" } },
    { name = "Dma", template_params = { peripheral = "gdma" } },
    { name = "Spi2" },
    { name = "Aes" },
    { name = "Sha" },
    { name = "Rsa" },
    { name = "Ecc" },
    { name = "Ds" },
    { name = "Hmac" },
    { name = "Ecdsa" },
    #{ name = "Iomux" },
    #{ name = "MemMonitor" },
    { name = "Trace0", template_params = { peripheral = "trace" } },
    #{ name = "Assist" },
    #{ name = "Cache" },
    #{ name = "ModemApb" },
    #{ name = "Timeout" },
    
    # Radio clocks not modeled here.
] } }

[device.adc]
support_status = "partial"
instances = [
    { name = "adc1" },
]

[device.aes]
support_status = "partial"
has_split_text_registers = true
endianness_configurable = false
dma = true
dma_mode = ["ECB", "CBC", "OFB", "CTR", "CFB8", "CFB128"]
key_length = { options = [
    { bits = 128, encrypt_mode = 0, decrypt_mode = 4 },
    { bits = 256, encrypt_mode = 2, decrypt_mode = 6 }
] }

[device.assist_debug]
support_status = "partial"
has_sp_monitor = true
has_region_monitor = true

[device.gpio]
support_status = "supported"
gpio_function = 1
constant_0_input = 0x3c
constant_1_input = 0x38
pins = [
    { pin =  0, functions = {             2 = "FSPIQ"   } },
    { pin =  1, functions = {             2 = "FSPICS0" }, analog = { 1 = "ADC1_CH0" } },
    { pin =  2, functions = { 0 = "MTMS", 2 = "FSPIWP"  }, analog = { 1 = "ADC1_CH1" } },
    { pin =  3, functions = { 0 = "MTDI", 2 = "FSPIHD"  }, analog = { 1 = "ADC1_CH2" } },
    { pin =  4, functions = { 0 = "MTCK", 2 = "FSPICLK" }, analog = { 1 = "ADC1_CH3" } },
    { pin =  5, functions = { 0 = "MTDO", 2 = "FSPID"   }, analog = { 1 = "ADC1_CH4" } },
    { pin =  8 },
    { pin =  9 },
    { pin = 10, analog = { 0 = "ZCD0" } },
    { pin = 11, analog = { 0 = "ZCD1" } },
    { pin = 12 },
    { pin = 13, analog = { 0 = "XTAL_32K_P" } },
    { pin = 14, analog = { 0 = "XTAL_32K_N" } },
    { pin = 22 },
    { pin = 23, functions = { 0 = "U0RXD", 2 = "FSPICS1" } },
    { pin = 24, functions = { 0 = "U0TXD", 2 = "FSPICS2" } },
    { pin = 25, functions = {              2 = "FSPICS3" } },
    { pin = 26, functions = {              2 = "FSPICS4" }, analog = { 0 = "USB_DM" } },
    { pin = 27, functions = {              2 = "FSPICS5" }, analog = { 0 = "USB_DP" } },
]
input_signals = [
    { name = "EXT_ADC_START",       id = 0 },
    { name = "U0RXD",               id = 6 },
    { name = "U0CTS",               id = 7 },
    { name = "U0DSR",               id = 8 },
    { name = "U1RXD",               id = 9 },
    { name = "U1CTS",               id = 10 },
    { name = "U1DSR",               id = 11 },
    { name = "I2S_MCLK",            id = 12 },
    { name = "I2SO_BCK",            id = 13 },
    { name = "I2SO_WS",             id = 14 },
    { name = "I2SI_SD",             id = 15 },
    { name = "I2SI_BCK",            id = 16 },
    { name = "I2SI_WS",             id = 17 },
    { name = "USB_JTAG_TDO_BRIDGE", id = 19 },
    { name = "CPU_GPIO0",           id = 28 },
    { name = "CPU_GPIO1",           id = 29 },
    { name = "CPU_GPIO2",           id = 30 },
    { name = "CPU_GPIO3",           id = 31 },
    { name = "CPU_GPIO4",           id = 32 },
    { name = "CPU_GPIO5",           id = 33 },
    { name = "CPU_GPIO6",           id = 34 },
    { name = "CPU_GPIO7",           id = 35 },
    { name = "I2CEXT0_SCL",         id = 45 },
    { name = "I2CEXT0_SDA",         id = 46 },
    { name = "PARL_RX_DATA0",       id = 47 },
    { name = "PARL_RX_DATA1",       id = 48 },
    { name = "PARL_RX_DATA2",       id = 49 },
    { name = "PARL_RX_DATA3",       id = 50 },
    { name = "PARL_RX_DATA4",       id = 51 },
    { name = "PARL_RX_DATA5",       id = 52 },
    { name = "PARL_RX_DATA6",       id = 53 },
    { name = "PARL_RX_DATA7",       id = 54 },
    { name = "I2CEXT1_SCL",         id = 55 },
    { name = "I2CEXT1_SDA",         id = 56 },
    { name = "FSPICLK",             id = 63 },
    { name = "FSPIQ",               id = 64 },
    { name = "FSPID",               id = 65 },
    { name = "FSPIHD",              id = 66 },
    { name = "FSPIWP",              id = 67 },
    { name = "FSPICS0",             id = 68 },
    { name = "PARL_RX_CLK",         id = 69 },
    { name = "PARL_TX_CLK",         id = 70 },
    { name = "RMT_SIG_0",           id = 71 },
    { name = "RMT_SIG_1",           id = 72 },
    { name = "TWAI0_RX",            id = 73 },
    { name = "PWM0_SYNC0",          id = 87 },
    { name = "PWM0_SYNC1",          id = 88 },
    { name = "PWM0_SYNC2",          id = 89 },
    { name = "PWM0_F0",             id = 90 },
    { name = "PWM0_F1",             id = 91 },
    { name = "PWM0_F2",             id = 92 },
    { name = "PWM0_CAP0",           id = 93 },
    { name = "PWM0_CAP1",           id = 94 },
    { name = "PWM0_CAP2",           id = 95 },
    { name = "SIG_FUNC_97",         id = 97 },
    { name = "SIG_FUNC_98",         id = 98 },
    { name = "SIG_FUNC_99",         id = 99 },
    { name = "SIG_FUNC_100",        id = 100 },
    { name = "PCNT0_SIG_CH0",       id = 101 },
    { name = "PCNT0_SIG_CH1",       id = 102 },
    { name = "PCNT0_CTRL_CH0",      id = 103 },
    { name = "PCNT0_CTRL_CH1",      id = 104 },
    { name = "PCNT1_SIG_CH0",       id = 105 },
    { name = "PCNT1_SIG_CH1",       id = 106 },
    { name = "PCNT1_CTRL_CH0",      id = 107 },
    { name = "PCNT1_CTRL_CH1",      id = 108 },
    { name = "PCNT2_SIG_CH0",       id = 109 },
    { name = "PCNT2_SIG_CH1",       id = 110 },
    { name = "PCNT2_CTRL_CH0",      id = 111 },
    { name = "PCNT2_CTRL_CH1",      id = 112 },
    { name = "PCNT3_SIG_CH0",       id = 113 },
    { name = "PCNT3_SIG_CH1",       id = 114 },
    { name = "PCNT3_CTRL_CH0",      id = 115 },
    { name = "PCNT3_CTRL_CH1",      id = 116 },
    { name = "SPIQ",                id = 121 },
    { name = "SPID",                id = 122 },
    { name = "SPIHD",               id = 123 },
    { name = "SPIWP",               id = 124 },

    { name = "MTDI" },
    { name = "MTCK" },
    { name = "MTMS" },
]
output_signals = [
    { name = "LEDC_LS_SIG0",     id = 0 },
    { name = "LEDC_LS_SIG1",     id = 1 },
    { name = "LEDC_LS_SIG2",     id = 2 },
    { name = "LEDC_LS_SIG3",     id = 3 },
    { name = "LEDC_LS_SIG4",     id = 4 },
    { name = "LEDC_LS_SIG5",     id = 5 },
    { name = "U0TXD",            id = 6 },
    { name = "U0RTS",            id = 7 },
    { name = "U0DTR",            id = 8 },
    { name = "U1TXD",            id = 9 },
    { name = "U1RTS",            id = 10 },
    { name = "U1DTR",            id = 11 },
    { name = "I2S_MCLK",         id = 12 },
    { name = "I2SO_BCK",         id = 13 },
    { name = "I2SO_WS",          id = 14 },
    { name = "I2SO_SD",          id = 15 },
    { name = "I2SI_BCK",         id = 16 },
    { name = "I2SI_WS",          id = 17 },
    { name = "I2SO_SD1",         id = 18 },
    { name = "USB_JTAG_TRST",    id = 19 },
    { name = "CPU_GPIO_OUT0",    id = 28 },
    { name = "CPU_GPIO_OUT1",    id = 29 },
    { name = "CPU_GPIO_OUT2",    id = 30 },
    { name = "CPU_GPIO_OUT3",    id = 31 },
    { name = "CPU_GPIO_OUT4",    id = 32 },
    { name = "CPU_GPIO_OUT5",    id = 33 },
    { name = "CPU_GPIO_OUT6",    id = 34 },
    { name = "CPU_GPIO_OUT7",    id = 35 },
    { name = "I2CEXT0_SCL",      id = 45 },
    { name = "I2CEXT0_SDA",      id = 46 },
    { name = "PARL_TX_DATA0",    id = 47 },
    { name = "PARL_TX_DATA1",    id = 48 },
    { name = "PARL_TX_DATA2",    id = 49 },
    { name = "PARL_TX_DATA3",    id = 50 },
    { name = "PARL_TX_DATA4",    id = 51 },
    { name = "PARL_TX_DATA5",    id = 52 },
    { name = "PARL_TX_DATA6",    id = 53 },
    { name = "PARL_TX_DATA7",    id = 54 },
    { name = "I2CEXT1_SCL",      id = 55 },
    { name = "I2CEXT1_SDA",      id = 56 },
    { name = "FSPICLK",          id = 63 },
    { name = "FSPIQ",            id = 64 },
    { name = "FSPID",            id = 65 },
    { name = "FSPIHD",           id = 66 },
    { name = "FSPIWP",           id = 67 },
    { name = "FSPICS0",          id = 68 },
    { name = "PARL_RX_CLK",      id = 69 },
    { name = "PARL_TX_CLK",      id = 70 },
    { name = "RMT_SIG_0",        id = 71 },
    { name = "RMT_SIG_1",        id = 72 },
    { name = "TWAI0_TX",         id = 73 },
    { name = "TWAI0_BUS_OFF_ON", id = 74 },
    { name = "TWAI0_CLKOUT",     id = 75 },
    { name = "TWAI0_STANDBY",    id = 76 },
    { name = "CTE_ANT7",         id = 78 },
    { name = "CTE_ANT8",         id = 79 },
    { name = "CTE_ANT9",         id = 80 },
    { name = "GPIO_SD0",         id = 83 },
    { name = "GPIO_SD1",         id = 84 },
    { name = "GPIO_SD2",         id = 85 },
    { name = "GPIO_SD3",         id = 86 },
    { name = "PWM0_0A",          id = 87 },
    { name = "PWM0_0B",          id = 88 },
    { name = "PWM0_1A",          id = 89 },
    { name = "PWM0_1B",          id = 90 },
    { name = "PWM0_2A",          id = 91 },
    { name = "PWM0_2B",          id = 92 },
    { name = "SIG_IN_FUNC97",    id = 97 },
    { name = "SIG_IN_FUNC98",    id = 98 },
    { name = "SIG_IN_FUNC99",    id = 99 },
    { name = "SIG_IN_FUNC100",   id = 100 },
    { name = "FSPICS1",          id = 101 },
    { name = "FSPICS2",          id = 102 },
    { name = "FSPICS3",          id = 103 },
    { name = "FSPICS4",          id = 104 },
    { name = "FSPICS5",          id = 105 },
    { name = "CTE_ANT10",        id = 106 },
    { name = "CTE_ANT11",        id = 107 },
    { name = "CTE_ANT12",        id = 108 },
    { name = "CTE_ANT13",        id = 109 },
    { name = "CTE_ANT14",        id = 110 },
    { name = "CTE_ANT15",        id = 111 },
    { name = "SPICLK",           id = 114 },
    { name = "SPICS0",           id = 115 },
    { name = "SPICS1",           id = 116 },
    { name = "SPIQ",             id = 121 },
    { name = "SPID",             id = 122 },
    { name = "SPIHD",            id = 123 },
    { name = "SPIWP",            id = 124 },
    { name = "CLK_OUT_OUT1",     id = 125 },
    { name = "CLK_OUT_OUT2",     id = 126 },
    { name = "CLK_OUT_OUT3",     id = 127 },
    { name = "GPIO",             id = 128 },

    { name = "MTDO" }
]

[device.i2c_master]
support_status = "supported"
instances = [
    { name = "i2c0", sys_instance = "I2cExt0", scl = "I2CEXT0_SCL", sda = "I2CEXT0_SDA" },
    { name = "i2c1", sys_instance = "I2cExt1", scl = "I2CEXT1_SCL", sda = "I2CEXT1_SDA" },
]
has_fsm_timeouts = true
has_hw_bus_clear = true
ll_intr_mask = 0x3ffff
fifo_size = 32
has_bus_timeout_enable = true
max_bus_timeout = 0x1F
can_estimate_nack_reason = true
has_conf_update = true
has_reliable_fsm_reset = true
has_arbitration_en = true
has_tx_fifo_watermark = true
bus_timeout_is_exponential = true

[device.i2c_slave]
support_status = "not_supported"

[device.interrupts]
support_status = "partial"
status_registers = 2

[device.rmt]
support_status = "partial"
ram_start = 0x60007400
channel_ram_size = 48
channels = ["Tx", "Tx", "Rx", "Rx"]
has_tx_immediate_stop = true
has_tx_loop_count = true
has_tx_loop_auto_stop = true
has_tx_carrier_data_only = true
has_tx_sync = true
has_rx_wrap = true
has_rx_demodulation = true
clock_sources.supported = ["Xtal", "RcFast" ]
# Power-on value is RcFast!
clock_sources.default = "Xtal"

[device.rsa]
support_status = "partial"
size_increment = 32
memory_size_bytes = 384

[device.sha]
support_status = "partial"
dma = true
algo = { sha1 = 0, sha224 = 1, sha256 = 2 }

[device.spi_master]
support_status = "supported"
instances = [
    { name = "spi2", sys_instance = "Spi2", sclk = "FSPICLK", sio = ["FSPID", "FSPIQ", "FSPIWP", "FSPIHD"], cs = ["FSPICS0", "FSPICS1", "FSPICS2", "FSPICS3", "FSPICS4", "FSPICS5"] },
]

[device.spi_slave]
support_status = "partial"
instances = [
    { name = "spi2", sys_instance = "Spi2", sclk = "FSPICLK",  mosi = "FSPID",  miso = "FSPIQ",  cs = "FSPICS0" },
]

[device.timergroup]
support_status = "partial"
instances = [{ name = "timg0" }, { name = "timg1" }]
timg_has_divcnt_rst = true
default_clock_source = 2
default_wdt_clock_source = 2

[device.uart]
support_status = "supported"
instances = [
    { name = "uart0", sys_instance = "Uart0", tx = "U0TXD", rx = "U0RXD", cts = "U0CTS", rts = "U0RTS" },
    { name = "uart1", sys_instance = "Uart1", tx = "U1TXD", rx = "U1RXD", cts = "U1CTS", rts = "U1RTS" },
]
ram_size = 128
peripheral_controls_mem_clk = true

[device.ds]
support_status = "not_supported"

[device.rng]
support_status = "partial"
apb_cycle_wait_num = 16 # TODO

# Other drivers which are partially supported but have no other configuration:

## Crypto
[device.ecc]
[device.hmac]

## Interfaces
[device.i2s]
[device.ledc]
[device.mcpwm]
[device.parl_io]
[device.pcnt]
[device.twai]
[device.usb_serial_jtag]

## Miscellaneous
[device.dma]
[device.etm]
[device.io_mux]
[device.sleep]
[device.systimer]
[device.temp_sensor]

## Radio
[device.bt]
support_status = "partial"
controller = "npl"

[device.ieee802154]

[device.phy]
