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ensure we don't strongly define cpu int handlers (#1324)

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Scott Mabin 2024-03-21 13:46:49 +00:00 committed by GitHub
parent 2cc7a8ccbd
commit 1444b62777
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2 changed files with 31 additions and 64 deletions
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62
esp-hal/ld/riscv/hal-defaults.x
View File

@ -1,35 +1,35 @@
PROVIDE(DefaultHandler = EspDefaultHandler);
PROVIDE(interrupt1 = DefaultHandler);
PROVIDE(interrupt2 = DefaultHandler);
PROVIDE(interrupt3 = DefaultHandler);
PROVIDE(interrupt4 = DefaultHandler);
PROVIDE(interrupt5 = DefaultHandler);
PROVIDE(interrupt6 = DefaultHandler);
PROVIDE(interrupt7 = DefaultHandler);
PROVIDE(interrupt8 = DefaultHandler);
PROVIDE(interrupt9 = DefaultHandler);
PROVIDE(interrupt10 = DefaultHandler);
PROVIDE(interrupt11 = DefaultHandler);
PROVIDE(interrupt12 = DefaultHandler);
PROVIDE(interrupt13 = DefaultHandler);
PROVIDE(interrupt14 = DefaultHandler);
PROVIDE(interrupt15 = DefaultHandler);
PROVIDE(interrupt16 = DefaultHandler);
PROVIDE(interrupt17 = DefaultHandler);
PROVIDE(interrupt18 = DefaultHandler);
PROVIDE(interrupt19 = DefaultHandler);
PROVIDE(interrupt20 = DefaultHandler);
PROVIDE(interrupt21 = DefaultHandler);
PROVIDE(interrupt22 = DefaultHandler);
PROVIDE(interrupt23 = DefaultHandler);
PROVIDE(interrupt24 = DefaultHandler);
PROVIDE(interrupt25 = DefaultHandler);
PROVIDE(interrupt26 = DefaultHandler);
PROVIDE(interrupt27 = DefaultHandler);
PROVIDE(interrupt28 = DefaultHandler);
PROVIDE(interrupt29 = DefaultHandler);
PROVIDE(interrupt30 = DefaultHandler);
PROVIDE(interrupt31 = DefaultHandler);
PROVIDE(cpu_int_1_handler = DefaultHandler);
PROVIDE(cpu_int_2_handler = DefaultHandler);
PROVIDE(cpu_int_3_handler = DefaultHandler);
PROVIDE(cpu_int_4_handler = DefaultHandler);
PROVIDE(cpu_int_5_handler = DefaultHandler);
PROVIDE(cpu_int_6_handler = DefaultHandler);
PROVIDE(cpu_int_7_handler = DefaultHandler);
PROVIDE(cpu_int_8_handler = DefaultHandler);
PROVIDE(cpu_int_9_handler = DefaultHandler);
PROVIDE(cpu_int_10_handler = DefaultHandler);
PROVIDE(cpu_int_11_handler = DefaultHandler);
PROVIDE(cpu_int_12_handler = DefaultHandler);
PROVIDE(cpu_int_13_handler = DefaultHandler);
PROVIDE(cpu_int_14_handler = DefaultHandler);
PROVIDE(cpu_int_15_handler = DefaultHandler);
PROVIDE(cpu_int_16_handler = DefaultHandler);
PROVIDE(cpu_int_17_handler = DefaultHandler);
PROVIDE(cpu_int_18_handler = DefaultHandler);
PROVIDE(cpu_int_19_handler = DefaultHandler);
PROVIDE(cpu_int_20_handler = DefaultHandler);
PROVIDE(cpu_int_21_handler = DefaultHandler);
PROVIDE(cpu_int_22_handler = DefaultHandler);
PROVIDE(cpu_int_23_handler = DefaultHandler);
PROVIDE(cpu_int_24_handler = DefaultHandler);
PROVIDE(cpu_int_25_handler = DefaultHandler);
PROVIDE(cpu_int_26_handler = DefaultHandler);
PROVIDE(cpu_int_27_handler = DefaultHandler);
PROVIDE(cpu_int_28_handler = DefaultHandler);
PROVIDE(cpu_int_29_handler = DefaultHandler);
PROVIDE(cpu_int_30_handler = DefaultHandler);
PROVIDE(cpu_int_31_handler = DefaultHandler);
INCLUDE "device.x"

33
esp-riscv-rt/src/lib.rs
View File

@ -860,38 +860,5 @@ r#"
.weak cpu_int_29_handler
.weak cpu_int_30_handler
.weak cpu_int_31_handler
cpu_int_1_handler:
cpu_int_2_handler:
cpu_int_3_handler:
cpu_int_4_handler:
cpu_int_5_handler:
cpu_int_6_handler:
cpu_int_7_handler:
cpu_int_8_handler:
cpu_int_9_handler:
cpu_int_10_handler:
cpu_int_11_handler:
cpu_int_12_handler:
cpu_int_13_handler:
cpu_int_14_handler:
cpu_int_15_handler:
cpu_int_16_handler:
cpu_int_17_handler:
cpu_int_18_handler:
cpu_int_19_handler:
cpu_int_20_handler:
cpu_int_21_handler:
cpu_int_22_handler:
cpu_int_23_handler:
cpu_int_24_handler:
cpu_int_25_handler:
cpu_int_26_handler:
cpu_int_27_handler:
cpu_int_28_handler:
cpu_int_29_handler:
cpu_int_30_handler:
cpu_int_31_handler:
la ra, abort #abort since proper handler is not defined, this could also just load the default _start_trap_rust_hal address and let the hal handle it.
jr ra
"#,
}