mirror of
https://github.com/esp-rs/esp-hal.git
synced 2025-09-30 05:40:39 +00:00
Update all examples to reflect changes to Timer
API
This commit is contained in:
parent
eb8555572b
commit
178a05522d
@ -19,7 +19,7 @@ fn main() -> ! {
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let system = peripherals.DPORT.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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// Disable MWDT and RWDT (Watchdog) flash boot protection
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@ -32,7 +32,7 @@ fn main() -> ! {
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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// Disable the TIMG watchdog timer.
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let serial0 = Serial::new(peripherals.UART0).unwrap();
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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@ -41,7 +41,7 @@ fn main() -> ! {
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
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// Disable MWDT and RWDT (Watchdog) flash boot protection
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@ -3,7 +3,7 @@
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use core::fmt::Write;
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use esp32_hal::{pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
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use esp32_hal::{clock::ClockControl, pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
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use nb::block;
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use panic_halt as _;
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use xtensa_lx_rt::entry;
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@ -11,8 +11,10 @@ use xtensa_lx_rt::entry;
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.DPORT.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut serial0 = Serial::new(peripherals.UART0).unwrap();
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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@ -20,7 +22,7 @@ fn main() -> ! {
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timer0.disable();
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rtc_cntl.set_wdt_global_enable(false);
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timer0.start(10_000_000u64);
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timer0.start(1u64.secs());
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loop {
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writeln!(serial0, "Hello world!").unwrap();
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@ -42,7 +42,7 @@ fn main() -> ! {
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let mut system = peripherals.DPORT.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut serial0 = Serial::new(peripherals.UART0).unwrap();
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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@ -67,7 +67,7 @@ fn main() -> ! {
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.unwrap();
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// Start timer (5 second interval)
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timer0.start(50_000_000u64);
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timer0.start(5u64.secs());
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writeln!(serial0, "Starting timer!").unwrap();
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@ -4,6 +4,7 @@
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use core::fmt::Write;
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use esp32_hal::{
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clock::ClockControl,
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pac::{Peripherals, UART0},
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prelude::*,
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ram,
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@ -26,8 +27,10 @@ static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8];
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.DPORT.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut serial0 = Serial::new(peripherals.UART0).unwrap();
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// Disable MWDT flash boot protection
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@ -35,7 +38,7 @@ fn main() -> ! {
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// The RWDT flash boot protection remains enabled and it being triggered is part
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// of the example
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timer0.start(10_000_000u64);
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timer0.start(1u64.secs());
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writeln!(
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serial0,
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@ -3,15 +3,25 @@
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use core::fmt::Write;
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use esp32_hal::{efuse::Efuse, pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
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use esp32_hal::{
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clock::ClockControl,
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efuse::Efuse,
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pac::Peripherals,
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prelude::*,
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RtcCntl,
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Serial,
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Timer,
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};
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use panic_halt as _;
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use xtensa_lx_rt::entry;
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.DPORT.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut serial0 = Serial::new(peripherals.UART0).unwrap();
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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@ -41,7 +41,7 @@ fn main() -> ! {
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// Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT,
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// the RTC WDT, and the TIMG WDTs.
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut serial0 = Serial::new(peripherals.UART0).unwrap();
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timer0.disable();
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@ -4,6 +4,7 @@
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use core::{cell::RefCell, fmt::Write};
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use esp32_hal::{
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clock::ClockControl,
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interrupt,
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pac::{self, Peripherals, TIMG0, TIMG1, UART0},
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prelude::*,
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@ -26,10 +27,12 @@ static mut TIMER1: SpinLockMutex<RefCell<Option<Timer<TIMG1>>>> =
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.DPORT.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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// Disable the TIMG watchdog timer.
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer1 = Timer::new(peripherals.TIMG1);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
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let serial0 = Serial::new(peripherals.UART0).unwrap();
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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@ -43,7 +46,7 @@ fn main() -> ! {
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pac::Interrupt::TG0_T0_LEVEL,
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interrupt::CpuInterrupt::Interrupt20LevelPriority2,
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);
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timer0.start(50_000_000u64);
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timer0.start(500u64.millis());
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timer0.listen();
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interrupt::enable(
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@ -51,7 +54,7 @@ fn main() -> ! {
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pac::Interrupt::TG1_T0_LEVEL,
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interrupt::CpuInterrupt::Interrupt23LevelPriority3,
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);
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timer1.start(100_000_000u64);
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timer1.start(1u64.secs());
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timer1.listen();
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unsafe {
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@ -89,7 +92,7 @@ pub fn level2_interrupt() {
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let mut timer0 = data.borrow_mut();
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let timer0 = timer0.as_mut().unwrap();
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timer0.clear_interrupt();
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timer0.start(50_000_000u64);
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timer0.start(500u64.millis());
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});
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}
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}
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@ -114,7 +117,7 @@ pub fn level3_interrupt() {
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let mut timer1 = data.borrow_mut();
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let timer1 = timer1.as_mut().unwrap();
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timer1.clear_interrupt();
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timer1.start(100_000_000u64);
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timer1.start(1u64.secs());
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});
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}
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}
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@ -23,8 +23,8 @@ fn main() -> ! {
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// Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT,
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// the RTC WDT, and the TIMG WDTs.
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer1 = Timer::new(peripherals.TIMG1);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
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rtc_cntl.set_super_wdt_enable(false);
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rtc_cntl.set_wdt_enable(false);
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@ -32,8 +32,8 @@ fn main() -> ! {
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// Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT,
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// the RTC WDT, and the TIMG WDTs.
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer1 = Timer::new(peripherals.TIMG1);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
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let serial0 = Serial::new(peripherals.UART0).unwrap();
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rtc_cntl.set_super_wdt_enable(false);
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@ -40,7 +40,7 @@ fn main() -> ! {
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
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// Disable watchdogs
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@ -3,7 +3,7 @@
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use core::fmt::Write;
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use esp32c3_hal::{pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
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use esp32c3_hal::{clock::ClockControl, pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
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use nb::block;
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use panic_halt as _;
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use riscv_rt::entry;
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@ -11,11 +11,13 @@ use riscv_rt::entry;
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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let mut serial0 = Serial::new(peripherals.UART0).unwrap();
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer1 = Timer::new(peripherals.TIMG1);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
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// Disable watchdog timers
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rtc_cntl.set_super_wdt_enable(false);
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@ -23,7 +25,7 @@ fn main() -> ! {
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timer0.disable();
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timer1.disable();
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timer0.start(10_000_000u64);
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timer0.start(1u64.secs());
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loop {
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writeln!(serial0, "Hello world!").unwrap();
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@ -40,8 +40,8 @@ fn main() -> ! {
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer1 = Timer::new(peripherals.TIMG1);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
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// Disable watchdog timers
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rtc_cntl.set_super_wdt_enable(false);
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@ -64,7 +64,7 @@ fn main() -> ! {
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.unwrap();
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// Start timer (5 second interval)
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timer0.start(50_000_000u64);
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timer0.start(5u64.secs());
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// Initialize display
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let interface = I2CDisplayInterface::new(i2c);
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@ -4,7 +4,8 @@
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use core::fmt::Write;
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use esp32c3_hal::{
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pac::{self, UART0},
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clock::ClockControl,
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pac::{Peripherals, UART0},
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prelude::*,
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ram,
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Serial,
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@ -25,8 +26,11 @@ static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8];
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#[entry]
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fn main() -> ! {
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let peripherals = pac::Peripherals::take().unwrap();
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut serial0 = Serial::new(peripherals.UART0).unwrap();
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// Disable MWDT flash boot protection
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@ -34,7 +38,7 @@ fn main() -> ! {
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// The RWDT flash boot protection remains enabled and it being triggered is part
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// of the example
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timer0.start(10_000_000u64);
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timer0.start(1u64.secs());
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writeln!(
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serial0,
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@ -3,18 +3,28 @@
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use core::fmt::Write;
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use esp32c3_hal::{efuse::Efuse, pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
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use esp32c3_hal::{
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clock::ClockControl,
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efuse::Efuse,
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pac::Peripherals,
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prelude::*,
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RtcCntl,
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Serial,
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Timer,
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};
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use panic_halt as _;
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use riscv_rt::entry;
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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let mut serial0 = Serial::new(peripherals.UART0).unwrap();
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer1 = Timer::new(peripherals.TIMG1);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
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// Disable watchdog timers
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rtc_cntl.set_super_wdt_enable(false);
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@ -41,8 +41,8 @@ fn main() -> ! {
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// Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT,
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// the RTC WDT, and the TIMG WDTs.
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer1 = Timer::new(peripherals.TIMG1);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
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let mut serial0 = Serial::new(peripherals.UART0).unwrap();
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rtc_cntl.set_super_wdt_enable(false);
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@ -5,6 +5,7 @@ use core::{cell::RefCell, fmt::Write};
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use bare_metal::Mutex;
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use esp32c3_hal::{
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clock::ClockControl,
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interrupt,
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pac::{self, Peripherals, UART0},
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prelude::*,
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@ -25,12 +26,14 @@ static mut ALARM2: Mutex<RefCell<Option<Alarm<Target, 2>>>> = Mutex::new(RefCell
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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// Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT,
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// the RTC WDT, and the TIMG WDTs.
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let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
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let mut timer0 = Timer::new(peripherals.TIMG0);
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let mut timer1 = Timer::new(peripherals.TIMG1);
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let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
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let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
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let mut serial0 = Serial::new(peripherals.UART0).unwrap();
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rtc_cntl.set_super_wdt_enable(false);
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@ -5,6 +5,7 @@ use core::{cell::RefCell, fmt::Write};
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use bare_metal::Mutex;
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use esp32c3_hal::{
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clock::ClockControl,
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interrupt,
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pac::{self, Peripherals, TIMG0, TIMG1, UART0},
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prelude::*,
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@ -23,12 +24,14 @@ static mut TIMER1: Mutex<RefCell<Option<Timer<TIMG1>>>> = Mutex::new(RefCell::ne
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#[entry]
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fn main() -> ! {
|
||||
let peripherals = Peripherals::take().unwrap();
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
// Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT,
|
||||
// the RTC WDT, and the TIMG WDTs.
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer1 = Timer::new(peripherals.TIMG1);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
|
||||
let serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
|
||||
rtc_cntl.set_super_wdt_enable(false);
|
||||
@ -52,7 +55,7 @@ fn main() -> ! {
|
||||
interrupt::Priority::Priority1,
|
||||
);
|
||||
|
||||
timer0.start(10_000_000u64);
|
||||
timer0.start(500u64.millis());
|
||||
timer0.listen();
|
||||
|
||||
interrupt::enable(
|
||||
@ -71,7 +74,7 @@ fn main() -> ! {
|
||||
interrupt::Priority::Priority1,
|
||||
);
|
||||
|
||||
timer1.start(20_000_000u64);
|
||||
timer1.start(1u64.secs());
|
||||
timer1.listen();
|
||||
|
||||
riscv::interrupt::free(|_cs| unsafe {
|
||||
@ -100,7 +103,7 @@ pub fn interrupt1() {
|
||||
interrupt::clear(Cpu::ProCpu, interrupt::CpuInterrupt::Interrupt1);
|
||||
timer0.clear_interrupt();
|
||||
|
||||
timer0.start(10_000_000u64);
|
||||
timer0.start(500u64.millis());
|
||||
});
|
||||
}
|
||||
|
||||
@ -117,6 +120,6 @@ pub fn interrupt11() {
|
||||
interrupt::clear(Cpu::ProCpu, interrupt::CpuInterrupt::Interrupt11);
|
||||
timer1.clear_interrupt();
|
||||
|
||||
timer1.start(20_000_000u64);
|
||||
timer1.start(1u64.secs());
|
||||
});
|
||||
}
|
||||
|
@ -23,8 +23,8 @@ fn main() -> ! {
|
||||
|
||||
let mut delay = Delay::new(&clocks);
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer1 = Timer::new(peripherals.TIMG1);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
|
||||
|
||||
// Disable watchdog timers
|
||||
rtc_cntl.set_super_wdt_enable(false);
|
||||
|
@ -19,7 +19,7 @@ fn main() -> ! {
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
|
||||
// Disable MWDT and RWDT (Watchdog) flash boot protection
|
||||
|
@ -31,7 +31,7 @@ fn main() -> ! {
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
|
||||
|
@ -39,7 +39,7 @@ fn main() -> ! {
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
|
||||
|
||||
// Disable MWDT and RWDT (Watchdog) flash boot protection
|
||||
|
@ -3,7 +3,7 @@
|
||||
|
||||
use core::fmt::Write;
|
||||
|
||||
use esp32s2_hal::{pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
|
||||
use esp32s2_hal::{clock::ClockControl, pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
|
||||
use nb::block;
|
||||
use panic_halt as _;
|
||||
use xtensa_lx_rt::entry;
|
||||
@ -11,8 +11,10 @@ use xtensa_lx_rt::entry;
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let peripherals = Peripherals::take().unwrap();
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
|
||||
@ -20,7 +22,7 @@ fn main() -> ! {
|
||||
timer0.disable();
|
||||
rtc_cntl.set_wdt_global_enable(false);
|
||||
|
||||
timer0.start(40_000_000u64);
|
||||
timer0.start(1u64.secs());
|
||||
|
||||
loop {
|
||||
writeln!(serial0, "Hello world!").unwrap();
|
||||
|
@ -42,7 +42,7 @@ fn main() -> ! {
|
||||
let mut system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
|
||||
@ -67,7 +67,7 @@ fn main() -> ! {
|
||||
.unwrap();
|
||||
|
||||
// Start timer (5 second interval)
|
||||
timer0.start(50_000_000u64);
|
||||
timer0.start(5u64.secs());
|
||||
|
||||
writeln!(serial0, "Starting timer!").unwrap();
|
||||
|
||||
|
@ -4,6 +4,7 @@
|
||||
use core::fmt::Write;
|
||||
|
||||
use esp32s2_hal::{
|
||||
clock::ClockControl,
|
||||
pac::{Peripherals, UART0},
|
||||
prelude::*,
|
||||
ram,
|
||||
@ -26,8 +27,10 @@ static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8];
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let peripherals = Peripherals::take().unwrap();
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
|
||||
// Disable MWDT flash boot protection
|
||||
@ -35,7 +38,7 @@ fn main() -> ! {
|
||||
// The RWDT flash boot protection remains enabled and it being triggered is part
|
||||
// of the example
|
||||
|
||||
timer0.start(10_000_000u64);
|
||||
timer0.start(1u64.secs());
|
||||
|
||||
writeln!(
|
||||
serial0,
|
||||
|
@ -3,15 +3,25 @@
|
||||
|
||||
use core::fmt::Write;
|
||||
|
||||
use esp32s2_hal::{efuse::Efuse, pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
|
||||
use esp32s2_hal::{
|
||||
clock::ClockControl,
|
||||
efuse::Efuse,
|
||||
pac::Peripherals,
|
||||
prelude::*,
|
||||
RtcCntl,
|
||||
Serial,
|
||||
Timer,
|
||||
};
|
||||
use panic_halt as _;
|
||||
use xtensa_lx_rt::entry;
|
||||
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let peripherals = Peripherals::take().unwrap();
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
|
||||
|
@ -41,7 +41,7 @@ fn main() -> ! {
|
||||
// Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT,
|
||||
// the RTC WDT, and the TIMG WDTs.
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
|
||||
timer0.disable();
|
||||
|
@ -34,7 +34,7 @@ fn main() -> ! {
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
|
||||
|
@ -4,6 +4,7 @@
|
||||
use core::{cell::RefCell, fmt::Write};
|
||||
|
||||
use esp32s2_hal::{
|
||||
clock::ClockControl,
|
||||
interrupt,
|
||||
pac::{self, Peripherals, TIMG0, TIMG1, UART0},
|
||||
prelude::*,
|
||||
@ -26,10 +27,12 @@ static mut TIMER1: CriticalSectionMutex<RefCell<Option<Timer<TIMG1>>>> =
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let peripherals = Peripherals::take().unwrap();
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
// Disable the TIMG watchdog timer.
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer1 = Timer::new(peripherals.TIMG1);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
|
||||
let serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
|
||||
@ -43,7 +46,7 @@ fn main() -> ! {
|
||||
pac::Interrupt::TG0_T0_LEVEL,
|
||||
interrupt::CpuInterrupt::Interrupt20LevelPriority2,
|
||||
);
|
||||
timer0.start(50_000_000u64);
|
||||
timer0.start(500u64.millis());
|
||||
timer0.listen();
|
||||
|
||||
interrupt::enable(
|
||||
@ -51,7 +54,7 @@ fn main() -> ! {
|
||||
pac::Interrupt::TG1_T0_LEVEL,
|
||||
interrupt::CpuInterrupt::Interrupt23LevelPriority3,
|
||||
);
|
||||
timer1.start(100_000_000u64);
|
||||
timer1.start(1u64.secs());
|
||||
timer1.listen();
|
||||
|
||||
unsafe {
|
||||
@ -89,7 +92,7 @@ pub fn level2_interrupt() {
|
||||
let mut timer0 = data.borrow_mut();
|
||||
let timer0 = timer0.as_mut().unwrap();
|
||||
timer0.clear_interrupt();
|
||||
timer0.start(50_000_000u64);
|
||||
timer0.start(500u64.millis());
|
||||
});
|
||||
}
|
||||
}
|
||||
@ -114,7 +117,7 @@ pub fn level3_interrupt() {
|
||||
let mut timer1 = data.borrow_mut();
|
||||
let timer1 = timer1.as_mut().unwrap();
|
||||
timer1.clear_interrupt();
|
||||
timer1.start(100_000_000u64);
|
||||
timer1.start(1u64.secs());
|
||||
});
|
||||
}
|
||||
}
|
||||
|
@ -19,7 +19,7 @@ fn main() -> ! {
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
|
||||
// Disable MWDT and RWDT (Watchdog) flash boot protection
|
||||
|
@ -31,7 +31,7 @@ fn main() -> ! {
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
|
||||
|
@ -40,7 +40,7 @@ fn main() -> ! {
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
|
||||
|
||||
// Disable MWDT and RWDT (Watchdog) flash boot protection
|
||||
|
@ -3,7 +3,7 @@
|
||||
|
||||
use core::fmt::Write;
|
||||
|
||||
use esp32s3_hal::{pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
|
||||
use esp32s3_hal::{clock::ClockControl, pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
|
||||
use nb::block;
|
||||
use panic_halt as _;
|
||||
use xtensa_lx_rt::entry;
|
||||
@ -11,8 +11,10 @@ use xtensa_lx_rt::entry;
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let peripherals = Peripherals::take().unwrap();
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
|
||||
@ -20,7 +22,7 @@ fn main() -> ! {
|
||||
timer0.disable();
|
||||
rtc_cntl.set_wdt_global_enable(false);
|
||||
|
||||
timer0.start(40_000_000u64);
|
||||
timer0.start(1u64.secs());
|
||||
|
||||
loop {
|
||||
writeln!(serial0, "Hello world!").unwrap();
|
||||
|
@ -42,7 +42,7 @@ fn main() -> ! {
|
||||
let mut system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
|
||||
@ -67,7 +67,7 @@ fn main() -> ! {
|
||||
.unwrap();
|
||||
|
||||
// Start timer (5 second interval)
|
||||
timer0.start(50_000_000u64);
|
||||
timer0.start(5u64.secs());
|
||||
|
||||
writeln!(serial0, "Starting timer!").unwrap();
|
||||
|
||||
|
@ -4,6 +4,7 @@
|
||||
use core::fmt::Write;
|
||||
|
||||
use esp32s3_hal::{
|
||||
clock::ClockControl,
|
||||
pac::{Peripherals, UART0},
|
||||
prelude::*,
|
||||
ram,
|
||||
@ -26,8 +27,10 @@ static mut SOME_ZEROED_DATA: [u8; 8] = [0; 8];
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let peripherals = Peripherals::take().unwrap();
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
|
||||
// Disable MWDT flash boot protection
|
||||
@ -35,7 +38,7 @@ fn main() -> ! {
|
||||
// The RWDT flash boot protection remains enabled and it being triggered is part
|
||||
// of the example
|
||||
|
||||
timer0.start(10_000_000u64);
|
||||
timer0.start(1u64.secs());
|
||||
|
||||
writeln!(
|
||||
serial0,
|
||||
|
@ -3,15 +3,25 @@
|
||||
|
||||
use core::fmt::Write;
|
||||
|
||||
use esp32s3_hal::{efuse::Efuse, pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
|
||||
use esp32s3_hal::{
|
||||
clock::ClockControl,
|
||||
efuse::Efuse,
|
||||
pac::Peripherals,
|
||||
prelude::*,
|
||||
RtcCntl,
|
||||
Serial,
|
||||
Timer,
|
||||
};
|
||||
use panic_halt as _;
|
||||
use xtensa_lx_rt::entry;
|
||||
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let peripherals = Peripherals::take().unwrap();
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
|
||||
|
@ -41,7 +41,7 @@ fn main() -> ! {
|
||||
// Disable the watchdog timers. For the ESP32-C3, this includes the Super WDT,
|
||||
// the RTC WDT, and the TIMG WDTs.
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
|
||||
timer0.disable();
|
||||
|
@ -34,7 +34,7 @@ fn main() -> ! {
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
|
||||
|
@ -4,6 +4,7 @@
|
||||
use core::{cell::RefCell, fmt::Write};
|
||||
|
||||
use esp32s3_hal::{
|
||||
clock::ClockControl,
|
||||
interrupt,
|
||||
pac::{self, Peripherals, TIMG0, TIMG1, UART0},
|
||||
prelude::*,
|
||||
@ -26,10 +27,12 @@ static mut TIMER1: SpinLockMutex<RefCell<Option<Timer<TIMG1>>>> =
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let peripherals = Peripherals::take().unwrap();
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
// Disable the TIMG watchdog timer.
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer1 = Timer::new(peripherals.TIMG1);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
let mut timer1 = Timer::new(peripherals.TIMG1, clocks.apb_clock);
|
||||
let serial0 = Serial::new(peripherals.UART0).unwrap();
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
|
||||
@ -43,7 +46,7 @@ fn main() -> ! {
|
||||
pac::Interrupt::TG0_T0_LEVEL,
|
||||
interrupt::CpuInterrupt::Interrupt20LevelPriority2,
|
||||
);
|
||||
timer0.start(50_000_000u64);
|
||||
timer0.start(500u64.millis());
|
||||
timer0.listen();
|
||||
|
||||
interrupt::enable(
|
||||
@ -51,7 +54,7 @@ fn main() -> ! {
|
||||
pac::Interrupt::TG1_T0_LEVEL,
|
||||
interrupt::CpuInterrupt::Interrupt23LevelPriority3,
|
||||
);
|
||||
timer1.start(100_000_000u64);
|
||||
timer1.start(1u64.secs());
|
||||
timer1.listen();
|
||||
|
||||
unsafe {
|
||||
@ -89,7 +92,7 @@ pub fn level2_interrupt() {
|
||||
let mut timer0 = data.borrow_mut();
|
||||
let timer0 = timer0.as_mut().unwrap();
|
||||
timer0.clear_interrupt();
|
||||
timer0.start(50_000_000u64);
|
||||
timer0.start(500u64.millis());
|
||||
});
|
||||
}
|
||||
}
|
||||
@ -114,7 +117,7 @@ pub fn level3_interrupt() {
|
||||
let mut timer1 = data.borrow_mut();
|
||||
let timer1 = timer1.as_mut().unwrap();
|
||||
timer1.clear_interrupt();
|
||||
timer1.start(100_000_000u64);
|
||||
timer1.start(1u64.secs());
|
||||
});
|
||||
}
|
||||
}
|
||||
|
@ -23,7 +23,7 @@ fn main() -> ! {
|
||||
|
||||
let mut delay = Delay::new(&clocks);
|
||||
let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0);
|
||||
let mut timer0 = Timer::new(peripherals.TIMG0, clocks.apb_clock);
|
||||
|
||||
// Disable MWDT and RWDT (Watchdog) flash boot protection
|
||||
timer0.disable();
|
||||
|
Loading…
x
Reference in New Issue
Block a user