diff --git a/esp-hal-common/src/interrupt/xtensa.rs b/esp-hal-common/src/interrupt/xtensa.rs index 8f4608c0a..e8ddfe4de 100644 --- a/esp-hal-common/src/interrupt/xtensa.rs +++ b/esp-hal-common/src/interrupt/xtensa.rs @@ -174,42 +174,42 @@ unsafe fn core1_interrupt_peripheral() -> *const crate::pac::interrupt_core1::Re #[no_mangle] #[link_section = ".rwtext"] -fn __level1_interrupt() { +fn __level_1_interrupt() { unsafe { level1_interrupt() }; } #[no_mangle] #[link_section = ".rwtext"] -fn __level2_interrupt() { +fn __level_2_interrupt() { unsafe { level2_interrupt() }; } #[no_mangle] #[link_section = ".rwtext"] -fn __level3_interrupt() { +fn __level_3_interrupt() { unsafe { level3_interrupt() }; } #[no_mangle] #[link_section = ".rwtext"] -fn __level4_interrupt() { +fn __level_4_interrupt() { unsafe { level4_interrupt() }; } #[no_mangle] #[link_section = ".rwtext"] -fn __level5_interrupt() { +fn __level_5_interrupt() { unsafe { level5_interrupt() }; } #[no_mangle] #[link_section = ".rwtext"] -fn __level6_interrupt() { +fn __level_6_interrupt() { unsafe { level6_interrupt() }; } #[no_mangle] #[link_section = ".rwtext"] -fn __level7_interrupt() { +fn __level_7_interrupt() { unsafe { level7_interrupt() }; } diff --git a/esp32s2-hal/examples/gpio_interrupt.rs b/esp32s2-hal/examples/gpio_interrupt.rs index b8f1c5196..ec15fab2e 100644 --- a/esp32s2-hal/examples/gpio_interrupt.rs +++ b/esp32s2-hal/examples/gpio_interrupt.rs @@ -19,7 +19,7 @@ use esp_hal_common::{ PullDown, }; use panic_halt as _; -use xtensa_lx::mutex::{Mutex, CriticalSectionMutex}; +use xtensa_lx::mutex::{CriticalSectionMutex, Mutex}; use xtensa_lx_rt::entry; static mut SERIAL: CriticalSectionMutex>>> = @@ -33,7 +33,7 @@ fn main() -> ! { // Disable the TIMG watchdog timer. let mut timer0 = Timer::new(peripherals.TIMG0); - let mut serial0 = Serial::new(peripherals.UART0).unwrap(); + let serial0 = Serial::new(peripherals.UART0).unwrap(); timer0.disable(); @@ -61,7 +61,9 @@ fn main() -> ! { let mut delay = Delay::new(); unsafe { - xtensa_lx::interrupt::enable_mask(xtensa_lx_rt::interrupt::CpuInterruptLevel::Level2.mask()); + xtensa_lx::interrupt::enable_mask( + xtensa_lx_rt::interrupt::CpuInterruptLevel::Level2.mask(), + ); } loop {