I2C: Attempt resolving C6 issue (#3935)

esp-hal/src/gpio/mod.rs

@@ -119,7 +119,7 @@ impl PinGuard {
         }
     }
 
-    #[cfg(any(esp32, esp32s2))]
+    #[allow(unused)]
     pub(crate) fn pin_number(&self) -> Option<u8> {
         if self.pin == u8::MAX {
             None

esp-hal/src/i2c/master/mod.rs

@@ -2908,7 +2908,7 @@ mod bus_clear {
 
     impl<'a> ClearBusFuture<'a> {
         // Number of SCL pulses to clear the bus
-        const BUS_CLEAR_BITS: u8 = 10;
+        const BUS_CLEAR_BITS: u8 = 9;
 
         pub fn new(driver: Driver<'a>) -> Self {
             let mut this = Self { driver };
@@ -2924,21 +2924,29 @@ mod bus_clear {
             self.driver.update_registers();
         }
 
+        fn is_done(&self) -> bool {
+            self.driver
+                .regs()
+                .scl_sp_conf()
+                .read()
+                .scl_rst_slv_en()
+                .bit_is_clear()
+        }
+
         pub fn poll_completion(&mut self) -> Poll<()> {
-            let regs = self.driver.regs();
-            if regs.scl_sp_conf().read().scl_rst_slv_en().bit_is_set()
-                || regs.sr().read().bus_busy().bit_is_set()
-            {
-                Poll::Pending
-            } else {
+            if self.is_done() {
                 Poll::Ready(())
+            } else {
+                Poll::Pending
             }
         }
     }
 
     impl Drop for ClearBusFuture<'_> {
         fn drop(&mut self) {
-            self.configure(0);
+            if !self.is_done() {
+                self.configure(0);
+            }
             // We don't care about errors during bus clearing
             self.driver.clear_all_interrupts();
         }

esp-metadata-generated/src/_build_script_utils.rs

@@ -1164,7 +1164,6 @@ impl Chip {
                     "gpio_input_signal_max=\"124\"",
                     "gpio_output_signal_max=\"128\"",
                     "i2c_master_has_fsm_timeouts",
-                    "i2c_master_has_hw_bus_clear",
                     "i2c_master_has_bus_timeout_enable",
                     "i2c_master_can_estimate_nack_reason",
                     "i2c_master_has_conf_update",
@@ -1367,7 +1366,6 @@ impl Chip {
                     "cargo:rustc-cfg=gpio_input_signal_max=\"124\"",
                     "cargo:rustc-cfg=gpio_output_signal_max=\"128\"",
                     "cargo:rustc-cfg=i2c_master_has_fsm_timeouts",
-                    "cargo:rustc-cfg=i2c_master_has_hw_bus_clear",
                     "cargo:rustc-cfg=i2c_master_has_bus_timeout_enable",
                     "cargo:rustc-cfg=i2c_master_can_estimate_nack_reason",
                     "cargo:rustc-cfg=i2c_master_has_conf_update",

esp-metadata-generated/src/_generated_esp32c6.rs

@@ -109,7 +109,7 @@ macro_rules! property {
         true
     };
     ("i2c_master.has_hw_bus_clear") => {
-        true
+        false
     };
     ("i2c_master.has_bus_timeout_enable") => {
         true

esp-metadata/devices/esp32c6.toml

@@ -432,7 +432,7 @@ instances = [
     { name = "i2c0", sys_instance = "I2cExt0", scl = "I2CEXT0_SCL", sda = "I2CEXT0_SDA" },
 ]
 has_fsm_timeouts = true
-has_hw_bus_clear = true
+# has_hw_bus_clear = true # Maybe on >v0.0?
 ll_intr_mask = 0x3ffff
 fifo_size = 32
 has_bus_timeout_enable = true