Convert to workspace, shortened chip selection feature names

Cargo.toml

@@ -0,0 +1,6 @@
+[workspace]
+members = [
+    "esp-hal-common",
+    "esp32-hal",
+    "esp32c3-hal",
+]

esp-hal-common/Cargo.toml

@@ -6,13 +6,18 @@ edition = "2018"
 [dependencies]
 embedded-hal = { version = "0.2", features = ["unproven"] }
 nb = "1.0"
+xtensa-lx = { version = "0.4", optional = true }
 void = { version = "1.0", default-features = false }
-# Each supported device MUST have its PAC included below.
+# IMPORTANT:
+# Each supported device MUST have its PAC included below along with a
+# corresponding feature.
 esp32   = { path = "../../esp-pacs/esp32",   optional = true }
 esp32c3 = { path = "../../esp-pacs/esp32c3", optional = true }
 esp32s2 = { path = "../../esp-pacs/esp32s2", optional = true }
+esp32s3 = { path = "../../esp-pacs/esp32s3", optional = true }
 
 [features]
-enable-esp32 = ["esp32"]
+32   = ["esp32",   "xtensa-lx/lx6"]
-enable-esp32c3 = ["esp32c3"]
+32c3 = ["esp32c3"]
-enable-esp32s2 = ["esp32s2"]
+32s2 = ["esp32s2", "xtensa-lx/lx6"] # FIXME
+32s3 = ["esp32s3", "xtensa-lx/lx6"] # FIXME

esp-hal-common/build.rs

@@ -1,11 +1,12 @@
 fn main() {
     let chip_features = [
-        cfg!(feature = "enable-esp32"),
+        cfg!(feature = "32"),
-        cfg!(feature = "enable-esp32c3"),
+        cfg!(feature = "32c3"),
-        cfg!(feature = "enable-esp32s2"),
+        cfg!(feature = "32s2"),
+        cfg!(feature = "32s3"),
     ];
 
     if chip_features.iter().filter(|&&f| f).count() != 1 {
-        panic!("Exactly one chip must be selected via its cargo feature");
+        panic!("Exactly one chip must be enabled via its cargo feature");
     }
 }

esp-hal-common/src/lib.rs

@@ -1,11 +1,13 @@
 #![no_std]
 
-#[cfg(feature = "esp32")]
+#[cfg(feature = "32")]
 pub use esp32 as pac;
-#[cfg(feature = "esp32c3")]
+#[cfg(feature = "32c3")]
 pub use esp32c3 as pac;
-#[cfg(feature = "esp32s2")]
+#[cfg(feature = "32s2")]
 pub use esp32s2 as pac;
+#[cfg(feature = "32s3")]
+pub use esp32s3 as pac;
 
 pub mod prelude;
 pub mod serial;

esp-hal-common/src/serial.rs

@@ -1,6 +1,6 @@
 use embedded_hal::serial::{Read, Write};
 
-#[cfg(feature = "enable-esp32")]
+#[cfg(any(feature = "32", feature = "32s3"))]
 use crate::pac::UART2;
 use crate::pac::{uart0::RegisterBlock, UART0, UART1};
 
@@ -89,9 +89,9 @@ pub trait Instance {
 
     /// Check if the UART TX statemachine is is idle
     fn is_tx_idle(&mut self) -> bool {
-        #[cfg(feature = "enable-esp32")]
+        #[cfg(feature = "32")]
         let ret = self.as_uart0().status.read().st_utx_out().bits() == 0x0u8;
-        #[cfg(not(feature = "enable-esp32"))]
+        #[cfg(not(feature = "32"))]
         let ret = self.as_uart0().fsm_status.read().st_utx_out().bits() == 0x0u8;
 
         ret
@@ -99,9 +99,9 @@ pub trait Instance {
 
     /// Check if the UART RX statemachine is is idle
     fn is_rx_idle(&mut self) -> bool {
-        #[cfg(feature = "enable-esp32")]
+        #[cfg(feature = "32")]
         let ret = self.as_uart0().status.read().st_urx_out().bits() == 0x0u8;
-        #[cfg(not(feature = "enable-esp32"))]
+        #[cfg(not(feature = "32"))]
         let ret = self.as_uart0().fsm_status.read().st_urx_out().bits() == 0x0u8;
 
         ret
@@ -117,10 +117,18 @@ impl<T: Instance> Write<u8> for Serial<T> {
         if self.uart.get_tx_fifo_count() >= UART_FIFO_SIZE {
             Err(nb::Error::WouldBlock)
         } else {
+            #[cfg(feature = "32")]
+            self.uart
+                .as_uart0()
+                .fifo()
+                .write(|w| unsafe { w.rxfifo_rd_byte().bits(word) });
+
+            #[cfg(not(feature = "32"))]
             self.uart
                 .as_uart0()
                 .fifo
                 .write(|w| unsafe { w.rxfifo_rd_byte().bits(word) });
+
             Ok(())
         }
     }
@@ -142,7 +150,12 @@ impl<T: Instance> Read<u8> for Serial<T> {
     /// Reads a single word from the serial interface
     fn read(&mut self) -> nb::Result<u8, Self::Error> {
         if self.uart.get_rx_fifo_count() > 0 {
-            Ok(self.uart.as_uart0().fifo.read().rxfifo_rd_byte().bits())
+            #[cfg(feature = "32")]
+            let value = self.uart.as_uart0().fifo().read().rxfifo_rd_byte().bits();
+            #[cfg(not(feature = "32"))]
+            let value = self.uart.as_uart0().fifo.read().rxfifo_rd_byte().bits();
+
+            Ok(value)
         } else {
             Err(nb::Error::WouldBlock)
         }
@@ -174,7 +187,7 @@ impl Instance for UART1 {
     }
 }
 
-#[cfg(feature = "enable-esp32")]
+#[cfg(any(feature = "32", feature = "32s3"))]
 /// Specific instance implementation for the UART2 peripheral
 impl Instance for UART2 {
     #[inline(always)]

esp-hal-common/src/timer.rs

@@ -34,17 +34,15 @@ pub trait Instance {
     fn as_timg0(&self) -> &RegisterBlock;
 
     fn reset_counter(&mut self) {
-        self.as_timg0()
+        let reg_block = self.as_timg0();
+
+        reg_block
             .t0loadlo
             .write(|w| unsafe { w.t0_load_lo().bits(0) });
-
+        reg_block
-        self.as_timg0()
             .t0loadhi
             .write(|w| unsafe { w.t0_load_hi().bits(0) });
-
+        reg_block.t0load.write(|w| unsafe { w.t0_load().bits(1) });
-        self.as_timg0()
-            .t0load
-            .write(|w| unsafe { w.t0_load().bits(1) });
     }
 
     fn set_counter_active(&mut self, state: bool) {
@@ -82,24 +80,24 @@ pub trait Instance {
         let high = (value >> 32) as u32;
         let low = (value & 0xFFFF_FFFF) as u32;
 
-        self.as_timg0()
+        let reg_block = self.as_timg0();
+
+        reg_block
             .t0alarmlo
             .write(|w| unsafe { w.t0_alarm_lo().bits(low) });
-        self.as_timg0()
+        reg_block
             .t0alarmhi
             .write(|w| unsafe { w.t0_alarm_hi().bits(high) });
     }
 
     fn set_wdt_enabled(&mut self, enabled: bool) {
-        self.as_timg0()
+        let reg_block = self.as_timg0();
+
+        reg_block
             .wdtwprotect
             .write(|w| unsafe { w.wdt_wkey().bits(0u32) });
-
+        reg_block.wdtconfig0.write(|w| w.wdt_en().bit(enabled));
-        self.as_timg0()
+        reg_block
-            .wdtconfig0
-            .write(|w| w.wdt_en().bit(enabled));
-
-        self.as_timg0()
             .wdtwprotect
             .write(|w| unsafe { w.wdt_wkey().bits(0x50D8_3AA1u32) });
     }

esp32-hal/Cargo.toml

@@ -16,7 +16,7 @@ path = "../../esp-pacs/esp32"
 
 [dependencies.esp-hal-common]
 path = "../esp-hal-common"
-features = ["enable-esp32"]
+features = ["32"]
 
 [dev-dependencies]
 panic-halt = "0.2"

esp32c3-hal/Cargo.toml

@@ -15,7 +15,7 @@ path = "../../esp-pacs/esp32c3"
 
 [dependencies.esp-hal-common]
 path = "../esp-hal-common"
-features = ["enable-esp32c3"]
+features = ["32c3"]
 
 [dependencies.riscv-rt] 
 git = "https://github.com/MabezDev/riscv-rt"

esp32c3-hal/build.rs

@@ -3,11 +3,17 @@ use std::{env, fs::File, io::Write, path::PathBuf};
 fn main() {
     // Put the linker script somewhere the linker can find it
     let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
+
     File::create(out.join("memory.x"))
         .unwrap()
         .write_all(include_bytes!("esp32c3-memory.x"))
         .unwrap();
 
+    File::create(out.join("esp32c3-link.x"))
+        .unwrap()
+        .write_all(include_bytes!("esp32c3-link.x"))
+        .unwrap();
+
     println!("cargo:rustc-link-search={}", out.display());
 
     // Only re-run the build script when memory.x is changed,

esp32c3-hal/esp32c3-link.x

@@ -1,2 +1,2 @@
-INCLUDE esp32c3-memory.x
+INCLUDE memory.x
 INCLUDE link.x