From 2d4ccd735f329df79e997a38d9e350bf60e853d2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?D=C3=A1niel=20Buga?= <bugadani@gmail.com>
Date: Fri, 6 Dec 2024 07:20:49 +0100
Subject: [PATCH] Prevent creating GpioPin (#2688)

---
 esp-hal/CHANGELOG.md    | 1 +
 esp-hal/src/gpio/mod.rs | 1 +
 2 files changed, 2 insertions(+)

diff --git a/esp-hal/CHANGELOG.md b/esp-hal/CHANGELOG.md
index 2739b1919..046bb49e1 100644
--- a/esp-hal/CHANGELOG.md
+++ b/esp-hal/CHANGELOG.md
@@ -62,6 +62,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - Xtensa devices now correctly enable the `esp-hal-procmacros/rtc-slow` feature (#2594)
 - User-bound GPIO interrupt handlers should no longer interfere with async pins. (#2625)
 - `spi::master::Spi::{into_async, into_blocking}` are now correctly available on the typed driver, to. (#2674)
+- It is no longer possible to safely conjure `GpioPin` instances (#2688)
 
 ### Removed
 
diff --git a/esp-hal/src/gpio/mod.rs b/esp-hal/src/gpio/mod.rs
index 5baf33bde..1c96a76ad 100644
--- a/esp-hal/src/gpio/mod.rs
+++ b/esp-hal/src/gpio/mod.rs
@@ -757,6 +757,7 @@ impl Bank1GpioRegisterAccess {
 }
 
 /// GPIO pin
+#[non_exhaustive]
 pub struct GpioPin<const GPIONUM: u8>;
 
 /// Type-erased GPIO pin