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https://github.com/esp-rs/esp-hal.git
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Remove redundant Enable trait (#2523)
Co-authored-by: Dominic Fischer <git@dominicfischer.me>
This commit is contained in:
parent
0b452f7933
commit
456bcfb7c6
@ -81,7 +81,7 @@ use crate::{
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peripherals::{timg0::RegisterBlock, Interrupt, TIMG0},
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peripherals::{timg0::RegisterBlock, Interrupt, TIMG0},
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private::Sealed,
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private::Sealed,
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sync::{lock, Lock},
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sync::{lock, Lock},
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system::{Peripheral as PeripheralEnable, PeripheralClockControl},
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system::PeripheralClockControl,
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Async,
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Async,
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Blocking,
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Blocking,
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InterruptConfigurable,
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InterruptConfigurable,
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@ -152,7 +152,7 @@ impl TimerGroupInstance for TIMG0 {
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}
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}
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fn enable_peripheral() {
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fn enable_peripheral() {
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crate::system::PeripheralClockControl::enable(crate::system::Peripheral::Timg0)
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PeripheralClockControl::enable(crate::system::Peripheral::Timg0)
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}
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}
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fn reset_peripheral() {
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fn reset_peripheral() {
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@ -215,11 +215,11 @@ impl TimerGroupInstance for crate::peripherals::TIMG1 {
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}
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}
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fn enable_peripheral() {
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fn enable_peripheral() {
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crate::system::PeripheralClockControl::enable(crate::system::Peripheral::Timg1)
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PeripheralClockControl::enable(crate::system::Peripheral::Timg1)
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}
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}
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fn reset_peripheral() {
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fn reset_peripheral() {
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crate::system::PeripheralClockControl::reset(crate::system::Peripheral::Timg1)
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PeripheralClockControl::reset(crate::system::Peripheral::Timg1)
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}
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}
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fn configure_wdt_src_clk() {
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fn configure_wdt_src_clk() {
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@ -377,7 +377,6 @@ where
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{
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{
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/// Construct a new instance of [`Timer`]
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/// Construct a new instance of [`Timer`]
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pub fn new(timg: T, apb_clk_freq: HertzU32) -> Self {
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pub fn new(timg: T, apb_clk_freq: HertzU32) -> Self {
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timg.enable_peripheral();
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timg.set_counter_active(true);
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timg.set_counter_active(true);
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Self {
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Self {
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@ -599,7 +598,7 @@ where
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}
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}
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#[doc(hidden)]
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#[doc(hidden)]
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pub trait Instance: Sealed + Enable {
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pub trait Instance: Sealed {
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fn register_block(&self) -> &RegisterBlock;
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fn register_block(&self) -> &RegisterBlock;
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fn timer_group(&self) -> u8;
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fn timer_group(&self) -> u8;
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@ -637,11 +636,6 @@ pub trait Instance: Sealed + Enable {
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fn is_interrupt_set(&self) -> bool;
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fn is_interrupt_set(&self) -> bool;
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}
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}
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#[doc(hidden)]
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pub trait Enable: Sealed {
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fn enable_peripheral(&self);
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}
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/// A timer within a Timer Group.
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/// A timer within a Timer Group.
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pub struct TimerX<TG, const T: u8 = 0> {
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pub struct TimerX<TG, const T: u8 = 0> {
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phantom: PhantomData<TG>,
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phantom: PhantomData<TG>,
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@ -674,7 +668,6 @@ where
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impl<TG, const T: u8> Instance for TimerX<TG, T>
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impl<TG, const T: u8> Instance for TimerX<TG, T>
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where
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where
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TG: TimerGroupInstance,
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TG: TimerGroupInstance,
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Self: Enable,
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{
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{
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fn register_block(&self) -> &RegisterBlock {
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fn register_block(&self) -> &RegisterBlock {
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unsafe { &*TG::register_block() }
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unsafe { &*TG::register_block() }
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@ -815,25 +808,6 @@ pub type Timer0<TG> = TimerX<TG, 0>;
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#[cfg(timg_timer1)]
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#[cfg(timg_timer1)]
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pub type Timer1<TG> = TimerX<TG, 1>;
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pub type Timer1<TG> = TimerX<TG, 1>;
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impl<TG> Enable for Timer0<TG>
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where
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TG: TimerGroupInstance,
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{
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fn enable_peripheral(&self) {
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PeripheralClockControl::enable(PeripheralEnable::Timg0);
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}
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}
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#[cfg(timg_timer1)]
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impl<TG> Enable for Timer1<TG>
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where
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TG: TimerGroupInstance,
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{
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fn enable_peripheral(&self) {
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PeripheralClockControl::enable(PeripheralEnable::Timg1);
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}
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}
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fn ticks_to_timeout<F>(ticks: u64, clock: F, divider: u32) -> u64
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fn ticks_to_timeout<F>(ticks: u64, clock: F, divider: u32) -> u64
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where
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where
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F: Into<HertzU32>,
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F: Into<HertzU32>,
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@ -956,7 +930,7 @@ where
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/// Construct a new instance of [`Wdt`]
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/// Construct a new instance of [`Wdt`]
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pub fn new() -> Self {
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pub fn new() -> Self {
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#[cfg(lp_wdt)]
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#[cfg(lp_wdt)]
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PeripheralClockControl::enable(PeripheralEnable::Wdt);
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PeripheralClockControl::enable(crate::system::Peripheral::Wdt);
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TG::configure_wdt_src_clk();
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TG::configure_wdt_src_clk();
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