Fix IRAM/DRAM overlap for ESP32-S2

esp32s2-hal/build.rs

@@ -23,6 +23,11 @@ fn main() {
         .write_all(include_bytes!("ld/linkall.x"))
         .unwrap();
 
+    File::create(out.join("link-esp32s2.x"))
+        .unwrap()
+        .write_all(include_bytes!("ld/link-esp32s2.x"))
+        .unwrap();
+
     println!("cargo:rustc-link-search={}", out.display());
 
     // Only re-run the build script when memory.x is changed,

esp32s2-hal/examples/spi_eh1_loopback.rs

@@ -18,6 +18,7 @@
 
 use core::fmt::Write;
 
+use embedded_hal_1::spi::blocking::SpiBus;
 use esp32s2_hal::{
     clock::ClockControl,
     gpio::IO,
@@ -32,8 +33,6 @@ use esp32s2_hal::{
 use panic_halt as _;
 use xtensa_lx_rt::entry;
 
-use embedded_hal_1::spi::blocking::SpiBus;
-
 #[entry]
 fn main() -> ! {
     let peripherals = Peripherals::take().unwrap();
@@ -82,18 +81,17 @@ fn main() -> ! {
         writeln!(serial0, " SUCCESS").unwrap();
         delay.delay_ms(250u32);
 
-
         // --- Asymmetric transfer (Read more than we write) ---
         write!(serial0, "Starting asymetric transfer (read > write)...").unwrap();
         let mut read: [u8; 4] = [0x00; 4];
 
-        SpiBus::transfer(&mut spi, &mut read[0..2], &write[..]).expect("Asymmetric transfer failed");
+        SpiBus::transfer(&mut spi, &mut read[0..2], &write[..])
+            .expect("Asymmetric transfer failed");
         assert_eq!(write[0], read[0]);
         assert_eq!(read[2], 0x00u8);
         writeln!(serial0, " SUCCESS").unwrap();
         delay.delay_ms(250u32);
 
-
         // --- Symmetric transfer with huge buffer ---
         // Only your RAM is the limit!
         write!(serial0, "Starting huge transfer...").unwrap();
@@ -108,8 +106,8 @@ fn main() -> ! {
         writeln!(serial0, " SUCCESS").unwrap();
         delay.delay_ms(250u32);
 
-
+        // --- Symmetric transfer with huge buffer in-place (No additional allocation
-        // --- Symmetric transfer with huge buffer in-place (No additional allocation needed) ---
+        // needed) ---
         write!(serial0, "Starting huge transfer (in-place)...").unwrap();
         let mut write = [0x55u8; 4096];
         for byte in 0..write.len() {
@@ -124,4 +122,3 @@ fn main() -> ! {
         delay.delay_ms(250u32);
     }
 }
-

esp32s2-hal/ld/link-esp32s2.x

@@ -0,0 +1,83 @@
+
+/* before memory.x to allow override */
+ENTRY(Reset)
+
+INCLUDE memory.x
+
+/* after memory.x to allow override */
+PROVIDE(__pre_init = DefaultPreInit);
+PROVIDE(__zero_bss = default_mem_hook);
+PROVIDE(__init_data = default_mem_hook);
+
+INCLUDE exception.x
+
+SECTIONS {
+  .text : ALIGN(4)
+  {
+    _stext = .;
+    . = ALIGN (4);
+    _text_start = ABSOLUTE(.);
+    . = ALIGN (4);
+    *(.literal .text .literal.* .text.*)
+    _text_end = ABSOLUTE(.);
+    _etext = .;
+  } > ROTEXT
+
+  .rodata : ALIGN(4)
+  {
+    _rodata_start = ABSOLUTE(.);
+    . = ALIGN (4);
+    *(.rodata .rodata.*)
+    _rodata_end = ABSOLUTE(.);
+  } > RODATA
+
+  .data : ALIGN(4)
+  {
+    _data_start = ABSOLUTE(.);
+    . = ALIGN (4);
+    *(.data .data.*)
+    _data_end = ABSOLUTE(.);
+  } > RWDATA AT > RODATA
+
+  /* LMA of .data */
+  _sidata = LOADADDR(.data);
+
+  .bss (NOLOAD) : ALIGN(4)
+  {
+    _bss_start = ABSOLUTE(.);
+    . = ALIGN (4);
+    *(.bss .bss.* COMMON)
+    _bss_end = ABSOLUTE(.);
+  } > RWDATA
+
+  .noinit (NOLOAD) : ALIGN(4)
+  {
+    . = ALIGN(4);
+    *(.noinit .noinit.*)
+  } > RWDATA
+
+  .dram0_reserved_for_data (NOLOAD) : ALIGN(4)
+  {
+    . = ORIGIN(RWTEXT) + SIZEOF(.data) + SIZEOF(.bss) + SIZEOF(.noinit);
+  } > RWTEXT
+
+  .rwtext : ALIGN(4)
+  {
+    . = ALIGN (4);
+    *(.rwtext.literal .rwtext .rwtext.literal.* .rwtext.*)
+  } > RWTEXT
+
+ /* must be last segment using RWTEXT */
+  .text_heap_start (NOLOAD) : ALIGN(4)
+  {
+    . = ALIGN (4);
+    _text_heap_start = ABSOLUTE(.);
+  } > RWTEXT
+
+ /* must be last segment using RWDATA */
+  .heap_start (NOLOAD) : ALIGN(4)
+  {
+    . = ALIGN (4);
+    _heap_start = ABSOLUTE(.);
+  } > RWDATA
+}

esp32s2-hal/ld/linkall.x

@@ -1,2 +1,2 @@
-INCLUDE "link.x"
+INCLUDE "link-esp32s2.x"
 INCLUDE "hal-defaults.x"

esp32s2-hal/ld/memory.x

@@ -11,6 +11,8 @@ ENTRY(ESP32Reset)
 /* reserved at the start of DRAM */
 RESERVE_DRAM = 0x4000;
 
+VECTORS_SIZE = 0x400;
+
 /* reserved at the start of the RTC memories for use by the ULP processor */
 RESERVE_RTC_FAST = 0;
 RESERVE_RTC_SLOW = 0;
@@ -21,17 +23,17 @@ STACK_SIZE = 8k;
 /* Specify main memory areas */
 MEMORY
 {
-  vectors_seg ( RX )     : ORIGIN = 0x40022000, len = 1k /* SRAM0 */
+  vectors_seg ( RX )     : ORIGIN = 0x40020000 + RESERVE_DRAM, len = VECTORS_SIZE /* SRAM0 */
-  iram_seg ( RX )        : ORIGIN = 0x40022400, len = 128k-0x400 /* SRAM0 */
+  iram_seg ( RX )        : ORIGIN = 0x40020000 + RESERVE_DRAM + VECTORS_SIZE, len = 192 - RESERVE_DRAM - VECTORS_SIZE /* SRAM0 */
 
-  dram_seg ( RW )        : ORIGIN = 0x3FFB0000 + RESERVE_DRAM, len = 192k - RESERVE_DRAM
+  dram_seg ( RW )        : ORIGIN = 0x3FFB0000 + RESERVE_DRAM + VECTORS_SIZE, len = 192k - RESERVE_DRAM - VECTORS_SIZE
 
   /* SRAM1; reserved for static ROM usage; can be used for heap.
      Length based on the "_dram0_rtos_reserved_start" symbol from IDF used to delimit the
      ROM data reserved region:
      https://github.com/espressif/esp-idf/blob/bcb34ca7aef4e8d3b97d75ad069b960fb1c17c16/components/heap/port/esp32s2/memory_layout.c#L121-L122
   */
-  reserved_for_boot_seg  : ORIGIN = 0x3FFE0000, len = 0x1FA10
+  reserved_for_boot_seg  : ORIGIN = 0x3ffffa10, len = 0x5f0
 
   /* external flash 
      The 0x20 offset is a convenience for the app binary image generation.