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Enable the CI feature to check more features in MSRV checks (#1641)

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* enable the CI feature to check more features in MSRV checks

* Rename eh1 feature in esp-lp-hal
This commit is contained in:
Scott Mabin 2024-05-30 15:22:03 +01:00 committed by GitHub
parent 4dbe5d35a6
commit 4d9441ef99
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GPG Key ID: B5690EEEBB952194
3 changed files with 9 additions and 14 deletions
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20
.github/workflows/ci.yml vendored
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@ -201,16 +201,13 @@ jobs:
components: rust-src
- uses: Swatinem/rust-cache@v2
# TODO:
# - Enable additional (all?) features for MSRV check
# Verify the MSRV for all RISC-V chips.
- name: msrv (esp-hal)
run: |
cargo xtask build-package --features=esp32c2 --target=riscv32imc-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32c3 --target=riscv32imc-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32h2 --target=riscv32imac-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32c2,ci --target=riscv32imc-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32c3,ci --target=riscv32imc-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32c6,ci --target=riscv32imac-unknown-none-elf esp-hal
cargo xtask build-package --features=esp32h2,ci --target=riscv32imac-unknown-none-elf esp-hal
- name: msrv (esp-lp-hal)
run: |
cargo xtask build-package --features=esp32c6 --target=riscv32imac-unknown-none-elf esp-lp-hal
@ -222,9 +219,6 @@ jobs:
env:
RUSTC_BOOTSTRAP: 1
# TODO:
# - Enable additional (all?) features for MSRV check
steps:
- uses: actions/checkout@v4
- uses: esp-rs/xtensa-toolchain@v1.5
@ -236,9 +230,9 @@ jobs:
# Verify the MSRV for all Xtensa chips:
- name: msrv (esp-hal)
run: |
cargo xtask build-package --toolchain=esp --features=esp32 --target=xtensa-esp32-none-elf esp-hal
cargo xtask build-package --toolchain=esp --features=esp32s2 --target=xtensa-esp32s2-none-elf esp-hal
cargo xtask build-package --toolchain=esp --features=esp32s3 --target=xtensa-esp32s3-none-elf esp-hal
cargo xtask build-package --toolchain=esp --features=esp32,ci --target=xtensa-esp32-none-elf esp-hal
cargo xtask build-package --toolchain=esp --features=esp32s2,ci --target=xtensa-esp32s2-none-elf esp-hal
cargo xtask build-package --toolchain=esp --features=esp32s3,ci --target=xtensa-esp32s3-none-elf esp-hal
# --------------------------------------------------------------------------
# Lint & Format

1
esp-hal/Cargo.toml
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@ -216,6 +216,7 @@ ci = [
"async",
"embassy",
"embassy-time-timg0",
"embedded-io"
]
[lints.clippy]

2
esp-lp-hal/Cargo.toml
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@ -42,7 +42,7 @@ esp-build = { version = "0.1.0", path = "../esp-build" }
default = ["embedded-hal-02"]
embedded-hal-02 = ["dep:embedded-hal-02"]
embedded-hal-1 = ["dep:embedded-hal-1"]
embedded-hal = ["dep:embedded-hal-1"]
esp32c6 = ["dep:esp32c6-lp", "procmacros/is-lp-core", "dep:nb", "dep:paste"]
esp32s2 = ["dep:esp32s2-ulp", "procmacros/is-ulp-core"]