Update README to reflect recent additions

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Jesse Braham 2022-01-10 09:57:47 -08:00
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# esp-hal
[![CI](https://github.com/jessebraham/esp-hal/actions/workflows/ci.yml/badge.svg)](https://github.com/jessebraham/esp-hal/actions/workflows/ci.yml)
An _extremely_ experimental attempt at writing a HAL which targets the **ESP32**, **ESP32-C3**, **ESP32-S2**, and **ESP32-S3**.
**This should not be used for anything at this point in time. This is merely a proof-of-concept.**
**This should not be used for anything other than experimentation at this point in time, this is merely a proof-of-concept.**
The various packages in this repository may or may not build at any given time.
The various packages in this repository may or may not build at any given time. Until the first releases are published there should be no expectation of API stability.
## What is working?
For the **ESP32** and **ESP32-C3**, the `TIMG` and `UART` peripherals have (probably incomplete) implementations which are functional. These packages include examples to demonstrate this.
The **ESP32-C3** has functioning `GPIO` as well, though the implementation may not be complete or correct.
For the **ESP32** and **ESP32-C3**, the `GPIO`, `TIMG` and `UART` peripherals have (probably incomplete) implementations which are nonetheless functional. These packages include examples to demonstrate these peripherals.
## What is NOT working?
Everything else.
### Notes on the ESP32-S2 and ESP32-S3
At this time, there are two major issues blocking progress on the **ESP32-S2** and **ESP32-S3**:
- The lack of runtime support via [riscv-rt](https://github.com/rust-embedded/riscv-rt)
- The omission of linker scripts, required for actually building the binaries
Once these issues have been resolved, progress can resume on the `esp32s2-hal` and `esp32s3-hal` crates.
## License
Licensed under either of: