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Fix S3-PSRAM mapping with later bootloaders (#3637)
* Fix S3-PSRAM mapping with later bootloaders * CHANGELOG.md * Panic if `cache_dbus_mmu_set` fails
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@ -21,6 +21,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- Fixed a typo in the ESP32-C3 memory linker script, causing ICACHE to not be defined (#3613)
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- Prevent bootloops when DRAM is close to being full. (#3635)
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- Fix PSRAM mapping on ESP32-S3 when the bootloader used the last page to access flash (#3637)
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### Removed
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@ -179,7 +179,10 @@ pub(crate) fn init_psram(config: PsramConfig) {
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// https://docs.espressif.com/projects/esp-idf/en/stable/esp32s3/api-reference/system/mm.html#introduction
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let mmu_table_ptr = DR_REG_MMU_TABLE as *const u32;
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let mut mapped_pages = 0;
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for i in (0..FLASH_MMU_TABLE_SIZE).rev() {
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// the bootloader is using the last page to access flash internally
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// (e.g. to read the app descriptor) so we just skip that
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for i in (0..(FLASH_MMU_TABLE_SIZE - 1)).rev() {
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if mmu_table_ptr.add(i).read_volatile() != MMU_INVALID {
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mapped_pages = (i + 1) as u32;
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break;
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@ -205,17 +208,14 @@ pub(crate) fn init_psram(config: PsramConfig) {
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CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE,
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);
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if cache_dbus_mmu_set(
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let cache_dbus_mmu_set_res = cache_dbus_mmu_set(
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MMU_ACCESS_SPIRAM,
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start,
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START_PAGE << 16,
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64,
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config.size.get() as u32 / 1024 / 64, // number of pages to map
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0,
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) != 0
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{
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panic!("cache_dbus_mmu_set failed");
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}
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);
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EXTMEM::regs().dcache_ctrl1().modify(|_, w| {
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w.dcache_shut_core0_bus()
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@ -226,6 +226,11 @@ pub(crate) fn init_psram(config: PsramConfig) {
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Cache_Resume_DCache(0);
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// panic AFTER resuming the cache
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if cache_dbus_mmu_set_res != 0 {
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panic!("cache_dbus_mmu_set failed");
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}
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start
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};
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