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Improve I2C NACK detection (#1184)

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* Improve I2C NACK detection

* CHANGELOG.md entry
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Björn Quentin 2024-02-19 17:13:39 +01:00 committed by GitHub
parent 6712aa55f7
commit 5b3cf02153
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2 changed files with 11 additions and 12 deletions
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CHANGELOG.md
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@ -34,6 +34,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- Fixed the multicore critical section on Xtensa (#1175)
- Fix timer `now` for esp32c3 and esp32c6 (#1178)
- Wait for registers to get synced before reading the timer count for all chips (#1183)
- Fix I2C error handling (#1184)
### Changed

22
esp-hal/src/i2c.rs
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@ -697,11 +697,14 @@ pub trait Instance {
/// Resets the I2C controller (FIFO + FSM + command list)
fn reset(&self) {
// Reset interrupts
// Disable all I2C interrupts
// Reset the FSM
// (the option to reset the FSM is not available
// for the ESP32)
#[cfg(not(esp32))]
self.register_block()
.int_ena()
.write(|w| unsafe { w.bits(0) });
.ctr()
.modify(|_, w| w.fsm_rst().set_bit());
// Clear all I2C interrupts
self.register_block()
.int_clr()
@ -712,14 +715,6 @@ pub trait Instance {
// Reset the command list
self.reset_command_list();
// Reset the FSM
// (the option to reset the FSM is not available
// for the ESP32)
#[cfg(not(esp32))]
self.register_block()
.ctr()
.modify(|_, w| w.fsm_rst().set_bit());
}
/// Resets the I2C peripheral's command registers
@ -1317,6 +1312,9 @@ pub trait Instance {
} else if interrupts.arbitration_lost_int_raw().bit_is_set() {
self.reset();
return Err(Error::ArbitrationLost);
} else if interrupts.trans_complete_int_raw().bit_is_set() && self.register_block().sr().read().resp_rec().bit_is_clear() {
self.reset();
return Err(Error::AckCheckFailed);
}
}
}