mirror of
https://github.com/esp-rs/esp-hal.git
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Update eFuse field definitions (#3440)
* Copy eFuse field definitions from `espflash` repo, make required changes to get building again * Clean up functions for reading eFuse fields a bit * Make reading the MAC address chip-agnostic * Remove eFuse field generation from `xtask` package * Remove `read_field_be` function, as it's not really required * Fix clippy lint errors * Update `CHANGELOG.md` --------- Co-authored-by: Scott Mabin <scott@mabez.dev>
This commit is contained in:
Jesse Braham
GitHub
parent
5df246c702
commit
63ed40c368
@ -56,6 +56,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- Update `defmt` to 1.0 (#3416)
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- `spi::master::Spi::transfer` no longer returns the received data as a slice (#?)
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- esp-hal no longer clears the GPIO interrupt status bits by default. (#3408)
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- eFuse field definitions have been updated/corrected (#3440)
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- `spi::master::Spi::transfer` no longer returns the received data as a slice (#3417)
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- The `log` feature has been replaced by `log-04`. (#3425)
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- Multiple feature flags have been replaced by `unstable`. (#3425)
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@ -94,6 +95,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- Removed the inherent `degrade` method from peripheral singletons. (#3305)
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- Removed the `FullDuplex` trait from the PARL_IO driver. (#3339)
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- Removed `Flex::{set_as_input, set_as_output, set_drive_strength, set_as_open_drain, pull_direction}` functions (#3387)
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- The `Efuse::read_field_be` function has been removed (#3440)
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## v1.0.0-beta.0
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@ -1,118 +1,124 @@
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use core::{cmp, mem, slice};
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use bytemuck::AnyBitPattern;
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use crate::soc::efuse::{Efuse, EfuseBlock};
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/// The bit field for get access to efuse data
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#[derive(Clone, Copy)]
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#[allow(unused)]
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#[derive(Debug, Clone, Copy)]
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pub struct EfuseField {
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blk: EfuseBlock,
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bit_off: u16,
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bit_len: u16,
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pub(crate) block: EfuseBlock,
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pub(crate) word: u32,
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pub(crate) bit_start: u32,
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pub(crate) bit_count: u32,
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}
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impl EfuseField {
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pub(crate) const fn new(blk: EfuseBlock, bit_off: u16, bit_len: u16) -> Self {
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pub(crate) const fn new(block: u32, word: u32, bit_start: u32, bit_count: u32) -> Self {
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Self {
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blk,
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bit_off,
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bit_len,
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block: EfuseBlock::from_repr(block).unwrap(),
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word,
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bit_start,
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bit_count,
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}
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}
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}
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impl Efuse {
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/// Reads chip's MAC address from the eFuse storage.
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pub fn read_base_mac_address() -> [u8; 6] {
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let mut mac_addr = [0u8; 6];
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let mac0 = Self::read_field_le::<[u8; 4]>(crate::soc::efuse::MAC0);
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let mac1 = Self::read_field_le::<[u8; 2]>(crate::soc::efuse::MAC1);
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// MAC address is stored in big endian, so load the bytes in reverse:
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mac_addr[0] = mac1[1];
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mac_addr[1] = mac1[0];
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mac_addr[2] = mac0[3];
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mac_addr[3] = mac0[2];
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mac_addr[4] = mac0[1];
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mac_addr[5] = mac0[0];
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mac_addr
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}
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/// Read field value in a little-endian order
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#[inline(always)]
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pub fn read_field_le<T: AnyBitPattern>(field: EfuseField) -> T {
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let mut output = core::mem::MaybeUninit::<T>::uninit();
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// represent output value as a bytes slice
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let mut bytes = unsafe {
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core::slice::from_raw_parts_mut(
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output.as_mut_ptr() as *mut u8,
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core::mem::size_of::<T>(),
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)
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};
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// get block address
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let block_address = field.blk.address();
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let EfuseField {
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block,
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bit_start,
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bit_count,
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..
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} = field;
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let bit_off = field.bit_off as usize;
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let bit_end = (field.bit_len as usize).min(bytes.len() * 8) + bit_off;
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// Represent output value as a bytes slice:
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let mut output = mem::MaybeUninit::<T>::uninit();
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let mut bytes = unsafe {
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slice::from_raw_parts_mut(output.as_mut_ptr() as *mut u8, mem::size_of::<T>())
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};
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let bit_off = bit_start as usize;
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let bit_end = cmp::min(bit_count as usize, bytes.len() * 8) + bit_off;
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let mut last_word_off = bit_off / 32;
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let mut last_word = unsafe { block_address.add(last_word_off).read_volatile() };
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let mut last_word = unsafe { block.address().add(last_word_off).read_volatile() };
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let word_bit_off = bit_off % 32;
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let word_bit_ext = 32 - word_bit_off;
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let mut word_off = last_word_off;
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for bit_off in (bit_off..bit_end).step_by(32) {
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let word_bit_len = 32.min(bit_end - bit_off);
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if word_off != last_word_off {
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// read new word
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// Read a new word:
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last_word_off = word_off;
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last_word = unsafe { block_address.add(last_word_off).read_volatile() };
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last_word = unsafe { block.address().add(last_word_off).read_volatile() };
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}
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let mut word = last_word >> word_bit_off;
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word_off += 1;
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let word_bit_len = cmp::min(bit_end - bit_off, 32);
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if word_bit_len > word_bit_ext {
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// read the next word
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// Read the next word:
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last_word_off = word_off;
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last_word = unsafe { block_address.add(last_word_off).read_volatile() };
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// append bits from a beginning of the next word
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last_word = unsafe { block.address().add(last_word_off).read_volatile() };
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// Append bits from a beginning of the next word:
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word |= last_word.wrapping_shl((32 - word_bit_off) as u32);
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};
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if word_bit_len < 32 {
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// mask only needed bits of a word
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// Mask only needed bits of a word:
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word &= u32::MAX >> (32 - word_bit_len);
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}
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// get data length in bytes (ceil)
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// Represent word as a byte slice:
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let byte_len = word_bit_len.div_ceil(8);
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// represent word as a byte slice
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let word_bytes =
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unsafe { core::slice::from_raw_parts(&word as *const u32 as *const u8, byte_len) };
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unsafe { slice::from_raw_parts(&word as *const u32 as *const u8, byte_len) };
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// copy word bytes to output value bytes
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// Copy word bytes to output value bytes:
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bytes[..byte_len].copy_from_slice(word_bytes);
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// move read window forward
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// Move read window forward:
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bytes = &mut bytes[byte_len..];
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}
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// fill untouched bytes with zeros
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// Fill untouched bytes with zeros:
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bytes.fill(0);
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unsafe { output.assume_init() }
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}
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/// Read field value in a big-endian order
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#[inline(always)]
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pub fn read_field_be<T: AnyBitPattern>(field: EfuseField) -> T {
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// read value in a little-endian order
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let mut output = Self::read_field_le::<T>(field);
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// represent output value as a byte slice
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let bytes = unsafe {
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core::slice::from_raw_parts_mut(
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&mut output as *mut T as *mut u8,
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core::mem::size_of::<T>(),
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)
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};
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// reverse byte order
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bytes.reverse();
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output
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}
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/// Read bit value.
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///
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/// This function panics if the field's bit length is not equal to 1.
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#[inline(always)]
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#[cfg_attr(not(feature = "unstable"), allow(unused))]
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pub fn read_bit(field: EfuseField) -> bool {
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assert_eq!(field.bit_len, 1);
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assert_eq!(field.bit_count, 1);
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Self::read_field_le::<u8>(field) != 0
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}
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}
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@ -1,228 +1,142 @@
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//! eFuse fields for the ESP32.
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//!
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//! This file was automatically generated, please do not edit it manually!
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//!
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//! For information on how to regenerate these files, please refer to the
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//! `xtask` package's `README.md` file.
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//!
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//! Generated on: 2024-03-11
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//! ESP-IDF Commit: 0de2912f
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//! Generated: 2025-04-15 12:51
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//! Version: 369d2d860d34e777c0f7d545a7dfc3c4
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use super::EfuseBlock;
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use crate::soc::efuse_field::EfuseField;
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#![allow(clippy::empty_docs)]
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/// `[]` Efuse write disable mask
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pub const WR_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 16);
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/// `[WR_DIS.EFUSE_RD_DISABLE]` wr_dis of RD_DIS
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pub const WR_DIS_RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 1);
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/// `[]` wr_dis of WR_DIS
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pub const WR_DIS_WR_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 1, 1);
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/// `[]` wr_dis of FLASH_CRYPT_CNT
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pub const WR_DIS_FLASH_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
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/// `[]` wr_dis of UART_DOWNLOAD_DIS
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pub const WR_DIS_UART_DOWNLOAD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
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/// `[WR_DIS.MAC_FACTORY]` wr_dis of MAC
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pub const WR_DIS_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
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/// `[WR_DIS.MAC_FACTORY_CRC]` wr_dis of MAC_CRC
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pub const WR_DIS_MAC_CRC: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
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/// `[WR_DIS.CHIP_VER_DIS_APP_CPU]` wr_dis of DISABLE_APP_CPU
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pub const WR_DIS_DISABLE_APP_CPU: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
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/// `[WR_DIS.CHIP_VER_DIS_BT]` wr_dis of DISABLE_BT
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pub const WR_DIS_DISABLE_BT: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
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/// `[WR_DIS.CHIP_VER_DIS_CACHE]` wr_dis of DIS_CACHE
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pub const WR_DIS_DIS_CACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
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/// `[]` wr_dis of VOL_LEVEL_HP_INV
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pub const WR_DIS_VOL_LEVEL_HP_INV: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
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/// `[WR_DIS.CK8M_FREQ]` wr_dis of CLK8M_FREQ
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pub const WR_DIS_CLK8M_FREQ: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
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/// `[]` wr_dis of ADC_VREF
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pub const WR_DIS_ADC_VREF: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
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/// `[]` wr_dis of XPD_SDIO_REG
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pub const WR_DIS_XPD_SDIO_REG: EfuseField = EfuseField::new(EfuseBlock::Block0, 5, 1);
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/// `[WR_DIS.SDIO_TIEH]` wr_dis of XPD_SDIO_TIEH
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pub const WR_DIS_XPD_SDIO_TIEH: EfuseField = EfuseField::new(EfuseBlock::Block0, 5, 1);
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/// `[WR_DIS.SDIO_FORCE]` wr_dis of XPD_SDIO_FORCE
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pub const WR_DIS_XPD_SDIO_FORCE: EfuseField = EfuseField::new(EfuseBlock::Block0, 5, 1);
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/// `[]` wr_dis of SPI_PAD_CONFIG_CLK
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pub const WR_DIS_SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
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/// `[]` wr_dis of SPI_PAD_CONFIG_Q
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pub const WR_DIS_SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
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/// `[]` wr_dis of SPI_PAD_CONFIG_D
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pub const WR_DIS_SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
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/// `[]` wr_dis of SPI_PAD_CONFIG_CS0
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pub const WR_DIS_SPI_PAD_CONFIG_CS0: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
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/// `[WR_DIS.ENCRYPT_FLASH_KEY WR_DIS.BLK1]` wr_dis of BLOCK1
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pub const WR_DIS_BLOCK1: EfuseField = EfuseField::new(EfuseBlock::Block0, 7, 1);
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/// `[WR_DIS.SECURE_BOOT_KEY WR_DIS.BLK2]` wr_dis of BLOCK2
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pub const WR_DIS_BLOCK2: EfuseField = EfuseField::new(EfuseBlock::Block0, 8, 1);
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/// `[WR_DIS.BLK3]` wr_dis of BLOCK3
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pub const WR_DIS_BLOCK3: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
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/// `[WR_DIS.MAC_CUSTOM_CRC]` wr_dis of CUSTOM_MAC_CRC
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pub const WR_DIS_CUSTOM_MAC_CRC: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
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/// `[WR_DIS.MAC_CUSTOM]` wr_dis of CUSTOM_MAC
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pub const WR_DIS_CUSTOM_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
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/// `[]` wr_dis of ADC1_TP_LOW
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pub const WR_DIS_ADC1_TP_LOW: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
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/// `[]` wr_dis of ADC1_TP_HIGH
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pub const WR_DIS_ADC1_TP_HIGH: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
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/// `[]` wr_dis of ADC2_TP_LOW
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pub const WR_DIS_ADC2_TP_LOW: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
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/// `[]` wr_dis of ADC2_TP_HIGH
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pub const WR_DIS_ADC2_TP_HIGH: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
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/// `[]` wr_dis of SECURE_VERSION
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pub const WR_DIS_SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
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/// `[WR_DIS.MAC_CUSTOM_VER]` wr_dis of MAC_VERSION
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pub const WR_DIS_MAC_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
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/// `[]` wr_dis of BLK3_PART_RESERVE
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pub const WR_DIS_BLK3_PART_RESERVE: EfuseField = EfuseField::new(EfuseBlock::Block0, 10, 1);
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/// `[WR_DIS.ENCRYPT_CONFIG]` wr_dis of FLASH_CRYPT_CONFIG
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pub const WR_DIS_FLASH_CRYPT_CONFIG: EfuseField = EfuseField::new(EfuseBlock::Block0, 10, 1);
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/// `[]` wr_dis of CODING_SCHEME
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pub const WR_DIS_CODING_SCHEME: EfuseField = EfuseField::new(EfuseBlock::Block0, 10, 1);
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/// `[]` wr_dis of KEY_STATUS
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pub const WR_DIS_KEY_STATUS: EfuseField = EfuseField::new(EfuseBlock::Block0, 10, 1);
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/// `[]` wr_dis of ABS_DONE_0
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pub const WR_DIS_ABS_DONE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 12, 1);
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/// `[]` wr_dis of ABS_DONE_1
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pub const WR_DIS_ABS_DONE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 13, 1);
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/// `[WR_DIS.DISABLE_JTAG]` wr_dis of JTAG_DISABLE
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pub const WR_DIS_JTAG_DISABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 14, 1);
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/// `[]` wr_dis of CONSOLE_DEBUG_DISABLE
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pub const WR_DIS_CONSOLE_DEBUG_DISABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 15, 1);
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/// `[]` wr_dis of DISABLE_DL_ENCRYPT
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pub const WR_DIS_DISABLE_DL_ENCRYPT: EfuseField = EfuseField::new(EfuseBlock::Block0, 15, 1);
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/// `[]` wr_dis of DISABLE_DL_DECRYPT
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pub const WR_DIS_DISABLE_DL_DECRYPT: EfuseField = EfuseField::new(EfuseBlock::Block0, 15, 1);
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/// `[]` wr_dis of DISABLE_DL_CACHE
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pub const WR_DIS_DISABLE_DL_CACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 15, 1);
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/// `[]` Disable reading from BlOCK1-3
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pub const RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 16, 4);
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/// `[RD_DIS.ENCRYPT_FLASH_KEY RD_DIS.BLK1]` rd_dis of BLOCK1
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pub const RD_DIS_BLOCK1: EfuseField = EfuseField::new(EfuseBlock::Block0, 16, 1);
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/// `[RD_DIS.SECURE_BOOT_KEY RD_DIS.BLK2]` rd_dis of BLOCK2
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pub const RD_DIS_BLOCK2: EfuseField = EfuseField::new(EfuseBlock::Block0, 17, 1);
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/// `[RD_DIS.BLK3]` rd_dis of BLOCK3
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pub const RD_DIS_BLOCK3: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
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/// `[RD_DIS.MAC_CUSTOM_CRC]` rd_dis of CUSTOM_MAC_CRC
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pub const RD_DIS_CUSTOM_MAC_CRC: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
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/// `[RD_DIS.MAC_CUSTOM]` rd_dis of CUSTOM_MAC
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pub const RD_DIS_CUSTOM_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
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/// `[]` rd_dis of ADC1_TP_LOW
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pub const RD_DIS_ADC1_TP_LOW: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
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/// `[]` rd_dis of ADC1_TP_HIGH
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pub const RD_DIS_ADC1_TP_HIGH: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
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/// `[]` rd_dis of ADC2_TP_LOW
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pub const RD_DIS_ADC2_TP_LOW: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
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/// `[]` rd_dis of ADC2_TP_HIGH
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pub const RD_DIS_ADC2_TP_HIGH: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
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/// `[]` rd_dis of SECURE_VERSION
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pub const RD_DIS_SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
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/// `[RD_DIS.MAC_CUSTOM_VER]` rd_dis of MAC_VERSION
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pub const RD_DIS_MAC_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
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/// `[]` rd_dis of BLK3_PART_RESERVE
|
||||
pub const RD_DIS_BLK3_PART_RESERVE: EfuseField = EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[RD_DIS.ENCRYPT_CONFIG]` rd_dis of FLASH_CRYPT_CONFIG
|
||||
pub const RD_DIS_FLASH_CRYPT_CONFIG: EfuseField = EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` rd_dis of CODING_SCHEME
|
||||
pub const RD_DIS_CODING_SCHEME: EfuseField = EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` rd_dis of KEY_STATUS
|
||||
pub const RD_DIS_KEY_STATUS: EfuseField = EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` Flash encryption is enabled if this field has an odd number of bits set
|
||||
pub const FLASH_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 7);
|
||||
/// `[]` Disable UART download mode. Valid for ESP32 V3 and newer; only
|
||||
pub const UART_DOWNLOAD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 27, 1);
|
||||
/// `[MAC_FACTORY]` MAC address
|
||||
pub const MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 48);
|
||||
/// `[MAC_FACTORY_CRC]` CRC8 for MAC address
|
||||
pub const MAC_CRC: EfuseField = EfuseField::new(EfuseBlock::Block0, 80, 8);
|
||||
/// `[CHIP_VER_DIS_APP_CPU]` Disables APP CPU
|
||||
pub const DISABLE_APP_CPU: EfuseField = EfuseField::new(EfuseBlock::Block0, 96, 1);
|
||||
/// `[CHIP_VER_DIS_BT]` Disables Bluetooth
|
||||
pub const DISABLE_BT: EfuseField = EfuseField::new(EfuseBlock::Block0, 97, 1);
|
||||
/// `[CHIP_VER_PKG_4BIT]` Chip package identifier
|
||||
pub const CHIP_PACKAGE_4BIT: EfuseField = EfuseField::new(EfuseBlock::Block0, 98, 1);
|
||||
/// `[CHIP_VER_DIS_CACHE]` Disables cache
|
||||
pub const DIS_CACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 99, 1);
|
||||
/// `[]` read for SPI_pad_config_hd
|
||||
pub const SPI_PAD_CONFIG_HD: EfuseField = EfuseField::new(EfuseBlock::Block0, 100, 5);
|
||||
/// `[CHIP_VER_PKG]` Chip package identifier
|
||||
pub const CHIP_PACKAGE: EfuseField = EfuseField::new(EfuseBlock::Block0, 105, 3);
|
||||
/// `[]` If set alongside EFUSE_RD_CHIP_CPU_FREQ_RATED; the ESP32's max CPU
|
||||
/// frequency is rated for 160MHz. 240MHz otherwise
|
||||
pub const CHIP_CPU_FREQ_LOW: EfuseField = EfuseField::new(EfuseBlock::Block0, 108, 1);
|
||||
/// `[]` If set; the ESP32's maximum CPU frequency has been rated
|
||||
pub const CHIP_CPU_FREQ_RATED: EfuseField = EfuseField::new(EfuseBlock::Block0, 109, 1);
|
||||
/// `[]` BLOCK3 partially served for ADC calibration data
|
||||
pub const BLK3_PART_RESERVE: EfuseField = EfuseField::new(EfuseBlock::Block0, 110, 1);
|
||||
/// `[]` bit is set to 1 for rev1 silicon
|
||||
pub const CHIP_VER_REV1: EfuseField = EfuseField::new(EfuseBlock::Block0, 111, 1);
|
||||
/// `[CK8M_FREQ]` 8MHz clock freq override
|
||||
pub const CLK8M_FREQ: EfuseField = EfuseField::new(EfuseBlock::Block0, 128, 8);
|
||||
/// `[]` True ADC reference voltage
|
||||
pub const ADC_VREF: EfuseField = EfuseField::new(EfuseBlock::Block0, 136, 5);
|
||||
/// `[]` read for XPD_SDIO_REG
|
||||
pub const XPD_SDIO_REG: EfuseField = EfuseField::new(EfuseBlock::Block0, 142, 1);
|
||||
/// `[SDIO_TIEH]` If XPD_SDIO_FORCE & XPD_SDIO_REG {1: "3.3V"; 0: "1.8V"}
|
||||
pub const XPD_SDIO_TIEH: EfuseField = EfuseField::new(EfuseBlock::Block0, 143, 1);
|
||||
/// `[SDIO_FORCE]` Ignore MTDI pin (GPIO12) for VDD_SDIO on reset
|
||||
pub const XPD_SDIO_FORCE: EfuseField = EfuseField::new(EfuseBlock::Block0, 144, 1);
|
||||
/// `[]` Override SD_CLK pad (GPIO6/SPICLK)
|
||||
pub const SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(EfuseBlock::Block0, 160, 5);
|
||||
/// `[]` Override SD_DATA_0 pad (GPIO7/SPIQ)
|
||||
pub const SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(EfuseBlock::Block0, 165, 5);
|
||||
/// `[]` Override SD_DATA_1 pad (GPIO8/SPID)
|
||||
pub const SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(EfuseBlock::Block0, 170, 5);
|
||||
/// `[]` Override SD_CMD pad (GPIO11/SPICS0)
|
||||
pub const SPI_PAD_CONFIG_CS0: EfuseField = EfuseField::new(EfuseBlock::Block0, 175, 5);
|
||||
/// `[]`
|
||||
pub const CHIP_VER_REV2: EfuseField = EfuseField::new(EfuseBlock::Block0, 180, 1);
|
||||
/// `[]` This field stores the voltage level for CPU to run at 240 MHz; or for
|
||||
use super::EfuseField;
|
||||
|
||||
/// Efuse write disable mask
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(0, 0, 0, 16);
|
||||
/// Disable reading from BlOCK1-3
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(0, 0, 16, 4);
|
||||
/// Flash encryption is enabled if this field has an odd number of bits set
|
||||
pub const FLASH_CRYPT_CNT: EfuseField = EfuseField::new(0, 0, 20, 7);
|
||||
/// Disable UART download mode. Valid for ESP32 V3 and newer; only
|
||||
pub const UART_DOWNLOAD_DIS: EfuseField = EfuseField::new(0, 0, 27, 1);
|
||||
/// reserved
|
||||
pub const RESERVED_0_28: EfuseField = EfuseField::new(0, 0, 28, 4);
|
||||
/// MAC address
|
||||
pub const MAC0: EfuseField = EfuseField::new(0, 1, 0, 32);
|
||||
/// MAC address
|
||||
pub const MAC1: EfuseField = EfuseField::new(0, 2, 32, 16);
|
||||
/// CRC8 for MAC address
|
||||
pub const MAC_CRC: EfuseField = EfuseField::new(0, 2, 80, 8);
|
||||
/// Reserved; it was created by set_missed_fields_in_regs func
|
||||
pub const RESERVE_0_88: EfuseField = EfuseField::new(0, 2, 88, 8);
|
||||
/// Disables APP CPU
|
||||
pub const DISABLE_APP_CPU: EfuseField = EfuseField::new(0, 3, 96, 1);
|
||||
/// Disables Bluetooth
|
||||
pub const DISABLE_BT: EfuseField = EfuseField::new(0, 3, 97, 1);
|
||||
/// Chip package identifier #4bit
|
||||
pub const CHIP_PACKAGE_4BIT: EfuseField = EfuseField::new(0, 3, 98, 1);
|
||||
/// Disables cache
|
||||
pub const DIS_CACHE: EfuseField = EfuseField::new(0, 3, 99, 1);
|
||||
/// read for SPI_pad_config_hd
|
||||
pub const SPI_PAD_CONFIG_HD: EfuseField = EfuseField::new(0, 3, 100, 5);
|
||||
/// Chip package identifier
|
||||
pub const CHIP_PACKAGE: EfuseField = EfuseField::new(0, 3, 105, 3);
|
||||
/// If set alongside EFUSE_RD_CHIP_CPU_FREQ_RATED; the ESP32's max CPU frequency
|
||||
/// is rated for 160MHz. 240MHz otherwise
|
||||
pub const CHIP_CPU_FREQ_LOW: EfuseField = EfuseField::new(0, 3, 108, 1);
|
||||
/// If set; the ESP32's maximum CPU frequency has been rated
|
||||
pub const CHIP_CPU_FREQ_RATED: EfuseField = EfuseField::new(0, 3, 109, 1);
|
||||
/// BLOCK3 partially served for ADC calibration data
|
||||
pub const BLK3_PART_RESERVE: EfuseField = EfuseField::new(0, 3, 110, 1);
|
||||
/// bit is set to 1 for rev1 silicon
|
||||
pub const CHIP_VER_REV1: EfuseField = EfuseField::new(0, 3, 111, 1);
|
||||
/// Reserved; it was created by set_missed_fields_in_regs func
|
||||
pub const RESERVE_0_112: EfuseField = EfuseField::new(0, 3, 112, 16);
|
||||
/// 8MHz clock freq override
|
||||
pub const CLK8M_FREQ: EfuseField = EfuseField::new(0, 4, 128, 8);
|
||||
/// True ADC reference voltage
|
||||
pub const ADC_VREF: EfuseField = EfuseField::new(0, 4, 136, 5);
|
||||
/// Reserved; it was created by set_missed_fields_in_regs func
|
||||
pub const RESERVE_0_141: EfuseField = EfuseField::new(0, 4, 141, 1);
|
||||
/// read for XPD_SDIO_REG
|
||||
pub const XPD_SDIO_REG: EfuseField = EfuseField::new(0, 4, 142, 1);
|
||||
/// If XPD_SDIO_FORCE & XPD_SDIO_REG
|
||||
pub const XPD_SDIO_TIEH: EfuseField = EfuseField::new(0, 4, 143, 1);
|
||||
/// Ignore MTDI pin (GPIO12) for VDD_SDIO on reset
|
||||
pub const XPD_SDIO_FORCE: EfuseField = EfuseField::new(0, 4, 144, 1);
|
||||
/// Reserved; it was created by set_missed_fields_in_regs func
|
||||
pub const RESERVE_0_145: EfuseField = EfuseField::new(0, 4, 145, 15);
|
||||
/// Override SD_CLK pad (GPIO6/SPICLK)
|
||||
pub const SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(0, 5, 160, 5);
|
||||
/// Override SD_DATA_0 pad (GPIO7/SPIQ)
|
||||
pub const SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(0, 5, 165, 5);
|
||||
/// Override SD_DATA_1 pad (GPIO8/SPID)
|
||||
pub const SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(0, 5, 170, 5);
|
||||
/// Override SD_CMD pad (GPIO11/SPICS0)
|
||||
pub const SPI_PAD_CONFIG_CS0: EfuseField = EfuseField::new(0, 5, 175, 5);
|
||||
///
|
||||
pub const CHIP_VER_REV2: EfuseField = EfuseField::new(0, 5, 180, 1);
|
||||
/// Reserved; it was created by set_missed_fields_in_regs func
|
||||
pub const RESERVE_0_181: EfuseField = EfuseField::new(0, 5, 181, 1);
|
||||
/// This field stores the voltage level for CPU to run at 240 MHz; or for
|
||||
/// flash/PSRAM to run at 80 MHz.0x0: level 7; 0x1: level 6; 0x2: level 5; 0x3:
|
||||
/// level 4. (RO)
|
||||
pub const VOL_LEVEL_HP_INV: EfuseField = EfuseField::new(EfuseBlock::Block0, 182, 2);
|
||||
/// `[]`
|
||||
pub const WAFER_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 184, 2);
|
||||
/// `[ENCRYPT_CONFIG]` Flash encryption config (key tweak bits)
|
||||
pub const FLASH_CRYPT_CONFIG: EfuseField = EfuseField::new(EfuseBlock::Block0, 188, 4);
|
||||
/// `[]` Efuse variable block length scheme {0: "NONE (BLK1-3 len=256 bits)"; 1:
|
||||
/// "3/4 (BLK1-3 len=192 bits)"; 2: "REPEAT (BLK1-3 len=128 bits) not
|
||||
/// supported"; 3: "NONE (BLK1-3 len=256 bits)"}
|
||||
pub const CODING_SCHEME: EfuseField = EfuseField::new(EfuseBlock::Block0, 192, 2);
|
||||
/// `[]` Disable ROM BASIC interpreter fallback
|
||||
pub const CONSOLE_DEBUG_DISABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 194, 1);
|
||||
/// `[]`
|
||||
pub const DISABLE_SDIO_HOST: EfuseField = EfuseField::new(EfuseBlock::Block0, 195, 1);
|
||||
/// `[]` Secure boot V1 is enabled for bootloader image
|
||||
pub const ABS_DONE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 196, 1);
|
||||
/// `[]` Secure boot V2 is enabled for bootloader image
|
||||
pub const ABS_DONE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 197, 1);
|
||||
/// `[DISABLE_JTAG]` Disable JTAG
|
||||
pub const JTAG_DISABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 198, 1);
|
||||
/// `[]` Disable flash encryption in UART bootloader
|
||||
pub const DISABLE_DL_ENCRYPT: EfuseField = EfuseField::new(EfuseBlock::Block0, 199, 1);
|
||||
/// `[]` Disable flash decryption in UART bootloader
|
||||
pub const DISABLE_DL_DECRYPT: EfuseField = EfuseField::new(EfuseBlock::Block0, 200, 1);
|
||||
/// `[]` Disable flash cache in UART bootloader
|
||||
pub const DISABLE_DL_CACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 201, 1);
|
||||
/// `[]` Usage of efuse block 3 (reserved)
|
||||
pub const KEY_STATUS: EfuseField = EfuseField::new(EfuseBlock::Block0, 202, 1);
|
||||
/// `[MAC_CUSTOM_CRC]` CRC8 for custom MAC address
|
||||
pub const CUSTOM_MAC_CRC: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 8);
|
||||
/// `[MAC_CUSTOM]` Custom MAC address
|
||||
pub const MAC_CUSTOM: EfuseField = EfuseField::new(EfuseBlock::Block3, 8, 48);
|
||||
/// `[]` ADC1 Two Point calibration low point. Only valid if
|
||||
pub const VOL_LEVEL_HP_INV: EfuseField = EfuseField::new(0, 5, 182, 2);
|
||||
///
|
||||
pub const WAFER_VERSION_MINOR: EfuseField = EfuseField::new(0, 5, 184, 2);
|
||||
/// Reserved; it was created by set_missed_fields_in_regs func
|
||||
pub const RESERVE_0_186: EfuseField = EfuseField::new(0, 5, 186, 2);
|
||||
/// Flash encryption config (key tweak bits)
|
||||
pub const FLASH_CRYPT_CONFIG: EfuseField = EfuseField::new(0, 5, 188, 4);
|
||||
/// Efuse variable block length scheme
|
||||
pub const CODING_SCHEME: EfuseField = EfuseField::new(0, 6, 192, 2);
|
||||
/// Disable ROM BASIC interpreter fallback
|
||||
pub const CONSOLE_DEBUG_DISABLE: EfuseField = EfuseField::new(0, 6, 194, 1);
|
||||
///
|
||||
pub const DISABLE_SDIO_HOST: EfuseField = EfuseField::new(0, 6, 195, 1);
|
||||
/// Secure boot V1 is enabled for bootloader image
|
||||
pub const ABS_DONE_0: EfuseField = EfuseField::new(0, 6, 196, 1);
|
||||
/// Secure boot V2 is enabled for bootloader image
|
||||
pub const ABS_DONE_1: EfuseField = EfuseField::new(0, 6, 197, 1);
|
||||
/// Disable JTAG
|
||||
pub const JTAG_DISABLE: EfuseField = EfuseField::new(0, 6, 198, 1);
|
||||
/// Disable flash encryption in UART bootloader
|
||||
pub const DISABLE_DL_ENCRYPT: EfuseField = EfuseField::new(0, 6, 199, 1);
|
||||
/// Disable flash decryption in UART bootloader
|
||||
pub const DISABLE_DL_DECRYPT: EfuseField = EfuseField::new(0, 6, 200, 1);
|
||||
/// Disable flash cache in UART bootloader
|
||||
pub const DISABLE_DL_CACHE: EfuseField = EfuseField::new(0, 6, 201, 1);
|
||||
/// Usage of efuse block 3 (reserved)
|
||||
pub const KEY_STATUS: EfuseField = EfuseField::new(0, 6, 202, 1);
|
||||
/// Reserved; it was created by set_missed_fields_in_regs func
|
||||
pub const RESERVE_0_203: EfuseField = EfuseField::new(0, 6, 203, 21);
|
||||
/// Flash encryption key
|
||||
pub const BLOCK1: EfuseField = EfuseField::new(1, 0, 0, 256);
|
||||
/// Security boot key
|
||||
pub const BLOCK2: EfuseField = EfuseField::new(2, 0, 0, 256);
|
||||
/// CRC8 for custom MAC address
|
||||
pub const CUSTOM_MAC_CRC: EfuseField = EfuseField::new(3, 0, 0, 8);
|
||||
/// Custom MAC address
|
||||
pub const CUSTOM_MAC: EfuseField = EfuseField::new(3, 0, 8, 48);
|
||||
/// reserved
|
||||
pub const RESERVED_3_56: EfuseField = EfuseField::new(3, 1, 56, 8);
|
||||
/// read for BLOCK3
|
||||
pub const BLK3_RESERVED_2: EfuseField = EfuseField::new(3, 2, 64, 32);
|
||||
/// ADC1 Two Point calibration low point. Only valid if
|
||||
/// EFUSE_RD_BLK3_PART_RESERVE
|
||||
pub const ADC1_TP_LOW: EfuseField = EfuseField::new(EfuseBlock::Block3, 96, 7);
|
||||
/// `[]` ADC1 Two Point calibration high point. Only valid if
|
||||
pub const ADC1_TP_LOW: EfuseField = EfuseField::new(3, 3, 96, 7);
|
||||
/// ADC1 Two Point calibration high point. Only valid if
|
||||
/// EFUSE_RD_BLK3_PART_RESERVE
|
||||
pub const ADC1_TP_HIGH: EfuseField = EfuseField::new(EfuseBlock::Block3, 103, 9);
|
||||
/// `[]` ADC2 Two Point calibration low point. Only valid if
|
||||
pub const ADC1_TP_HIGH: EfuseField = EfuseField::new(3, 3, 103, 9);
|
||||
/// ADC2 Two Point calibration low point. Only valid if
|
||||
/// EFUSE_RD_BLK3_PART_RESERVE
|
||||
pub const ADC2_TP_LOW: EfuseField = EfuseField::new(EfuseBlock::Block3, 112, 7);
|
||||
/// `[]` ADC2 Two Point calibration high point. Only valid if
|
||||
pub const ADC2_TP_LOW: EfuseField = EfuseField::new(3, 3, 112, 7);
|
||||
/// ADC2 Two Point calibration high point. Only valid if
|
||||
/// EFUSE_RD_BLK3_PART_RESERVE
|
||||
pub const ADC2_TP_HIGH: EfuseField = EfuseField::new(EfuseBlock::Block3, 119, 9);
|
||||
/// `[]` Secure version for anti-rollback
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block3, 128, 32);
|
||||
/// `[MAC_CUSTOM_VER]` Version of the MAC field {1: "Custom MAC in BLOCK3"}
|
||||
pub const MAC_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block3, 184, 8);
|
||||
pub const ADC2_TP_HIGH: EfuseField = EfuseField::new(3, 3, 119, 9);
|
||||
/// Secure version for anti-rollback
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(3, 4, 128, 32);
|
||||
/// reserved
|
||||
pub const RESERVED_3_160: EfuseField = EfuseField::new(3, 5, 160, 24);
|
||||
/// Version of the MAC field
|
||||
pub const MAC_VERSION: EfuseField = EfuseField::new(3, 5, 184, 8);
|
||||
/// read for BLOCK3
|
||||
pub const BLK3_RESERVED_6: EfuseField = EfuseField::new(3, 6, 192, 32);
|
||||
/// read for BLOCK3
|
||||
pub const BLK3_RESERVED_7: EfuseField = EfuseField::new(3, 7, 224, 32);
|
||||
|
||||
@ -48,7 +48,7 @@
|
||||
//! ```
|
||||
|
||||
pub use self::fields::*;
|
||||
use crate::{peripherals::EFUSE, time::Rate};
|
||||
use crate::{peripherals::EFUSE, soc::efuse_field::EfuseField, time::Rate};
|
||||
|
||||
mod fields;
|
||||
|
||||
@ -75,11 +75,6 @@ pub enum ChipType {
|
||||
}
|
||||
|
||||
impl Efuse {
|
||||
/// Reads the base MAC address from the eFuse memory.
|
||||
pub fn read_base_mac_address() -> [u8; 6] {
|
||||
Self::read_field_be(MAC)
|
||||
}
|
||||
|
||||
/// Returns the number of CPUs available on the chip.
|
||||
///
|
||||
/// While ESP32 chips usually come with two mostly equivalent CPUs (protocol
|
||||
@ -135,8 +130,8 @@ impl Efuse {
|
||||
}
|
||||
}
|
||||
|
||||
#[allow(unused)]
|
||||
#[derive(Copy, Clone)]
|
||||
#[derive(Debug, Clone, Copy, strum::FromRepr)]
|
||||
#[repr(u32)]
|
||||
pub(crate) enum EfuseBlock {
|
||||
Block0,
|
||||
Block1,
|
||||
|
||||
@ -1,210 +1,116 @@
|
||||
//! eFuse fields for the ESP32-C2.
|
||||
//!
|
||||
//! This file was automatically generated, please do not edit it manually!
|
||||
//!
|
||||
//! For information on how to regenerate these files, please refer to the
|
||||
//! `xtask` package's `README.md` file.
|
||||
//!
|
||||
//! Generated on: 2024-03-11
|
||||
//! ESP-IDF Commit: 0de2912f
|
||||
//! Generated: 2025-04-22 11:33
|
||||
//! Version: 897499b0349a608b895d467abbcf006b
|
||||
|
||||
use super::EfuseBlock;
|
||||
use crate::soc::efuse_field::EfuseField;
|
||||
#![allow(clippy::empty_docs)]
|
||||
|
||||
/// `[]` Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 8);
|
||||
/// `[]` wr_dis of RD_DIS
|
||||
pub const WR_DIS_RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 1);
|
||||
/// `[]` wr_dis of WDT_DELAY_SEL
|
||||
pub const WR_DIS_WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 1, 1);
|
||||
/// `[]` wr_dis of DIS_PAD_JTAG
|
||||
pub const WR_DIS_DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 1, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_ICACHE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 1, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of SPI_BOOT_CRYPT_CNT
|
||||
pub const WR_DIS_SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of XTS_KEY_LENGTH_256
|
||||
pub const WR_DIS_XTS_KEY_LENGTH_256: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_EN
|
||||
pub const WR_DIS_SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of UART_PRINT_CONTROL
|
||||
pub const WR_DIS_UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of FORCE_SEND_RESUME
|
||||
pub const WR_DIS_FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of DIS_DIRECT_BOOT
|
||||
pub const WR_DIS_DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of ENABLE_SECURITY_DOWNLOAD
|
||||
pub const WR_DIS_ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of FLASH_TPUW
|
||||
pub const WR_DIS_FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of SECURE_VERSION
|
||||
pub const WR_DIS_SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
|
||||
/// `[WR_DIS.ENABLE_CUSTOM_MAC]` wr_dis of CUSTOM_MAC_USED
|
||||
pub const WR_DIS_CUSTOM_MAC_USED: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
|
||||
/// `[]` wr_dis of DISABLE_WAFER_VERSION_MAJOR
|
||||
pub const WR_DIS_DISABLE_WAFER_VERSION_MAJOR: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 4, 1);
|
||||
/// `[]` wr_dis of DISABLE_BLK_VERSION_MAJOR
|
||||
pub const WR_DIS_DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
|
||||
/// `[WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM]` wr_dis of CUSTOM_MAC
|
||||
pub const WR_DIS_CUSTOM_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 5, 1);
|
||||
/// `[WR_DIS.MAC_FACTORY]` wr_dis of MAC
|
||||
pub const WR_DIS_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MINOR
|
||||
pub const WR_DIS_WAFER_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MAJOR
|
||||
pub const WR_DIS_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of PKG_VERSION
|
||||
pub const WR_DIS_PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MINOR
|
||||
pub const WR_DIS_BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MAJOR
|
||||
pub const WR_DIS_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of OCODE
|
||||
pub const WR_DIS_OCODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of TEMP_CALIB
|
||||
pub const WR_DIS_TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN3
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN0
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN3
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of DIG_DBIAS_HVT
|
||||
pub const WR_DIS_DIG_DBIAS_HVT: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of DIG_LDO_SLP_DBIAS2
|
||||
pub const WR_DIS_DIG_LDO_SLP_DBIAS2: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of DIG_LDO_SLP_DBIAS26
|
||||
pub const WR_DIS_DIG_LDO_SLP_DBIAS26: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of DIG_LDO_ACT_DBIAS26
|
||||
pub const WR_DIS_DIG_LDO_ACT_DBIAS26: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of DIG_LDO_ACT_STEPD10
|
||||
pub const WR_DIS_DIG_LDO_ACT_STEPD10: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of RTC_LDO_SLP_DBIAS13
|
||||
pub const WR_DIS_RTC_LDO_SLP_DBIAS13: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of RTC_LDO_SLP_DBIAS29
|
||||
pub const WR_DIS_RTC_LDO_SLP_DBIAS29: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of RTC_LDO_SLP_DBIAS31
|
||||
pub const WR_DIS_RTC_LDO_SLP_DBIAS31: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of RTC_LDO_ACT_DBIAS31
|
||||
pub const WR_DIS_RTC_LDO_ACT_DBIAS31: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of RTC_LDO_ACT_DBIAS13
|
||||
pub const WR_DIS_RTC_LDO_ACT_DBIAS13: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of ADC_CALIBRATION_3
|
||||
pub const WR_DIS_ADC_CALIBRATION_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[WR_DIS.KEY0]` wr_dis of BLOCK_KEY0
|
||||
pub const WR_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 7, 1);
|
||||
/// `[]` Disable reading from BlOCK3
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 2);
|
||||
/// `[]` Read protection for EFUSE_BLK3. KEY0
|
||||
pub const RD_DIS_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 2);
|
||||
/// `[]` Read protection for EFUSE_BLK3. KEY0 lower 128-bit key
|
||||
pub const RD_DIS_KEY0_LOW: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 1);
|
||||
/// `[]` Read protection for EFUSE_BLK3. KEY0 higher 128-bit key
|
||||
pub const RD_DIS_KEY0_HI: EfuseField = EfuseField::new(EfuseBlock::Block0, 33, 1);
|
||||
/// `[]` RTC watchdog timeout threshold; in unit of slow clock cycle {0:
|
||||
/// "40000"; 1: "80000"; 2: "160000"; 3: "320000"}
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 34, 2);
|
||||
/// `[]` Set this bit to disable pad jtag
|
||||
pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 36, 1);
|
||||
/// `[]` The bit be set to disable icache in download mode
|
||||
pub const DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 37, 1);
|
||||
/// `[]` The bit be set to disable manual encryption
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(EfuseBlock::Block0, 38, 1);
|
||||
/// `[]` Enables flash encryption when 1 or 3 bits are set and disables
|
||||
/// otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 39, 3);
|
||||
/// `[]` Flash encryption key length {0: "128 bits key"; 1: "256 bits key"}
|
||||
pub const XTS_KEY_LENGTH_256: EfuseField = EfuseField::new(EfuseBlock::Block0, 42, 1);
|
||||
/// `[]` Set the default UARTboot message output mode {0: "Enable"; 1: "Enable
|
||||
/// when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3:
|
||||
/// "Disable"}
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 43, 2);
|
||||
/// `[]` Set this bit to force ROM code to send a resume command during SPI boot
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 45, 1);
|
||||
/// `[]` Set this bit to disable download mode (boot_mode`[3:0]` = 0; 1; 2; 4;
|
||||
/// 5; 6; 7)
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 46, 1);
|
||||
/// `[]` This bit set means disable direct_boot mode
|
||||
pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 47, 1);
|
||||
/// `[]` Set this bit to enable secure UART download mode
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 48, 1);
|
||||
/// `[]` Configures flash waiting time after power-up; in unit of ms. If the
|
||||
/// value is less than 15; the waiting time is the configurable value.
|
||||
/// Otherwise; the waiting time is twice the configurable value
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 49, 4);
|
||||
/// `[]` The bit be set to enable secure boot
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 53, 1);
|
||||
/// `[]` Secure version for anti-rollback
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 54, 4);
|
||||
/// `[ENABLE_CUSTOM_MAC]` True if MAC_CUSTOM is burned
|
||||
pub const CUSTOM_MAC_USED: EfuseField = EfuseField::new(EfuseBlock::Block0, 58, 1);
|
||||
/// `[]` Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 59, 1);
|
||||
/// `[]` Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 60, 1);
|
||||
/// `[]` User data block
|
||||
pub const USER_DATA: EfuseField = EfuseField::new(EfuseBlock::Block1, 0, 88);
|
||||
/// `[MAC_CUSTOM CUSTOM_MAC]` Custom MAC address
|
||||
pub const USER_DATA_MAC_CUSTOM: EfuseField = EfuseField::new(EfuseBlock::Block1, 0, 48);
|
||||
/// `[MAC_FACTORY]` MAC address
|
||||
pub const MAC: EfuseField = EfuseField::new(EfuseBlock::Block2, 0, 48);
|
||||
/// `[]` WAFER_VERSION_MINOR
|
||||
pub const WAFER_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 48, 4);
|
||||
/// `[]` WAFER_VERSION_MAJOR
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 52, 2);
|
||||
/// `[]` EFUSE_PKG_VERSION
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block2, 54, 3);
|
||||
/// `[]` Minor version of BLOCK2 {0: "No calib"; 1: "With calib"}
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 57, 3);
|
||||
/// `[]` Major version of BLOCK2
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 60, 2);
|
||||
/// `[]` OCode
|
||||
pub const OCODE: EfuseField = EfuseField::new(EfuseBlock::Block2, 62, 7);
|
||||
/// `[]` Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block2, 69, 9);
|
||||
/// `[]` ADC1 init code at atten0
|
||||
pub const ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 78, 8);
|
||||
/// `[]` ADC1 init code at atten3
|
||||
pub const ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 86, 5);
|
||||
/// `[]` ADC1 calibration voltage at atten0
|
||||
pub const ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 91, 8);
|
||||
/// `[]` ADC1 calibration voltage at atten3
|
||||
pub const ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 99, 6);
|
||||
/// `[]` BLOCK2 digital dbias when hvt
|
||||
pub const DIG_DBIAS_HVT: EfuseField = EfuseField::new(EfuseBlock::Block2, 105, 5);
|
||||
/// `[]` BLOCK2 DIG_LDO_DBG0_DBIAS2
|
||||
pub const DIG_LDO_SLP_DBIAS2: EfuseField = EfuseField::new(EfuseBlock::Block2, 110, 7);
|
||||
/// `[]` BLOCK2 DIG_LDO_DBG0_DBIAS26
|
||||
pub const DIG_LDO_SLP_DBIAS26: EfuseField = EfuseField::new(EfuseBlock::Block2, 117, 8);
|
||||
/// `[]` BLOCK2 DIG_LDO_ACT_DBIAS26
|
||||
pub const DIG_LDO_ACT_DBIAS26: EfuseField = EfuseField::new(EfuseBlock::Block2, 125, 6);
|
||||
/// `[]` BLOCK2 DIG_LDO_ACT_STEPD10
|
||||
pub const DIG_LDO_ACT_STEPD10: EfuseField = EfuseField::new(EfuseBlock::Block2, 131, 4);
|
||||
/// `[]` BLOCK2 DIG_LDO_SLP_DBIAS13
|
||||
pub const RTC_LDO_SLP_DBIAS13: EfuseField = EfuseField::new(EfuseBlock::Block2, 135, 7);
|
||||
/// `[]` BLOCK2 DIG_LDO_SLP_DBIAS29
|
||||
pub const RTC_LDO_SLP_DBIAS29: EfuseField = EfuseField::new(EfuseBlock::Block2, 142, 9);
|
||||
/// `[]` BLOCK2 DIG_LDO_SLP_DBIAS31
|
||||
pub const RTC_LDO_SLP_DBIAS31: EfuseField = EfuseField::new(EfuseBlock::Block2, 151, 6);
|
||||
/// `[]` BLOCK2 DIG_LDO_ACT_DBIAS31
|
||||
pub const RTC_LDO_ACT_DBIAS31: EfuseField = EfuseField::new(EfuseBlock::Block2, 157, 6);
|
||||
/// `[]` BLOCK2 DIG_LDO_ACT_DBIAS13
|
||||
pub const RTC_LDO_ACT_DBIAS13: EfuseField = EfuseField::new(EfuseBlock::Block2, 163, 8);
|
||||
/// `[]` Store the bit `[86:96]` of ADC calibration data
|
||||
pub const ADC_CALIBRATION_3: EfuseField = EfuseField::new(EfuseBlock::Block2, 192, 11);
|
||||
/// `[BLOCK_KEY0]` BLOCK_BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption
|
||||
pub const KEY0: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 256);
|
||||
/// `[]` 256bit FE key
|
||||
pub const KEY0_FE_256BIT: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 256);
|
||||
/// `[]` 128bit FE key
|
||||
pub const KEY0_FE_128BIT: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 128);
|
||||
/// `[]` 128bit SB key
|
||||
pub const KEY0_SB_128BIT: EfuseField = EfuseField::new(EfuseBlock::Block3, 128, 128);
|
||||
use super::EfuseField;
|
||||
|
||||
/// Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(0, 0, 0, 8);
|
||||
///
|
||||
pub const RESERVED_0_8: EfuseField = EfuseField::new(0, 0, 8, 24);
|
||||
/// Disable reading from BlOCK3
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(0, 1, 32, 2);
|
||||
/// RTC watchdog timeout threshold; in unit of slow clock cycle
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(0, 1, 34, 2);
|
||||
/// Set this bit to disable pad jtag
|
||||
pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(0, 1, 36, 1);
|
||||
/// The bit be set to disable icache in download mode
|
||||
pub const DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(0, 1, 37, 1);
|
||||
/// The bit be set to disable manual encryption
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(0, 1, 38, 1);
|
||||
/// Enables flash encryption when 1 or 3 bits are set and disables otherwise
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(0, 1, 39, 3);
|
||||
/// Flash encryption key length
|
||||
pub const XTS_KEY_LENGTH_256: EfuseField = EfuseField::new(0, 1, 42, 1);
|
||||
/// Set the default UARTboot message output mode
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(0, 1, 43, 2);
|
||||
/// Set this bit to force ROM code to send a resume command during SPI boot
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(0, 1, 45, 1);
|
||||
/// Set this bit to disable download mode (boot_mode\[3:0\] = 0; 1; 2; 4; 5; 6;
|
||||
/// 7)
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 1, 46, 1);
|
||||
/// This bit set means disable direct_boot mode
|
||||
pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(0, 1, 47, 1);
|
||||
/// Set this bit to enable secure UART download mode
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(0, 1, 48, 1);
|
||||
/// Configures flash waiting time after power-up; in unit of ms. If the value is
|
||||
/// less than 15; the waiting time is the configurable value. Otherwise; the
|
||||
/// waiting time is twice the configurable value
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(0, 1, 49, 4);
|
||||
/// The bit be set to enable secure boot
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(0, 1, 53, 1);
|
||||
/// Secure version for anti-rollback
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(0, 1, 54, 4);
|
||||
/// True if MAC_CUSTOM is burned
|
||||
pub const CUSTOM_MAC_USED: EfuseField = EfuseField::new(0, 1, 58, 1);
|
||||
/// Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(0, 1, 59, 1);
|
||||
/// Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(0, 1, 60, 1);
|
||||
/// reserved
|
||||
pub const RESERVED_0_61: EfuseField = EfuseField::new(0, 1, 61, 3);
|
||||
/// Custom MAC address
|
||||
pub const CUSTOM_MAC: EfuseField = EfuseField::new(1, 0, 0, 48);
|
||||
/// reserved
|
||||
pub const RESERVED_1_48: EfuseField = EfuseField::new(1, 1, 48, 16);
|
||||
/// Stores the bits \[64:87\] of system data
|
||||
pub const SYSTEM_DATA2: EfuseField = EfuseField::new(1, 2, 64, 24);
|
||||
/// MAC address
|
||||
pub const MAC0: EfuseField = EfuseField::new(2, 0, 0, 32);
|
||||
/// MAC address
|
||||
pub const MAC1: EfuseField = EfuseField::new(2, 1, 32, 16);
|
||||
/// WAFER_VERSION_MINOR
|
||||
pub const WAFER_VERSION_MINOR: EfuseField = EfuseField::new(2, 1, 48, 4);
|
||||
/// WAFER_VERSION_MAJOR
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(2, 1, 52, 2);
|
||||
/// EFUSE_PKG_VERSION
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(2, 1, 54, 3);
|
||||
/// Minor version of BLOCK2
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(2, 1, 57, 3);
|
||||
/// Major version of BLOCK2
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(2, 1, 60, 2);
|
||||
/// OCode
|
||||
pub const OCODE: EfuseField = EfuseField::new(2, 1, 62, 7);
|
||||
/// Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(2, 2, 69, 9);
|
||||
/// ADC1 init code at atten0
|
||||
pub const ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(2, 2, 78, 8);
|
||||
/// ADC1 init code at atten3
|
||||
pub const ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(2, 2, 86, 5);
|
||||
/// ADC1 calibration voltage at atten0
|
||||
pub const ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(2, 2, 91, 8);
|
||||
/// ADC1 calibration voltage at atten3
|
||||
pub const ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(2, 3, 99, 6);
|
||||
/// BLOCK2 digital dbias when hvt
|
||||
pub const DIG_DBIAS_HVT: EfuseField = EfuseField::new(2, 3, 105, 5);
|
||||
/// BLOCK2 DIG_LDO_DBG0_DBIAS2
|
||||
pub const DIG_LDO_SLP_DBIAS2: EfuseField = EfuseField::new(2, 3, 110, 7);
|
||||
/// BLOCK2 DIG_LDO_DBG0_DBIAS26
|
||||
pub const DIG_LDO_SLP_DBIAS26: EfuseField = EfuseField::new(2, 3, 117, 8);
|
||||
/// BLOCK2 DIG_LDO_ACT_DBIAS26
|
||||
pub const DIG_LDO_ACT_DBIAS26: EfuseField = EfuseField::new(2, 3, 125, 6);
|
||||
/// BLOCK2 DIG_LDO_ACT_STEPD10
|
||||
pub const DIG_LDO_ACT_STEPD10: EfuseField = EfuseField::new(2, 4, 131, 4);
|
||||
/// BLOCK2 DIG_LDO_SLP_DBIAS13
|
||||
pub const RTC_LDO_SLP_DBIAS13: EfuseField = EfuseField::new(2, 4, 135, 7);
|
||||
/// BLOCK2 DIG_LDO_SLP_DBIAS29
|
||||
pub const RTC_LDO_SLP_DBIAS29: EfuseField = EfuseField::new(2, 4, 142, 9);
|
||||
/// BLOCK2 DIG_LDO_SLP_DBIAS31
|
||||
pub const RTC_LDO_SLP_DBIAS31: EfuseField = EfuseField::new(2, 4, 151, 6);
|
||||
/// BLOCK2 DIG_LDO_ACT_DBIAS31
|
||||
pub const RTC_LDO_ACT_DBIAS31: EfuseField = EfuseField::new(2, 4, 157, 6);
|
||||
/// BLOCK2 DIG_LDO_ACT_DBIAS13
|
||||
pub const RTC_LDO_ACT_DBIAS13: EfuseField = EfuseField::new(2, 5, 163, 8);
|
||||
/// reserved
|
||||
pub const RESERVED_2_171: EfuseField = EfuseField::new(2, 5, 171, 21);
|
||||
/// Store the bit \[86:96\] of ADC calibration data
|
||||
pub const ADC_CALIBRATION_3: EfuseField = EfuseField::new(2, 6, 192, 11);
|
||||
/// Store the bit \[0:20\] of block2 reserved data
|
||||
pub const BLK2_RESERVED_DATA_0: EfuseField = EfuseField::new(2, 6, 203, 21);
|
||||
/// Store the bit \[21:52\] of block2 reserved data
|
||||
pub const BLK2_RESERVED_DATA_1: EfuseField = EfuseField::new(2, 7, 224, 32);
|
||||
/// BLOCK_KEY0 - 256-bits. 256-bit key of Flash Encryption
|
||||
pub const BLOCK_KEY0: EfuseField = EfuseField::new(3, 0, 0, 256);
|
||||
|
||||
@ -41,7 +41,7 @@
|
||||
//! ```
|
||||
|
||||
pub use self::fields::*;
|
||||
use crate::{analog::adc::Attenuation, peripherals::EFUSE};
|
||||
use crate::{analog::adc::Attenuation, peripherals::EFUSE, soc::efuse_field::EfuseField};
|
||||
|
||||
mod fields;
|
||||
|
||||
@ -49,11 +49,6 @@ mod fields;
|
||||
pub struct Efuse;
|
||||
|
||||
impl Efuse {
|
||||
/// Reads chip's MAC address from the eFuse storage.
|
||||
pub fn read_base_mac_address() -> [u8; 6] {
|
||||
Self::read_field_be(MAC)
|
||||
}
|
||||
|
||||
/// Get status of SPI boot encryption.
|
||||
pub fn flash_encryption() -> bool {
|
||||
(Self::read_field_le::<u8>(SPI_BOOT_CRYPT_CNT).count_ones() % 2) != 0
|
||||
@ -157,7 +152,8 @@ impl Efuse {
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
#[derive(Debug, Clone, Copy, strum::FromRepr)]
|
||||
#[repr(u32)]
|
||||
pub(crate) enum EfuseBlock {
|
||||
Block0,
|
||||
Block1,
|
||||
|
||||
@ -1,396 +1,240 @@
|
||||
//! eFuse fields for the ESP32-C3.
|
||||
//!
|
||||
//! This file was automatically generated, please do not edit it manually!
|
||||
//!
|
||||
//! For information on how to regenerate these files, please refer to the
|
||||
//! `xtask` package's `README.md` file.
|
||||
//!
|
||||
//! Generated on: 2024-03-11
|
||||
//! ESP-IDF Commit: 0de2912f
|
||||
//! Generated: 2025-04-22 11:33
|
||||
//! Version: 4622cf9245401eca0eb1df8122449a6d
|
||||
|
||||
use super::EfuseBlock;
|
||||
use crate::soc::efuse_field::EfuseField;
|
||||
#![allow(clippy::empty_docs)]
|
||||
|
||||
/// `[]` Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 32);
|
||||
/// `[]` wr_dis of RD_DIS
|
||||
pub const WR_DIS_RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 1);
|
||||
/// `[]` wr_dis of DIS_ICACHE
|
||||
pub const WR_DIS_DIS_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_USB_JTAG
|
||||
pub const WR_DIS_DIS_USB_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_ICACHE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[WR_DIS.DIS_USB_DEVICE]` wr_dis of DIS_USB_SERIAL_JTAG
|
||||
pub const WR_DIS_DIS_USB_SERIAL_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_FORCE_DOWNLOAD
|
||||
pub const WR_DIS_DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[WR_DIS.DIS_CAN]` wr_dis of DIS_TWAI
|
||||
pub const WR_DIS_DIS_TWAI: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of JTAG_SEL_ENABLE
|
||||
pub const WR_DIS_JTAG_SEL_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_PAD_JTAG
|
||||
pub const WR_DIS_DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of WDT_DELAY_SEL
|
||||
pub const WR_DIS_WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of SPI_BOOT_CRYPT_CNT
|
||||
pub const WR_DIS_SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE0
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(EfuseBlock::Block0, 5, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE1
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE2
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(EfuseBlock::Block0, 7, 1);
|
||||
/// `[WR_DIS.KEY0_PURPOSE]` wr_dis of KEY_PURPOSE_0
|
||||
pub const WR_DIS_KEY_PURPOSE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 8, 1);
|
||||
/// `[WR_DIS.KEY1_PURPOSE]` wr_dis of KEY_PURPOSE_1
|
||||
pub const WR_DIS_KEY_PURPOSE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
|
||||
/// `[WR_DIS.KEY2_PURPOSE]` wr_dis of KEY_PURPOSE_2
|
||||
pub const WR_DIS_KEY_PURPOSE_2: EfuseField = EfuseField::new(EfuseBlock::Block0, 10, 1);
|
||||
/// `[WR_DIS.KEY3_PURPOSE]` wr_dis of KEY_PURPOSE_3
|
||||
pub const WR_DIS_KEY_PURPOSE_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 11, 1);
|
||||
/// `[WR_DIS.KEY4_PURPOSE]` wr_dis of KEY_PURPOSE_4
|
||||
pub const WR_DIS_KEY_PURPOSE_4: EfuseField = EfuseField::new(EfuseBlock::Block0, 12, 1);
|
||||
/// `[WR_DIS.KEY5_PURPOSE]` wr_dis of KEY_PURPOSE_5
|
||||
pub const WR_DIS_KEY_PURPOSE_5: EfuseField = EfuseField::new(EfuseBlock::Block0, 13, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_EN
|
||||
pub const WR_DIS_SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 15, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
|
||||
pub const WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 16, 1);
|
||||
/// `[]` wr_dis of FLASH_TPUW
|
||||
pub const WR_DIS_FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[WR_DIS.DIS_LEGACY_SPI_BOOT]` wr_dis of DIS_DIRECT_BOOT
|
||||
pub const WR_DIS_DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[WR_DIS.UART_PRINT_CHANNEL]` wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
|
||||
pub const WR_DIS_DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[WR_DIS.DIS_USB_DOWNLOAD_MODE]` wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of ENABLE_SECURITY_DOWNLOAD
|
||||
pub const WR_DIS_ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of UART_PRINT_CONTROL
|
||||
pub const WR_DIS_UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of FORCE_SEND_RESUME
|
||||
pub const WR_DIS_FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of SECURE_VERSION
|
||||
pub const WR_DIS_SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of ERR_RST_ENABLE
|
||||
pub const WR_DIS_ERR_RST_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` wr_dis of DISABLE_WAFER_VERSION_MAJOR
|
||||
pub const WR_DIS_DISABLE_WAFER_VERSION_MAJOR: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` wr_dis of DISABLE_BLK_VERSION_MAJOR
|
||||
pub const WR_DIS_DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` wr_dis of BLOCK1
|
||||
pub const WR_DIS_BLK1: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[WR_DIS.MAC_FACTORY]` wr_dis of MAC
|
||||
pub const WR_DIS_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_CLK
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_Q
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_CS
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_CS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_HD
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_HD: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_WP
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_WP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_DQS
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_DQS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D4
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D4: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D5
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D5: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D6
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D6: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D7
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D7: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MINOR_LO
|
||||
pub const WR_DIS_WAFER_VERSION_MINOR_LO: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of PKG_VERSION
|
||||
pub const WR_DIS_PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MINOR
|
||||
pub const WR_DIS_BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_CAP
|
||||
pub const WR_DIS_FLASH_CAP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_TEMP
|
||||
pub const WR_DIS_FLASH_TEMP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_VENDOR
|
||||
pub const WR_DIS_FLASH_VENDOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of K_RTC_LDO
|
||||
pub const WR_DIS_K_RTC_LDO: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of K_DIG_LDO
|
||||
pub const WR_DIS_K_DIG_LDO: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of V_RTC_DBIAS20
|
||||
pub const WR_DIS_V_RTC_DBIAS20: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of V_DIG_DBIAS20
|
||||
pub const WR_DIS_V_DIG_DBIAS20: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of DIG_DBIAS_HVT
|
||||
pub const WR_DIS_DIG_DBIAS_HVT: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of THRES_HVT
|
||||
pub const WR_DIS_THRES_HVT: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MINOR_HI
|
||||
pub const WR_DIS_WAFER_VERSION_MINOR_HI: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MAJOR
|
||||
pub const WR_DIS_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of BLOCK2
|
||||
pub const WR_DIS_SYS_DATA_PART1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of OPTIONAL_UNIQUE_ID
|
||||
pub const WR_DIS_OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MAJOR
|
||||
pub const WR_DIS_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of TEMP_CALIB
|
||||
pub const WR_DIS_TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of OCODE
|
||||
pub const WR_DIS_OCODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN1
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN2
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN3
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN0
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN1
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN2
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN3
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[WR_DIS.USER_DATA]` wr_dis of BLOCK_USR_DATA
|
||||
pub const WR_DIS_BLOCK_USR_DATA: EfuseField = EfuseField::new(EfuseBlock::Block0, 22, 1);
|
||||
/// `[WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM]` wr_dis of CUSTOM_MAC
|
||||
pub const WR_DIS_CUSTOM_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 22, 1);
|
||||
/// `[WR_DIS.KEY0]` wr_dis of BLOCK_KEY0
|
||||
pub const WR_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 23, 1);
|
||||
/// `[WR_DIS.KEY1]` wr_dis of BLOCK_KEY1
|
||||
pub const WR_DIS_BLOCK_KEY1: EfuseField = EfuseField::new(EfuseBlock::Block0, 24, 1);
|
||||
/// `[WR_DIS.KEY2]` wr_dis of BLOCK_KEY2
|
||||
pub const WR_DIS_BLOCK_KEY2: EfuseField = EfuseField::new(EfuseBlock::Block0, 25, 1);
|
||||
/// `[WR_DIS.KEY3]` wr_dis of BLOCK_KEY3
|
||||
pub const WR_DIS_BLOCK_KEY3: EfuseField = EfuseField::new(EfuseBlock::Block0, 26, 1);
|
||||
/// `[WR_DIS.KEY4]` wr_dis of BLOCK_KEY4
|
||||
pub const WR_DIS_BLOCK_KEY4: EfuseField = EfuseField::new(EfuseBlock::Block0, 27, 1);
|
||||
/// `[WR_DIS.KEY5]` wr_dis of BLOCK_KEY5
|
||||
pub const WR_DIS_BLOCK_KEY5: EfuseField = EfuseField::new(EfuseBlock::Block0, 28, 1);
|
||||
/// `[WR_DIS.SYS_DATA_PART2]` wr_dis of BLOCK_SYS_DATA2
|
||||
pub const WR_DIS_BLOCK_SYS_DATA2: EfuseField = EfuseField::new(EfuseBlock::Block0, 29, 1);
|
||||
/// `[]` wr_dis of USB_EXCHG_PINS
|
||||
pub const WR_DIS_USB_EXCHG_PINS: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[]` wr_dis of VDD_SPI_AS_GPIO
|
||||
pub const WR_DIS_VDD_SPI_AS_GPIO: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[]` wr_dis of SOFT_DIS_JTAG
|
||||
pub const WR_DIS_SOFT_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 31, 1);
|
||||
/// `[]` Disable reading from BlOCK4-10
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 7);
|
||||
/// `[RD_DIS.KEY0]` rd_dis of BLOCK_KEY0
|
||||
pub const RD_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 1);
|
||||
/// `[RD_DIS.KEY1]` rd_dis of BLOCK_KEY1
|
||||
pub const RD_DIS_BLOCK_KEY1: EfuseField = EfuseField::new(EfuseBlock::Block0, 33, 1);
|
||||
/// `[RD_DIS.KEY2]` rd_dis of BLOCK_KEY2
|
||||
pub const RD_DIS_BLOCK_KEY2: EfuseField = EfuseField::new(EfuseBlock::Block0, 34, 1);
|
||||
/// `[RD_DIS.KEY3]` rd_dis of BLOCK_KEY3
|
||||
pub const RD_DIS_BLOCK_KEY3: EfuseField = EfuseField::new(EfuseBlock::Block0, 35, 1);
|
||||
/// `[RD_DIS.KEY4]` rd_dis of BLOCK_KEY4
|
||||
pub const RD_DIS_BLOCK_KEY4: EfuseField = EfuseField::new(EfuseBlock::Block0, 36, 1);
|
||||
/// `[RD_DIS.KEY5]` rd_dis of BLOCK_KEY5
|
||||
pub const RD_DIS_BLOCK_KEY5: EfuseField = EfuseField::new(EfuseBlock::Block0, 37, 1);
|
||||
/// `[RD_DIS.SYS_DATA_PART2]` rd_dis of BLOCK_SYS_DATA2
|
||||
pub const RD_DIS_BLOCK_SYS_DATA2: EfuseField = EfuseField::new(EfuseBlock::Block0, 38, 1);
|
||||
/// `[]` Set this bit to disable Icache
|
||||
pub const DIS_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 40, 1);
|
||||
/// `[]` Set this bit to disable function of usb switch to jtag in module of usb
|
||||
use super::EfuseField;
|
||||
|
||||
/// Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(0, 0, 0, 32);
|
||||
/// Disable reading from BlOCK4-10
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(0, 1, 32, 7);
|
||||
/// Set this bit to disable boot from RTC RAM
|
||||
pub const DIS_RTC_RAM_BOOT: EfuseField = EfuseField::new(0, 1, 39, 1);
|
||||
/// Set this bit to disable Icache
|
||||
pub const DIS_ICACHE: EfuseField = EfuseField::new(0, 1, 40, 1);
|
||||
/// Set this bit to disable function of usb switch to jtag in module of usb
|
||||
/// device
|
||||
pub const DIS_USB_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 41, 1);
|
||||
/// `[]` Set this bit to disable Icache in download mode (boot_mode`[3:0]` is 0;
|
||||
/// 1; 2; 3; 6; 7)
|
||||
pub const DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 42, 1);
|
||||
/// `[DIS_USB_DEVICE]` USB-Serial-JTAG {0: "Enable"; 1: "Disable"}
|
||||
pub const DIS_USB_SERIAL_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 43, 1);
|
||||
/// `[]` Set this bit to disable the function that forces chip into download
|
||||
/// mode
|
||||
pub const DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 44, 1);
|
||||
/// `[DIS_CAN]` Set this bit to disable TWAI function
|
||||
pub const DIS_TWAI: EfuseField = EfuseField::new(EfuseBlock::Block0, 46, 1);
|
||||
/// `[]` Set this bit to enable selection between usb_to_jtag and pad_to_jtag
|
||||
/// through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are
|
||||
/// equal to 0
|
||||
pub const JTAG_SEL_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 47, 1);
|
||||
/// `[]` Set these bits to disable JTAG in the soft way (odd number 1 means
|
||||
/// disable ). JTAG can be enabled in HMAC module
|
||||
pub const SOFT_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 48, 3);
|
||||
/// `[]` Set this bit to disable JTAG in the hard way. JTAG is disabled
|
||||
/// permanently
|
||||
pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 51, 1);
|
||||
/// `[]` Set this bit to disable flash encryption when in download boot modes
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(EfuseBlock::Block0, 52, 1);
|
||||
/// `[]` Set this bit to exchange USB D+ and D- pins
|
||||
pub const USB_EXCHG_PINS: EfuseField = EfuseField::new(EfuseBlock::Block0, 57, 1);
|
||||
/// `[]` Set this bit to vdd spi pin function as gpio
|
||||
pub const VDD_SPI_AS_GPIO: EfuseField = EfuseField::new(EfuseBlock::Block0, 58, 1);
|
||||
/// `[]` RTC watchdog timeout threshold; in unit of slow clock cycle {0:
|
||||
/// "40000"; 1: "80000"; 2: "160000"; 3: "320000"}
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 80, 2);
|
||||
/// `[]` Enables flash encryption when 1 or 3 bits are set and disables
|
||||
/// otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 82, 3);
|
||||
/// `[]` Revoke 1st secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(EfuseBlock::Block0, 85, 1);
|
||||
/// `[]` Revoke 2nd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(EfuseBlock::Block0, 86, 1);
|
||||
/// `[]` Revoke 3rd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(EfuseBlock::Block0, 87, 1);
|
||||
/// `[KEY0_PURPOSE]` Purpose of Key0
|
||||
pub const KEY_PURPOSE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 88, 4);
|
||||
/// `[KEY1_PURPOSE]` Purpose of Key1
|
||||
pub const KEY_PURPOSE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 92, 4);
|
||||
/// `[KEY2_PURPOSE]` Purpose of Key2
|
||||
pub const KEY_PURPOSE_2: EfuseField = EfuseField::new(EfuseBlock::Block0, 96, 4);
|
||||
/// `[KEY3_PURPOSE]` Purpose of Key3
|
||||
pub const KEY_PURPOSE_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 100, 4);
|
||||
/// `[KEY4_PURPOSE]` Purpose of Key4
|
||||
pub const KEY_PURPOSE_4: EfuseField = EfuseField::new(EfuseBlock::Block0, 104, 4);
|
||||
/// `[KEY5_PURPOSE]` Purpose of Key5
|
||||
pub const KEY_PURPOSE_5: EfuseField = EfuseField::new(EfuseBlock::Block0, 108, 4);
|
||||
/// `[]` Set this bit to enable secure boot
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 116, 1);
|
||||
/// `[]` Set this bit to enable revoking aggressive secure boot
|
||||
pub const SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField = EfuseField::new(EfuseBlock::Block0, 117, 1);
|
||||
/// `[]` Configures flash waiting time after power-up; in unit of ms. If the
|
||||
/// value is less than 15; the waiting time is the configurable value;
|
||||
/// Otherwise; the waiting time is twice the configurable value
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 124, 4);
|
||||
/// `[]` Set this bit to disable download mode (boot_mode`[3:0]` = 0; 1; 2; 3;
|
||||
/// 6; 7)
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 128, 1);
|
||||
/// `[DIS_LEGACY_SPI_BOOT]` Disable direct boot mode
|
||||
pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 129, 1);
|
||||
/// `[UART_PRINT_CHANNEL]` USB printing {0: "Enable"; 1: "Disable"}
|
||||
pub const DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField = EfuseField::new(EfuseBlock::Block0, 130, 1);
|
||||
/// `[DIS_USB_DOWNLOAD_MODE]` Disable UART download mode through USB-Serial-JTAG
|
||||
pub const DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 132, 1);
|
||||
/// `[]` Set this bit to enable secure UART download mode
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 133, 1);
|
||||
/// `[]` Set the default UARTboot message output mode {0: "Enable"; 1: "Enable
|
||||
/// when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3:
|
||||
/// "Disable"}
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 134, 2);
|
||||
/// `[]` Set this bit to force ROM code to send a resume command during SPI boot
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 141, 1);
|
||||
/// `[]` Secure version (used by ESP-IDF anti-rollback feature)
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 142, 16);
|
||||
/// `[]` Use BLOCK0 to check error record registers {0: "without check"; 1:
|
||||
/// "with check"}
|
||||
pub const ERR_RST_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 159, 1);
|
||||
/// `[]` Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 160, 1);
|
||||
/// `[]` Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 161, 1);
|
||||
/// `[MAC_FACTORY]` MAC address
|
||||
pub const MAC: EfuseField = EfuseField::new(EfuseBlock::Block1, 0, 48);
|
||||
/// `[]` SPI PAD CLK
|
||||
pub const SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(EfuseBlock::Block1, 48, 6);
|
||||
/// `[]` SPI PAD Q(D1)
|
||||
pub const SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(EfuseBlock::Block1, 54, 6);
|
||||
/// `[]` SPI PAD D(D0)
|
||||
pub const SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(EfuseBlock::Block1, 60, 6);
|
||||
/// `[]` SPI PAD CS
|
||||
pub const SPI_PAD_CONFIG_CS: EfuseField = EfuseField::new(EfuseBlock::Block1, 66, 6);
|
||||
/// `[]` SPI PAD HD(D3)
|
||||
pub const SPI_PAD_CONFIG_HD: EfuseField = EfuseField::new(EfuseBlock::Block1, 72, 6);
|
||||
/// `[]` SPI PAD WP(D2)
|
||||
pub const SPI_PAD_CONFIG_WP: EfuseField = EfuseField::new(EfuseBlock::Block1, 78, 6);
|
||||
/// `[]` SPI PAD DQS
|
||||
pub const SPI_PAD_CONFIG_DQS: EfuseField = EfuseField::new(EfuseBlock::Block1, 84, 6);
|
||||
/// `[]` SPI PAD D4
|
||||
pub const SPI_PAD_CONFIG_D4: EfuseField = EfuseField::new(EfuseBlock::Block1, 90, 6);
|
||||
/// `[]` SPI PAD D5
|
||||
pub const SPI_PAD_CONFIG_D5: EfuseField = EfuseField::new(EfuseBlock::Block1, 96, 6);
|
||||
/// `[]` SPI PAD D6
|
||||
pub const SPI_PAD_CONFIG_D6: EfuseField = EfuseField::new(EfuseBlock::Block1, 102, 6);
|
||||
/// `[]` SPI PAD D7
|
||||
pub const SPI_PAD_CONFIG_D7: EfuseField = EfuseField::new(EfuseBlock::Block1, 108, 6);
|
||||
/// `[]` WAFER_VERSION_MINOR least significant bits
|
||||
pub const WAFER_VERSION_MINOR_LO: EfuseField = EfuseField::new(EfuseBlock::Block1, 114, 3);
|
||||
/// `[]` Package version
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block1, 117, 3);
|
||||
/// `[]` BLK_VERSION_MINOR
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 120, 3);
|
||||
/// `[]` Flash capacity {0: "None"; 1: "4M"; 2: "2M"; 3: "1M"; 4: "8M"}
|
||||
pub const FLASH_CAP: EfuseField = EfuseField::new(EfuseBlock::Block1, 123, 3);
|
||||
/// `[]` Flash temperature {0: "None"; 1: "105C"; 2: "85C"}
|
||||
pub const FLASH_TEMP: EfuseField = EfuseField::new(EfuseBlock::Block1, 126, 2);
|
||||
/// `[]` Flash vendor {0: "None"; 1: "XMC"; 2: "GD"; 3: "FM"; 4: "TT"; 5:
|
||||
/// "ZBIT"}
|
||||
pub const FLASH_VENDOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 128, 3);
|
||||
/// `[]` BLOCK1 K_RTC_LDO
|
||||
pub const K_RTC_LDO: EfuseField = EfuseField::new(EfuseBlock::Block1, 135, 7);
|
||||
/// `[]` BLOCK1 K_DIG_LDO
|
||||
pub const K_DIG_LDO: EfuseField = EfuseField::new(EfuseBlock::Block1, 142, 7);
|
||||
/// `[]` BLOCK1 voltage of rtc dbias20
|
||||
pub const V_RTC_DBIAS20: EfuseField = EfuseField::new(EfuseBlock::Block1, 149, 8);
|
||||
/// `[]` BLOCK1 voltage of digital dbias20
|
||||
pub const V_DIG_DBIAS20: EfuseField = EfuseField::new(EfuseBlock::Block1, 157, 8);
|
||||
/// `[]` BLOCK1 digital dbias when hvt
|
||||
pub const DIG_DBIAS_HVT: EfuseField = EfuseField::new(EfuseBlock::Block1, 165, 5);
|
||||
/// `[]` BLOCK1 pvt threshold when hvt
|
||||
pub const THRES_HVT: EfuseField = EfuseField::new(EfuseBlock::Block1, 170, 10);
|
||||
/// `[]` WAFER_VERSION_MINOR most significant bit
|
||||
pub const WAFER_VERSION_MINOR_HI: EfuseField = EfuseField::new(EfuseBlock::Block1, 183, 1);
|
||||
/// `[]` WAFER_VERSION_MAJOR
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 184, 2);
|
||||
/// `[]` Optional unique 128-bit ID
|
||||
pub const OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(EfuseBlock::Block2, 0, 128);
|
||||
/// `[]` BLK_VERSION_MAJOR of BLOCK2 {0: "No calibration"; 1: "With
|
||||
/// calibration"}
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 128, 2);
|
||||
/// `[]` Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block2, 131, 9);
|
||||
/// `[]` ADC OCode
|
||||
pub const OCODE: EfuseField = EfuseField::new(EfuseBlock::Block2, 140, 8);
|
||||
/// `[]` ADC1 init code at atten0
|
||||
pub const ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 148, 10);
|
||||
/// `[]` ADC1 init code at atten1
|
||||
pub const ADC1_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block2, 158, 10);
|
||||
/// `[]` ADC1 init code at atten2
|
||||
pub const ADC1_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block2, 168, 10);
|
||||
/// `[]` ADC1 init code at atten3
|
||||
pub const ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 178, 10);
|
||||
/// `[]` ADC1 calibration voltage at atten0
|
||||
pub const ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 188, 10);
|
||||
/// `[]` ADC1 calibration voltage at atten1
|
||||
pub const ADC1_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block2, 198, 10);
|
||||
/// `[]` ADC1 calibration voltage at atten2
|
||||
pub const ADC1_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block2, 208, 10);
|
||||
/// `[]` ADC1 calibration voltage at atten3
|
||||
pub const ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 218, 10);
|
||||
/// `[BLOCK_USR_DATA]` User data
|
||||
pub const USER_DATA: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 256);
|
||||
/// `[MAC_CUSTOM CUSTOM_MAC]` Custom MAC address
|
||||
pub const USER_DATA_MAC_CUSTOM: EfuseField = EfuseField::new(EfuseBlock::Block3, 200, 48);
|
||||
/// `[BLOCK_KEY0]` Key0 or user data
|
||||
pub const KEY0: EfuseField = EfuseField::new(EfuseBlock::Block4, 0, 256);
|
||||
/// `[BLOCK_KEY1]` Key1 or user data
|
||||
pub const KEY1: EfuseField = EfuseField::new(EfuseBlock::Block5, 0, 256);
|
||||
/// `[BLOCK_KEY2]` Key2 or user data
|
||||
pub const KEY2: EfuseField = EfuseField::new(EfuseBlock::Block6, 0, 256);
|
||||
/// `[BLOCK_KEY3]` Key3 or user data
|
||||
pub const KEY3: EfuseField = EfuseField::new(EfuseBlock::Block7, 0, 256);
|
||||
/// `[BLOCK_KEY4]` Key4 or user data
|
||||
pub const KEY4: EfuseField = EfuseField::new(EfuseBlock::Block8, 0, 256);
|
||||
/// `[BLOCK_KEY5]` Key5 or user data
|
||||
pub const KEY5: EfuseField = EfuseField::new(EfuseBlock::Block9, 0, 256);
|
||||
/// `[BLOCK_SYS_DATA2]` System data part 2 (reserved)
|
||||
pub const SYS_DATA_PART2: EfuseField = EfuseField::new(EfuseBlock::Block10, 0, 256);
|
||||
pub const DIS_USB_JTAG: EfuseField = EfuseField::new(0, 1, 41, 1);
|
||||
/// Set this bit to disable Icache in download mode (boot_mode\[3:0\] is 0; 1;
|
||||
/// 2; 3; 6; 7)
|
||||
pub const DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(0, 1, 42, 1);
|
||||
/// USB-Serial-JTAG
|
||||
pub const DIS_USB_SERIAL_JTAG: EfuseField = EfuseField::new(0, 1, 43, 1);
|
||||
/// Set this bit to disable the function that forces chip into download mode
|
||||
pub const DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(0, 1, 44, 1);
|
||||
/// Reserved (used for four backups method)
|
||||
pub const RPT4_RESERVED6: EfuseField = EfuseField::new(0, 1, 45, 1);
|
||||
/// Set this bit to disable CAN function
|
||||
pub const DIS_TWAI: EfuseField = EfuseField::new(0, 1, 46, 1);
|
||||
/// Set this bit to enable selection between usb_to_jtag and pad_to_jtag through
|
||||
/// strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal
|
||||
/// to 0
|
||||
pub const JTAG_SEL_ENABLE: EfuseField = EfuseField::new(0, 1, 47, 1);
|
||||
/// Set these bits to disable JTAG in the soft way (odd number 1 means disable
|
||||
/// ). JTAG can be enabled in HMAC module
|
||||
pub const SOFT_DIS_JTAG: EfuseField = EfuseField::new(0, 1, 48, 3);
|
||||
/// Set this bit to disable JTAG in the hard way. JTAG is disabled permanently
|
||||
pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(0, 1, 51, 1);
|
||||
/// Set this bit to disable flash encryption when in download boot modes
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(0, 1, 52, 1);
|
||||
/// Controls single-end input threshold vrefh; 1.76 V to 2 V with step of 80 mV;
|
||||
/// stored in eFuse
|
||||
pub const USB_DREFH: EfuseField = EfuseField::new(0, 1, 53, 2);
|
||||
/// Controls single-end input threshold vrefl; 0.8 V to 1.04 V with step of 80
|
||||
/// mV; stored in eFuse
|
||||
pub const USB_DREFL: EfuseField = EfuseField::new(0, 1, 55, 2);
|
||||
/// Set this bit to exchange USB D+ and D- pins
|
||||
pub const USB_EXCHG_PINS: EfuseField = EfuseField::new(0, 1, 57, 1);
|
||||
/// Set this bit to vdd spi pin function as gpio
|
||||
pub const VDD_SPI_AS_GPIO: EfuseField = EfuseField::new(0, 1, 58, 1);
|
||||
/// Enable btlc gpio
|
||||
pub const BTLC_GPIO_ENABLE: EfuseField = EfuseField::new(0, 1, 59, 2);
|
||||
/// Set this bit to enable power glitch function
|
||||
pub const POWERGLITCH_EN: EfuseField = EfuseField::new(0, 1, 61, 1);
|
||||
/// Sample delay configuration of power glitch
|
||||
pub const POWER_GLITCH_DSENSE: EfuseField = EfuseField::new(0, 1, 62, 2);
|
||||
/// Reserved (used for four backups method)
|
||||
pub const RPT4_RESERVED2: EfuseField = EfuseField::new(0, 2, 64, 16);
|
||||
/// RTC watchdog timeout threshold; in unit of slow clock cycle
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(0, 2, 80, 2);
|
||||
/// Enables flash encryption when 1 or 3 bits are set and disables otherwise
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(0, 2, 82, 3);
|
||||
/// Revoke 1st secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(0, 2, 85, 1);
|
||||
/// Revoke 2nd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(0, 2, 86, 1);
|
||||
/// Revoke 3rd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(0, 2, 87, 1);
|
||||
/// Purpose of Key0
|
||||
pub const KEY_PURPOSE_0: EfuseField = EfuseField::new(0, 2, 88, 4);
|
||||
/// Purpose of Key1
|
||||
pub const KEY_PURPOSE_1: EfuseField = EfuseField::new(0, 2, 92, 4);
|
||||
/// Purpose of Key2
|
||||
pub const KEY_PURPOSE_2: EfuseField = EfuseField::new(0, 3, 96, 4);
|
||||
/// Purpose of Key3
|
||||
pub const KEY_PURPOSE_3: EfuseField = EfuseField::new(0, 3, 100, 4);
|
||||
/// Purpose of Key4
|
||||
pub const KEY_PURPOSE_4: EfuseField = EfuseField::new(0, 3, 104, 4);
|
||||
/// Purpose of Key5
|
||||
pub const KEY_PURPOSE_5: EfuseField = EfuseField::new(0, 3, 108, 4);
|
||||
/// Reserved (used for four backups method)
|
||||
pub const RPT4_RESERVED3: EfuseField = EfuseField::new(0, 3, 112, 4);
|
||||
/// Set this bit to enable secure boot
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(0, 3, 116, 1);
|
||||
/// Set this bit to enable revoking aggressive secure boot
|
||||
pub const SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField = EfuseField::new(0, 3, 117, 1);
|
||||
/// Reserved (used for four backups method)
|
||||
pub const RPT4_RESERVED0: EfuseField = EfuseField::new(0, 3, 118, 6);
|
||||
/// Configures flash waiting time after power-up; in unit of ms. If the value is
|
||||
/// less than 15; the waiting time is the configurable value; Otherwise; the
|
||||
/// waiting time is twice the configurable value
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(0, 3, 124, 4);
|
||||
/// Set this bit to disable download mode (boot_mode\[3:0\] = 0; 1; 2; 3; 6; 7)
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 128, 1);
|
||||
/// Disable direct boot mode
|
||||
pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(0, 4, 129, 1);
|
||||
/// USB printing
|
||||
pub const DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField = EfuseField::new(0, 4, 130, 1);
|
||||
/// ECC mode in ROM
|
||||
pub const FLASH_ECC_MODE: EfuseField = EfuseField::new(0, 4, 131, 1);
|
||||
/// Disable UART download mode through USB-Serial-JTAG
|
||||
pub const DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 132, 1);
|
||||
/// Set this bit to enable secure UART download mode
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(0, 4, 133, 1);
|
||||
/// Set the default UARTboot message output mode
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(0, 4, 134, 2);
|
||||
/// GPIO33-GPIO37 power supply selection in ROM code
|
||||
pub const PIN_POWER_SELECTION: EfuseField = EfuseField::new(0, 4, 136, 1);
|
||||
/// Maximum lines of SPI flash
|
||||
pub const FLASH_TYPE: EfuseField = EfuseField::new(0, 4, 137, 1);
|
||||
/// Set Flash page size
|
||||
pub const FLASH_PAGE_SIZE: EfuseField = EfuseField::new(0, 4, 138, 2);
|
||||
/// Set 1 to enable ECC for flash boot
|
||||
pub const FLASH_ECC_EN: EfuseField = EfuseField::new(0, 4, 140, 1);
|
||||
/// Set this bit to force ROM code to send a resume command during SPI boot
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(0, 4, 141, 1);
|
||||
/// Secure version (used by ESP-IDF anti-rollback feature)
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(0, 4, 142, 16);
|
||||
/// reserved
|
||||
pub const RESERVED_0_158: EfuseField = EfuseField::new(0, 4, 158, 1);
|
||||
/// Use BLOCK0 to check error record registers
|
||||
pub const ERR_RST_ENABLE: EfuseField = EfuseField::new(0, 4, 159, 1);
|
||||
/// Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(0, 5, 160, 1);
|
||||
/// Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(0, 5, 161, 1);
|
||||
/// reserved
|
||||
pub const RESERVED_0_162: EfuseField = EfuseField::new(0, 5, 162, 22);
|
||||
/// MAC address
|
||||
pub const MAC0: EfuseField = EfuseField::new(1, 0, 0, 32);
|
||||
/// MAC address
|
||||
pub const MAC1: EfuseField = EfuseField::new(1, 1, 32, 16);
|
||||
/// SPI PAD CLK
|
||||
pub const SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(1, 1, 48, 6);
|
||||
/// SPI PAD Q(D1)
|
||||
pub const SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(1, 1, 54, 6);
|
||||
/// SPI PAD D(D0)
|
||||
pub const SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(1, 1, 60, 6);
|
||||
/// SPI PAD CS
|
||||
pub const SPI_PAD_CONFIG_CS: EfuseField = EfuseField::new(1, 2, 66, 6);
|
||||
/// SPI PAD HD(D3)
|
||||
pub const SPI_PAD_CONFIG_HD: EfuseField = EfuseField::new(1, 2, 72, 6);
|
||||
/// SPI PAD WP(D2)
|
||||
pub const SPI_PAD_CONFIG_WP: EfuseField = EfuseField::new(1, 2, 78, 6);
|
||||
/// SPI PAD DQS
|
||||
pub const SPI_PAD_CONFIG_DQS: EfuseField = EfuseField::new(1, 2, 84, 6);
|
||||
/// SPI PAD D4
|
||||
pub const SPI_PAD_CONFIG_D4: EfuseField = EfuseField::new(1, 2, 90, 6);
|
||||
/// SPI PAD D5
|
||||
pub const SPI_PAD_CONFIG_D5: EfuseField = EfuseField::new(1, 3, 96, 6);
|
||||
/// SPI PAD D6
|
||||
pub const SPI_PAD_CONFIG_D6: EfuseField = EfuseField::new(1, 3, 102, 6);
|
||||
/// SPI PAD D7
|
||||
pub const SPI_PAD_CONFIG_D7: EfuseField = EfuseField::new(1, 3, 108, 6);
|
||||
/// WAFER_VERSION_MINOR least significant bits
|
||||
pub const WAFER_VERSION_MINOR_LO: EfuseField = EfuseField::new(1, 3, 114, 3);
|
||||
/// Package version
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(1, 3, 117, 3);
|
||||
/// BLK_VERSION_MINOR
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(1, 3, 120, 3);
|
||||
/// Flash capacity
|
||||
pub const FLASH_CAP: EfuseField = EfuseField::new(1, 3, 123, 3);
|
||||
/// Flash temperature
|
||||
pub const FLASH_TEMP: EfuseField = EfuseField::new(1, 3, 126, 2);
|
||||
/// Flash vendor
|
||||
pub const FLASH_VENDOR: EfuseField = EfuseField::new(1, 4, 128, 3);
|
||||
/// reserved
|
||||
pub const RESERVED_1_131: EfuseField = EfuseField::new(1, 4, 131, 4);
|
||||
/// BLOCK1 K_RTC_LDO
|
||||
pub const K_RTC_LDO: EfuseField = EfuseField::new(1, 4, 135, 7);
|
||||
/// BLOCK1 K_DIG_LDO
|
||||
pub const K_DIG_LDO: EfuseField = EfuseField::new(1, 4, 142, 7);
|
||||
/// BLOCK1 voltage of rtc dbias20
|
||||
pub const V_RTC_DBIAS20: EfuseField = EfuseField::new(1, 4, 149, 8);
|
||||
/// BLOCK1 voltage of digital dbias20
|
||||
pub const V_DIG_DBIAS20: EfuseField = EfuseField::new(1, 4, 157, 8);
|
||||
/// BLOCK1 digital dbias when hvt
|
||||
pub const DIG_DBIAS_HVT: EfuseField = EfuseField::new(1, 5, 165, 5);
|
||||
/// BLOCK1 pvt threshold when hvt
|
||||
pub const THRES_HVT: EfuseField = EfuseField::new(1, 5, 170, 10);
|
||||
/// reserved
|
||||
pub const RESERVED_1_180: EfuseField = EfuseField::new(1, 5, 180, 3);
|
||||
/// WAFER_VERSION_MINOR most significant bit
|
||||
pub const WAFER_VERSION_MINOR_HI: EfuseField = EfuseField::new(1, 5, 183, 1);
|
||||
/// WAFER_VERSION_MAJOR
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(1, 5, 184, 2);
|
||||
/// reserved
|
||||
pub const RESERVED_1_186: EfuseField = EfuseField::new(1, 5, 186, 6);
|
||||
/// Optional unique 128-bit ID
|
||||
pub const OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(2, 0, 0, 128);
|
||||
/// BLK_VERSION_MAJOR of BLOCK2
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(2, 4, 128, 2);
|
||||
/// reserved
|
||||
pub const RESERVED_2_130: EfuseField = EfuseField::new(2, 4, 130, 1);
|
||||
/// Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(2, 4, 131, 9);
|
||||
/// ADC OCode
|
||||
pub const OCODE: EfuseField = EfuseField::new(2, 4, 140, 8);
|
||||
/// ADC1 init code at atten0
|
||||
pub const ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(2, 4, 148, 10);
|
||||
/// ADC1 init code at atten1
|
||||
pub const ADC1_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(2, 4, 158, 10);
|
||||
/// ADC1 init code at atten2
|
||||
pub const ADC1_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(2, 5, 168, 10);
|
||||
/// ADC1 init code at atten3
|
||||
pub const ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(2, 5, 178, 10);
|
||||
/// ADC1 calibration voltage at atten0
|
||||
pub const ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(2, 5, 188, 10);
|
||||
/// ADC1 calibration voltage at atten1
|
||||
pub const ADC1_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(2, 6, 198, 10);
|
||||
/// ADC1 calibration voltage at atten2
|
||||
pub const ADC1_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(2, 6, 208, 10);
|
||||
/// ADC1 calibration voltage at atten3
|
||||
pub const ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(2, 6, 218, 10);
|
||||
/// reserved
|
||||
pub const RESERVED_2_228: EfuseField = EfuseField::new(2, 7, 228, 28);
|
||||
/// User data
|
||||
pub const BLOCK_USR_DATA: EfuseField = EfuseField::new(3, 0, 0, 192);
|
||||
/// reserved
|
||||
pub const RESERVED_3_192: EfuseField = EfuseField::new(3, 6, 192, 8);
|
||||
/// Custom MAC address
|
||||
pub const CUSTOM_MAC: EfuseField = EfuseField::new(3, 6, 200, 48);
|
||||
/// reserved
|
||||
pub const RESERVED_3_248: EfuseField = EfuseField::new(3, 7, 248, 8);
|
||||
/// Key0 or user data
|
||||
pub const BLOCK_KEY0: EfuseField = EfuseField::new(4, 0, 0, 256);
|
||||
/// Key1 or user data
|
||||
pub const BLOCK_KEY1: EfuseField = EfuseField::new(5, 0, 0, 256);
|
||||
/// Key2 or user data
|
||||
pub const BLOCK_KEY2: EfuseField = EfuseField::new(6, 0, 0, 256);
|
||||
/// Key3 or user data
|
||||
pub const BLOCK_KEY3: EfuseField = EfuseField::new(7, 0, 0, 256);
|
||||
/// Key4 or user data
|
||||
pub const BLOCK_KEY4: EfuseField = EfuseField::new(8, 0, 0, 256);
|
||||
/// Key5 or user data
|
||||
pub const BLOCK_KEY5: EfuseField = EfuseField::new(9, 0, 0, 256);
|
||||
/// System data part 2 (reserved)
|
||||
pub const BLOCK_SYS_DATA2: EfuseField = EfuseField::new(10, 0, 0, 256);
|
||||
|
||||
@ -42,7 +42,7 @@
|
||||
//! ```
|
||||
|
||||
pub use self::fields::*;
|
||||
use crate::{analog::adc::Attenuation, peripherals::EFUSE};
|
||||
use crate::{analog::adc::Attenuation, peripherals::EFUSE, soc::efuse_field::EfuseField};
|
||||
|
||||
mod fields;
|
||||
|
||||
@ -50,11 +50,6 @@ mod fields;
|
||||
pub struct Efuse;
|
||||
|
||||
impl Efuse {
|
||||
/// Reads chip's MAC address from the eFuse storage.
|
||||
pub fn read_base_mac_address() -> [u8; 6] {
|
||||
Self::read_field_be(MAC)
|
||||
}
|
||||
|
||||
/// Get status of SPI boot encryption.
|
||||
pub fn flash_encryption() -> bool {
|
||||
(Self::read_field_le::<u8>(SPI_BOOT_CRYPT_CNT).count_ones() % 2) != 0
|
||||
@ -147,7 +142,8 @@ impl Efuse {
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
#[derive(Debug, Clone, Copy, strum::FromRepr)]
|
||||
#[repr(u32)]
|
||||
pub(crate) enum EfuseBlock {
|
||||
Block0,
|
||||
Block1,
|
||||
|
||||
@ -1,417 +1,259 @@
|
||||
//! eFuse fields for the ESP32-C6.
|
||||
//!
|
||||
//! This file was automatically generated, please do not edit it manually!
|
||||
//!
|
||||
//! For information on how to regenerate these files, please refer to the
|
||||
//! `xtask` package's `README.md` file.
|
||||
//!
|
||||
//! Generated on: 2024-03-11
|
||||
//! ESP-IDF Commit: 0de2912f
|
||||
//! Generated: 2025-04-22 11:33
|
||||
//! Version: df46b69f0ed3913114ba53d3a0b2b843
|
||||
|
||||
use super::EfuseBlock;
|
||||
use crate::soc::efuse_field::EfuseField;
|
||||
#![allow(clippy::empty_docs)]
|
||||
|
||||
/// `[]` Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 32);
|
||||
/// `[]` wr_dis of RD_DIS
|
||||
pub const WR_DIS_RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 1);
|
||||
/// `[]` wr_dis of CRYPT_DPA_ENABLE
|
||||
pub const WR_DIS_CRYPT_DPA_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 1, 1);
|
||||
/// `[]` wr_dis of SWAP_UART_SDIO_EN
|
||||
pub const WR_DIS_SWAP_UART_SDIO_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_ICACHE
|
||||
pub const WR_DIS_DIS_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_USB_JTAG
|
||||
pub const WR_DIS_DIS_USB_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_ICACHE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_USB_SERIAL_JTAG
|
||||
pub const WR_DIS_DIS_USB_SERIAL_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_FORCE_DOWNLOAD
|
||||
pub const WR_DIS_DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[WR_DIS.DIS_CAN]` wr_dis of DIS_TWAI
|
||||
pub const WR_DIS_DIS_TWAI: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of JTAG_SEL_ENABLE
|
||||
pub const WR_DIS_JTAG_SEL_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_PAD_JTAG
|
||||
pub const WR_DIS_DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of WDT_DELAY_SEL
|
||||
pub const WR_DIS_WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of SPI_BOOT_CRYPT_CNT
|
||||
pub const WR_DIS_SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE0
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(EfuseBlock::Block0, 5, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE1
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE2
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(EfuseBlock::Block0, 7, 1);
|
||||
/// `[WR_DIS.KEY0_PURPOSE]` wr_dis of KEY_PURPOSE_0
|
||||
pub const WR_DIS_KEY_PURPOSE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 8, 1);
|
||||
/// `[WR_DIS.KEY1_PURPOSE]` wr_dis of KEY_PURPOSE_1
|
||||
pub const WR_DIS_KEY_PURPOSE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
|
||||
/// `[WR_DIS.KEY2_PURPOSE]` wr_dis of KEY_PURPOSE_2
|
||||
pub const WR_DIS_KEY_PURPOSE_2: EfuseField = EfuseField::new(EfuseBlock::Block0, 10, 1);
|
||||
/// `[WR_DIS.KEY3_PURPOSE]` wr_dis of KEY_PURPOSE_3
|
||||
pub const WR_DIS_KEY_PURPOSE_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 11, 1);
|
||||
/// `[WR_DIS.KEY4_PURPOSE]` wr_dis of KEY_PURPOSE_4
|
||||
pub const WR_DIS_KEY_PURPOSE_4: EfuseField = EfuseField::new(EfuseBlock::Block0, 12, 1);
|
||||
/// `[WR_DIS.KEY5_PURPOSE]` wr_dis of KEY_PURPOSE_5
|
||||
pub const WR_DIS_KEY_PURPOSE_5: EfuseField = EfuseField::new(EfuseBlock::Block0, 13, 1);
|
||||
/// `[WR_DIS.DPA_SEC_LEVEL]` wr_dis of SEC_DPA_LEVEL
|
||||
pub const WR_DIS_SEC_DPA_LEVEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 14, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_EN
|
||||
pub const WR_DIS_SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 15, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
|
||||
pub const WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 16, 1);
|
||||
/// `[]` wr_dis of SPI_DOWNLOAD_MSPI_DIS
|
||||
pub const WR_DIS_SPI_DOWNLOAD_MSPI_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 17, 1);
|
||||
/// `[]` wr_dis of FLASH_TPUW
|
||||
pub const WR_DIS_FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_DIRECT_BOOT
|
||||
pub const WR_DIS_DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[WR_DIS.DIS_USB_PRINT]` wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
|
||||
pub const WR_DIS_DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of ENABLE_SECURITY_DOWNLOAD
|
||||
pub const WR_DIS_ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of UART_PRINT_CONTROL
|
||||
pub const WR_DIS_UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of FORCE_SEND_RESUME
|
||||
pub const WR_DIS_FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of SECURE_VERSION
|
||||
pub const WR_DIS_SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_DISABLE_FAST_WAKE
|
||||
pub const WR_DIS_SECURE_BOOT_DISABLE_FAST_WAKE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` wr_dis of DISABLE_WAFER_VERSION_MAJOR
|
||||
pub const WR_DIS_DISABLE_WAFER_VERSION_MAJOR: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` wr_dis of DISABLE_BLK_VERSION_MAJOR
|
||||
pub const WR_DIS_DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` wr_dis of BLOCK1
|
||||
pub const WR_DIS_BLK1: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[WR_DIS.MAC_FACTORY]` wr_dis of MAC
|
||||
pub const WR_DIS_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of MAC_EXT
|
||||
pub const WR_DIS_MAC_EXT: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of ACTIVE_HP_DBIAS
|
||||
pub const WR_DIS_ACTIVE_HP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of ACTIVE_LP_DBIAS
|
||||
pub const WR_DIS_ACTIVE_LP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of LSLP_HP_DBG
|
||||
pub const WR_DIS_LSLP_HP_DBG: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of LSLP_HP_DBIAS
|
||||
pub const WR_DIS_LSLP_HP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of DSLP_LP_DBG
|
||||
pub const WR_DIS_DSLP_LP_DBG: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of DSLP_LP_DBIAS
|
||||
pub const WR_DIS_DSLP_LP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of DBIAS_VOL_GAP
|
||||
pub const WR_DIS_DBIAS_VOL_GAP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MINOR
|
||||
pub const WR_DIS_WAFER_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MAJOR
|
||||
pub const WR_DIS_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of PKG_VERSION
|
||||
pub const WR_DIS_PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MINOR
|
||||
pub const WR_DIS_BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MAJOR
|
||||
pub const WR_DIS_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_CAP
|
||||
pub const WR_DIS_FLASH_CAP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_TEMP
|
||||
pub const WR_DIS_FLASH_TEMP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_VENDOR
|
||||
pub const WR_DIS_FLASH_VENDOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of BLOCK2
|
||||
pub const WR_DIS_SYS_DATA_PART1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of OPTIONAL_UNIQUE_ID
|
||||
pub const WR_DIS_OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of TEMP_CALIB
|
||||
pub const WR_DIS_TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of OCODE
|
||||
pub const WR_DIS_OCODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN1
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN2
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN3
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN0
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN1
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN2
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN3
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0_CH0
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN0_CH0: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0_CH1
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN0_CH1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0_CH2
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN0_CH2: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0_CH3
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN0_CH3: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0_CH4
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN0_CH4: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0_CH5
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN0_CH5: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0_CH6
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN0_CH6: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[WR_DIS.USER_DATA]` wr_dis of BLOCK_USR_DATA
|
||||
pub const WR_DIS_BLOCK_USR_DATA: EfuseField = EfuseField::new(EfuseBlock::Block0, 22, 1);
|
||||
/// `[WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM]` wr_dis of CUSTOM_MAC
|
||||
pub const WR_DIS_CUSTOM_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 22, 1);
|
||||
/// `[WR_DIS.KEY0]` wr_dis of BLOCK_KEY0
|
||||
pub const WR_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 23, 1);
|
||||
/// `[WR_DIS.KEY1]` wr_dis of BLOCK_KEY1
|
||||
pub const WR_DIS_BLOCK_KEY1: EfuseField = EfuseField::new(EfuseBlock::Block0, 24, 1);
|
||||
/// `[WR_DIS.KEY2]` wr_dis of BLOCK_KEY2
|
||||
pub const WR_DIS_BLOCK_KEY2: EfuseField = EfuseField::new(EfuseBlock::Block0, 25, 1);
|
||||
/// `[WR_DIS.KEY3]` wr_dis of BLOCK_KEY3
|
||||
pub const WR_DIS_BLOCK_KEY3: EfuseField = EfuseField::new(EfuseBlock::Block0, 26, 1);
|
||||
/// `[WR_DIS.KEY4]` wr_dis of BLOCK_KEY4
|
||||
pub const WR_DIS_BLOCK_KEY4: EfuseField = EfuseField::new(EfuseBlock::Block0, 27, 1);
|
||||
/// `[WR_DIS.KEY5]` wr_dis of BLOCK_KEY5
|
||||
pub const WR_DIS_BLOCK_KEY5: EfuseField = EfuseField::new(EfuseBlock::Block0, 28, 1);
|
||||
/// `[WR_DIS.SYS_DATA_PART2]` wr_dis of BLOCK_SYS_DATA2
|
||||
pub const WR_DIS_BLOCK_SYS_DATA2: EfuseField = EfuseField::new(EfuseBlock::Block0, 29, 1);
|
||||
/// `[]` wr_dis of USB_EXCHG_PINS
|
||||
pub const WR_DIS_USB_EXCHG_PINS: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[]` wr_dis of VDD_SPI_AS_GPIO
|
||||
pub const WR_DIS_VDD_SPI_AS_GPIO: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[]` wr_dis of SOFT_DIS_JTAG
|
||||
pub const WR_DIS_SOFT_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 31, 1);
|
||||
/// `[]` Disable reading from BlOCK4-10
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 7);
|
||||
/// `[RD_DIS.KEY0]` rd_dis of BLOCK_KEY0
|
||||
pub const RD_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 1);
|
||||
/// `[RD_DIS.KEY1]` rd_dis of BLOCK_KEY1
|
||||
pub const RD_DIS_BLOCK_KEY1: EfuseField = EfuseField::new(EfuseBlock::Block0, 33, 1);
|
||||
/// `[RD_DIS.KEY2]` rd_dis of BLOCK_KEY2
|
||||
pub const RD_DIS_BLOCK_KEY2: EfuseField = EfuseField::new(EfuseBlock::Block0, 34, 1);
|
||||
/// `[RD_DIS.KEY3]` rd_dis of BLOCK_KEY3
|
||||
pub const RD_DIS_BLOCK_KEY3: EfuseField = EfuseField::new(EfuseBlock::Block0, 35, 1);
|
||||
/// `[RD_DIS.KEY4]` rd_dis of BLOCK_KEY4
|
||||
pub const RD_DIS_BLOCK_KEY4: EfuseField = EfuseField::new(EfuseBlock::Block0, 36, 1);
|
||||
/// `[RD_DIS.KEY5]` rd_dis of BLOCK_KEY5
|
||||
pub const RD_DIS_BLOCK_KEY5: EfuseField = EfuseField::new(EfuseBlock::Block0, 37, 1);
|
||||
/// `[RD_DIS.SYS_DATA_PART2]` rd_dis of BLOCK_SYS_DATA2
|
||||
pub const RD_DIS_BLOCK_SYS_DATA2: EfuseField = EfuseField::new(EfuseBlock::Block0, 38, 1);
|
||||
/// `[]` Represents whether pad of uart and sdio is swapped or not. 1: swapped.
|
||||
/// 0: not swapped
|
||||
pub const SWAP_UART_SDIO_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 39, 1);
|
||||
/// `[]` Represents whether icache is disabled or enabled. 1: disabled. 0:
|
||||
use super::EfuseField;
|
||||
|
||||
/// Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(0, 0, 0, 32);
|
||||
/// Disable reading from BlOCK4-10
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(0, 1, 32, 7);
|
||||
/// Represents whether pad of uart and sdio is swapped or not. 1: swapped. 0:
|
||||
/// not swapped
|
||||
pub const SWAP_UART_SDIO_EN: EfuseField = EfuseField::new(0, 1, 39, 1);
|
||||
/// Represents whether icache is disabled or enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_ICACHE: EfuseField = EfuseField::new(0, 1, 40, 1);
|
||||
/// Represents whether the function of usb switch to jtag is disabled or
|
||||
/// enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_USB_JTAG: EfuseField = EfuseField::new(0, 1, 41, 1);
|
||||
/// Represents whether icache is disabled or enabled in Download mode. 1:
|
||||
/// disabled. 0: enabled
|
||||
pub const DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(0, 1, 42, 1);
|
||||
/// Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled. 0:
|
||||
/// enabled
|
||||
pub const DIS_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 40, 1);
|
||||
/// `[]` Represents whether the function of usb switch to jtag is disabled or
|
||||
pub const DIS_USB_SERIAL_JTAG: EfuseField = EfuseField::new(0, 1, 43, 1);
|
||||
/// Represents whether the function that forces chip into download mode is
|
||||
/// disabled or enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(0, 1, 44, 1);
|
||||
/// Represents whether SPI0 controller during boot_mode_download is disabled or
|
||||
/// enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_USB_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 41, 1);
|
||||
/// `[]` Represents whether icache is disabled or enabled in Download mode. 1:
|
||||
pub const SPI_DOWNLOAD_MSPI_DIS: EfuseField = EfuseField::new(0, 1, 45, 1);
|
||||
/// Represents whether TWAI function is disabled or enabled. 1: disabled. 0:
|
||||
/// enabled
|
||||
pub const DIS_TWAI: EfuseField = EfuseField::new(0, 1, 46, 1);
|
||||
/// Represents whether the selection between usb_to_jtag and pad_to_jtag through
|
||||
/// strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are
|
||||
/// equal to 0 is enabled or disabled. 1: enabled. 0: disabled
|
||||
pub const JTAG_SEL_ENABLE: EfuseField = EfuseField::new(0, 1, 47, 1);
|
||||
/// Represents whether JTAG is disabled in soft way. Odd number: disabled. Even
|
||||
/// number: enabled
|
||||
pub const SOFT_DIS_JTAG: EfuseField = EfuseField::new(0, 1, 48, 3);
|
||||
/// Represents whether JTAG is disabled in the hard way(permanently). 1:
|
||||
/// disabled. 0: enabled
|
||||
pub const DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 42, 1);
|
||||
/// `[]` Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled.
|
||||
/// 0: enabled
|
||||
pub const DIS_USB_SERIAL_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 43, 1);
|
||||
/// `[]` Represents whether the function that forces chip into download mode is
|
||||
/// disabled or enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 44, 1);
|
||||
/// `[]` Represents whether SPI0 controller during boot_mode_download is
|
||||
/// disabled or enabled. 1: disabled. 0: enabled
|
||||
pub const SPI_DOWNLOAD_MSPI_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 45, 1);
|
||||
/// `[DIS_CAN]` Represents whether TWAI function is disabled or enabled. 1:
|
||||
/// disabled. 0: enabled
|
||||
pub const DIS_TWAI: EfuseField = EfuseField::new(EfuseBlock::Block0, 46, 1);
|
||||
#[allow(unknown_lints)]
|
||||
#[allow(clippy::too_long_first_doc_paragraph)]
|
||||
/// `[]` Represents whether the selection between usb_to_jtag and pad_to_jtag
|
||||
/// through strapping gpio15 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG
|
||||
/// are equal to 0 is enabled or disabled. 1: enabled. 0: disabled
|
||||
pub const JTAG_SEL_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 47, 1);
|
||||
/// `[]` Represents whether JTAG is disabled in soft way. Odd number: disabled.
|
||||
/// Even number: enabled
|
||||
pub const SOFT_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 48, 3);
|
||||
/// `[]` Represents whether JTAG is disabled in the hard way(permanently). 1:
|
||||
/// disabled. 0: enabled
|
||||
pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 51, 1);
|
||||
/// `[]` Represents whether flash encrypt function is disabled or enabled(except
|
||||
/// in SPI boot mode). 1: disabled. 0: enabled
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(EfuseBlock::Block0, 52, 1);
|
||||
/// `[]` Represents whether the D+ and D- pins is exchanged. 1: exchanged. 0:
|
||||
/// not exchanged
|
||||
pub const USB_EXCHG_PINS: EfuseField = EfuseField::new(EfuseBlock::Block0, 57, 1);
|
||||
/// `[]` Represents whether vdd spi pin is functioned as gpio. 1: functioned. 0:
|
||||
/// not functioned
|
||||
pub const VDD_SPI_AS_GPIO: EfuseField = EfuseField::new(EfuseBlock::Block0, 58, 1);
|
||||
/// `[]` Represents whether RTC watchdog timeout threshold is selected at
|
||||
/// startup. 1: selected. 0: not selected
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 80, 2);
|
||||
/// `[]` Enables flash encryption when 1 or 3 bits are set and disables
|
||||
/// otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 82, 3);
|
||||
/// `[]` Revoke 1st secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(EfuseBlock::Block0, 85, 1);
|
||||
/// `[]` Revoke 2nd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(EfuseBlock::Block0, 86, 1);
|
||||
/// `[]` Revoke 3rd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(EfuseBlock::Block0, 87, 1);
|
||||
/// `[KEY0_PURPOSE]` Represents the purpose of Key0
|
||||
pub const KEY_PURPOSE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 88, 4);
|
||||
/// `[KEY1_PURPOSE]` Represents the purpose of Key1
|
||||
pub const KEY_PURPOSE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 92, 4);
|
||||
/// `[KEY2_PURPOSE]` Represents the purpose of Key2
|
||||
pub const KEY_PURPOSE_2: EfuseField = EfuseField::new(EfuseBlock::Block0, 96, 4);
|
||||
/// `[KEY3_PURPOSE]` Represents the purpose of Key3
|
||||
pub const KEY_PURPOSE_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 100, 4);
|
||||
/// `[KEY4_PURPOSE]` Represents the purpose of Key4
|
||||
pub const KEY_PURPOSE_4: EfuseField = EfuseField::new(EfuseBlock::Block0, 104, 4);
|
||||
/// `[KEY5_PURPOSE]` Represents the purpose of Key5
|
||||
pub const KEY_PURPOSE_5: EfuseField = EfuseField::new(EfuseBlock::Block0, 108, 4);
|
||||
/// `[DPA_SEC_LEVEL]` Represents the spa secure level by configuring the clock
|
||||
/// random divide mode
|
||||
pub const SEC_DPA_LEVEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 112, 2);
|
||||
/// `[]` Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled
|
||||
pub const CRYPT_DPA_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 114, 1);
|
||||
/// `[]` Represents whether secure boot is enabled or disabled. 1: enabled. 0:
|
||||
pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(0, 1, 51, 1);
|
||||
/// Represents whether flash encrypt function is disabled or enabled(except in
|
||||
/// SPI boot mode). 1: disabled. 0: enabled
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(0, 1, 52, 1);
|
||||
/// Represents the single-end input threshold vrefh; 1.76 V to 2 V with step of
|
||||
/// 80 mV
|
||||
pub const USB_DREFH: EfuseField = EfuseField::new(0, 1, 53, 2);
|
||||
/// Represents the single-end input threshold vrefl; 1.76 V to 2 V with step of
|
||||
/// 80 mV
|
||||
pub const USB_DREFL: EfuseField = EfuseField::new(0, 1, 55, 2);
|
||||
/// Represents whether the D+ and D- pins is exchanged. 1: exchanged. 0: not
|
||||
/// exchanged
|
||||
pub const USB_EXCHG_PINS: EfuseField = EfuseField::new(0, 1, 57, 1);
|
||||
/// Represents whether vdd spi pin is functioned as gpio. 1: functioned. 0: not
|
||||
/// functioned
|
||||
pub const VDD_SPI_AS_GPIO: EfuseField = EfuseField::new(0, 1, 58, 1);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED0_2: EfuseField = EfuseField::new(0, 1, 59, 2);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED0_1: EfuseField = EfuseField::new(0, 1, 61, 1);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED0_0: EfuseField = EfuseField::new(0, 1, 62, 2);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED1_0: EfuseField = EfuseField::new(0, 2, 64, 16);
|
||||
/// Represents whether RTC watchdog timeout threshold is selected at startup. 1:
|
||||
/// selected. 0: not selected
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(0, 2, 80, 2);
|
||||
/// Enables flash encryption when 1 or 3 bits are set and disables otherwise
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(0, 2, 82, 3);
|
||||
/// Revoke 1st secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(0, 2, 85, 1);
|
||||
/// Revoke 2nd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(0, 2, 86, 1);
|
||||
/// Revoke 3rd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(0, 2, 87, 1);
|
||||
/// Represents the purpose of Key0
|
||||
pub const KEY_PURPOSE_0: EfuseField = EfuseField::new(0, 2, 88, 4);
|
||||
/// Represents the purpose of Key1
|
||||
pub const KEY_PURPOSE_1: EfuseField = EfuseField::new(0, 2, 92, 4);
|
||||
/// Represents the purpose of Key2
|
||||
pub const KEY_PURPOSE_2: EfuseField = EfuseField::new(0, 3, 96, 4);
|
||||
/// Represents the purpose of Key3
|
||||
pub const KEY_PURPOSE_3: EfuseField = EfuseField::new(0, 3, 100, 4);
|
||||
/// Represents the purpose of Key4
|
||||
pub const KEY_PURPOSE_4: EfuseField = EfuseField::new(0, 3, 104, 4);
|
||||
/// Represents the purpose of Key5
|
||||
pub const KEY_PURPOSE_5: EfuseField = EfuseField::new(0, 3, 108, 4);
|
||||
/// Represents the spa secure level by configuring the clock random divide mode
|
||||
pub const SEC_DPA_LEVEL: EfuseField = EfuseField::new(0, 3, 112, 2);
|
||||
/// Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled
|
||||
pub const CRYPT_DPA_ENABLE: EfuseField = EfuseField::new(0, 3, 114, 1);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED2_1: EfuseField = EfuseField::new(0, 3, 115, 1);
|
||||
/// Represents whether secure boot is enabled or disabled. 1: enabled. 0:
|
||||
/// disabled
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 116, 1);
|
||||
/// `[]` Represents whether revoking aggressive secure boot is enabled or
|
||||
/// disabled. 1: enabled. 0: disabled
|
||||
pub const SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField = EfuseField::new(EfuseBlock::Block0, 117, 1);
|
||||
/// `[]` Represents the flash waiting time after power-up; in unit of ms. When
|
||||
/// the value less than 15; the waiting time is the programmed value. Otherwise;
|
||||
/// the waiting time is 2 times the programmed value
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 124, 4);
|
||||
/// `[]` Represents whether Download mode is disabled or enabled. 1: disabled.
|
||||
/// 0: enabled
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 128, 1);
|
||||
/// `[]` Represents whether direct boot mode is disabled or enabled. 1:
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(0, 3, 116, 1);
|
||||
/// Represents whether revoking aggressive secure boot is enabled or disabled.
|
||||
/// 1: enabled. 0: disabled
|
||||
pub const SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField = EfuseField::new(0, 3, 117, 1);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED2_0: EfuseField = EfuseField::new(0, 3, 118, 6);
|
||||
/// Represents the flash waiting time after power-up; in unit of ms. When the
|
||||
/// value less than 15; the waiting time is the programmed value. Otherwise; the
|
||||
/// waiting time is 2 times the programmed value
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(0, 3, 124, 4);
|
||||
/// Represents whether Download mode is disabled or enabled. 1: disabled. 0:
|
||||
/// enabled
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 128, 1);
|
||||
/// Represents whether direct boot mode is disabled or enabled. 1: disabled. 0:
|
||||
/// enabled
|
||||
pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(0, 4, 129, 1);
|
||||
/// Represents whether print from USB-Serial-JTAG is disabled or enabled. 1:
|
||||
/// disabled. 0: enabled
|
||||
pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 129, 1);
|
||||
/// `[DIS_USB_PRINT]` Represents whether print from USB-Serial-JTAG is disabled
|
||||
/// or enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField = EfuseField::new(EfuseBlock::Block0, 130, 1);
|
||||
/// `[]` Represents whether the USB-Serial-JTAG download function is disabled or
|
||||
pub const DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField = EfuseField::new(0, 4, 130, 1);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED3_5: EfuseField = EfuseField::new(0, 4, 131, 1);
|
||||
/// Represents whether the USB-Serial-JTAG download function is disabled or
|
||||
/// enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 132, 1);
|
||||
/// `[]` Represents whether security download is enabled or disabled. 1:
|
||||
/// enabled. 0: disabled
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 133, 1);
|
||||
/// `[]` Set the default UARTboot message output mode {0: "Enable"; 1: "Enable
|
||||
/// when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3:
|
||||
/// "Disable"}
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 134, 2);
|
||||
/// `[]` Represents whether ROM code is forced to send a resume command during
|
||||
/// SPI boot. 1: forced. 0:not forced
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 141, 1);
|
||||
/// `[]` Represents the version used by ESP-IDF anti-rollback feature
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 142, 16);
|
||||
/// `[]` Represents whether FAST VERIFY ON WAKE is disabled or enabled when
|
||||
/// Secure Boot is enabled. 1: disabled. 0: enabled
|
||||
pub const SECURE_BOOT_DISABLE_FAST_WAKE: EfuseField = EfuseField::new(EfuseBlock::Block0, 158, 1);
|
||||
/// `[]` Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 160, 1);
|
||||
/// `[]` Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 161, 1);
|
||||
/// `[MAC_FACTORY]` MAC address
|
||||
pub const MAC: EfuseField = EfuseField::new(EfuseBlock::Block1, 0, 48);
|
||||
/// `[]` Stores the extended bits of MAC address
|
||||
pub const MAC_EXT: EfuseField = EfuseField::new(EfuseBlock::Block1, 48, 16);
|
||||
/// `[]` Stores the active hp dbias
|
||||
pub const ACTIVE_HP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block1, 64, 5);
|
||||
/// `[]` Stores the active lp dbias
|
||||
pub const ACTIVE_LP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block1, 69, 5);
|
||||
/// `[]` Stores the lslp hp dbg
|
||||
pub const LSLP_HP_DBG: EfuseField = EfuseField::new(EfuseBlock::Block1, 74, 2);
|
||||
/// `[]` Stores the lslp hp dbias
|
||||
pub const LSLP_HP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block1, 76, 4);
|
||||
/// `[]` Stores the dslp lp dbg
|
||||
pub const DSLP_LP_DBG: EfuseField = EfuseField::new(EfuseBlock::Block1, 80, 3);
|
||||
/// `[]` Stores the dslp lp dbias
|
||||
pub const DSLP_LP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block1, 83, 4);
|
||||
/// `[]` Stores the hp and lp dbias vol gap
|
||||
pub const DBIAS_VOL_GAP: EfuseField = EfuseField::new(EfuseBlock::Block1, 87, 5);
|
||||
/// `[]`
|
||||
pub const WAFER_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 114, 4);
|
||||
/// `[]`
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 118, 2);
|
||||
/// `[]` Package version
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block1, 120, 3);
|
||||
/// `[]` BLK_VERSION_MINOR of BLOCK2
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 123, 3);
|
||||
/// `[]` BLK_VERSION_MAJOR of BLOCK2
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 126, 2);
|
||||
/// `[]`
|
||||
pub const FLASH_CAP: EfuseField = EfuseField::new(EfuseBlock::Block1, 128, 3);
|
||||
/// `[]`
|
||||
pub const FLASH_TEMP: EfuseField = EfuseField::new(EfuseBlock::Block1, 131, 2);
|
||||
/// `[]`
|
||||
pub const FLASH_VENDOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 133, 3);
|
||||
/// `[]` Optional unique 128-bit ID
|
||||
pub const OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(EfuseBlock::Block2, 0, 128);
|
||||
/// `[]` Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block2, 128, 9);
|
||||
/// `[]` ADC OCode
|
||||
pub const OCODE: EfuseField = EfuseField::new(EfuseBlock::Block2, 137, 8);
|
||||
/// `[]` ADC1 init code at atten0
|
||||
pub const ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 145, 10);
|
||||
/// `[]` ADC1 init code at atten1
|
||||
pub const ADC1_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block2, 155, 10);
|
||||
/// `[]` ADC1 init code at atten2
|
||||
pub const ADC1_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block2, 165, 10);
|
||||
/// `[]` ADC1 init code at atten3
|
||||
pub const ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 175, 10);
|
||||
/// `[]` ADC1 calibration voltage at atten0
|
||||
pub const ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 185, 10);
|
||||
/// `[]` ADC1 calibration voltage at atten1
|
||||
pub const ADC1_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block2, 195, 10);
|
||||
/// `[]` ADC1 calibration voltage at atten2
|
||||
pub const ADC1_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block2, 205, 10);
|
||||
/// `[]` ADC1 calibration voltage at atten3
|
||||
pub const ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 215, 10);
|
||||
/// `[]` ADC1 init code at atten0 ch0
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH0: EfuseField = EfuseField::new(EfuseBlock::Block2, 225, 4);
|
||||
/// `[]` ADC1 init code at atten0 ch1
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH1: EfuseField = EfuseField::new(EfuseBlock::Block2, 229, 4);
|
||||
/// `[]` ADC1 init code at atten0 ch2
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH2: EfuseField = EfuseField::new(EfuseBlock::Block2, 233, 4);
|
||||
/// `[]` ADC1 init code at atten0 ch3
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH3: EfuseField = EfuseField::new(EfuseBlock::Block2, 237, 4);
|
||||
/// `[]` ADC1 init code at atten0 ch4
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH4: EfuseField = EfuseField::new(EfuseBlock::Block2, 241, 4);
|
||||
/// `[]` ADC1 init code at atten0 ch5
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH5: EfuseField = EfuseField::new(EfuseBlock::Block2, 245, 4);
|
||||
/// `[]` ADC1 init code at atten0 ch6
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH6: EfuseField = EfuseField::new(EfuseBlock::Block2, 249, 4);
|
||||
/// `[BLOCK_USR_DATA]` User data
|
||||
pub const USER_DATA: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 256);
|
||||
/// `[MAC_CUSTOM CUSTOM_MAC]` Custom MAC
|
||||
pub const USER_DATA_MAC_CUSTOM: EfuseField = EfuseField::new(EfuseBlock::Block3, 200, 48);
|
||||
/// `[BLOCK_KEY0]` Key0 or user data
|
||||
pub const KEY0: EfuseField = EfuseField::new(EfuseBlock::Block4, 0, 256);
|
||||
/// `[BLOCK_KEY1]` Key1 or user data
|
||||
pub const KEY1: EfuseField = EfuseField::new(EfuseBlock::Block5, 0, 256);
|
||||
/// `[BLOCK_KEY2]` Key2 or user data
|
||||
pub const KEY2: EfuseField = EfuseField::new(EfuseBlock::Block6, 0, 256);
|
||||
/// `[BLOCK_KEY3]` Key3 or user data
|
||||
pub const KEY3: EfuseField = EfuseField::new(EfuseBlock::Block7, 0, 256);
|
||||
/// `[BLOCK_KEY4]` Key4 or user data
|
||||
pub const KEY4: EfuseField = EfuseField::new(EfuseBlock::Block8, 0, 256);
|
||||
/// `[BLOCK_KEY5]` Key5 or user data
|
||||
pub const KEY5: EfuseField = EfuseField::new(EfuseBlock::Block9, 0, 256);
|
||||
/// `[BLOCK_SYS_DATA2]` System data part 2 (reserved)
|
||||
pub const SYS_DATA_PART2: EfuseField = EfuseField::new(EfuseBlock::Block10, 0, 256);
|
||||
pub const DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 132, 1);
|
||||
/// Represents whether security download is enabled or disabled. 1: enabled. 0:
|
||||
/// disabled
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(0, 4, 133, 1);
|
||||
/// Set the default UARTboot message output mode
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(0, 4, 134, 2);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED3_4: EfuseField = EfuseField::new(0, 4, 136, 1);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED3_3: EfuseField = EfuseField::new(0, 4, 137, 1);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED3_2: EfuseField = EfuseField::new(0, 4, 138, 2);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED3_1: EfuseField = EfuseField::new(0, 4, 140, 1);
|
||||
/// Represents whether ROM code is forced to send a resume command during SPI
|
||||
/// boot. 1: forced. 0:not forced
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(0, 4, 141, 1);
|
||||
/// Represents the version used by ESP-IDF anti-rollback feature
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(0, 4, 142, 16);
|
||||
/// Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure
|
||||
/// Boot is enabled. 1: disabled. 0: enabled
|
||||
pub const SECURE_BOOT_DISABLE_FAST_WAKE: EfuseField = EfuseField::new(0, 4, 158, 1);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED3_0: EfuseField = EfuseField::new(0, 4, 159, 1);
|
||||
/// Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(0, 5, 160, 1);
|
||||
/// Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(0, 5, 161, 1);
|
||||
/// reserved
|
||||
pub const RESERVED_0_162: EfuseField = EfuseField::new(0, 5, 162, 22);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED4_0: EfuseField = EfuseField::new(0, 5, 184, 8);
|
||||
/// MAC address
|
||||
pub const MAC0: EfuseField = EfuseField::new(1, 0, 0, 32);
|
||||
/// MAC address
|
||||
pub const MAC1: EfuseField = EfuseField::new(1, 1, 32, 16);
|
||||
/// Stores the extended bits of MAC address
|
||||
pub const MAC_EXT: EfuseField = EfuseField::new(1, 1, 48, 16);
|
||||
/// Stores the active hp dbias
|
||||
pub const ACTIVE_HP_DBIAS: EfuseField = EfuseField::new(1, 2, 64, 5);
|
||||
/// Stores the active lp dbias
|
||||
pub const ACTIVE_LP_DBIAS: EfuseField = EfuseField::new(1, 2, 69, 5);
|
||||
/// Stores the lslp hp dbg
|
||||
pub const LSLP_HP_DBG: EfuseField = EfuseField::new(1, 2, 74, 2);
|
||||
/// Stores the lslp hp dbias
|
||||
pub const LSLP_HP_DBIAS: EfuseField = EfuseField::new(1, 2, 76, 4);
|
||||
/// Stores the dslp lp dbg
|
||||
pub const DSLP_LP_DBG: EfuseField = EfuseField::new(1, 2, 80, 3);
|
||||
/// Stores the dslp lp dbias
|
||||
pub const DSLP_LP_DBIAS: EfuseField = EfuseField::new(1, 2, 83, 4);
|
||||
/// Stores the hp and lp dbias vol gap
|
||||
pub const DBIAS_VOL_GAP: EfuseField = EfuseField::new(1, 2, 87, 5);
|
||||
/// Stores the first part of SPI_PAD_CONF
|
||||
pub const SPI_PAD_CONF_1: EfuseField = EfuseField::new(1, 2, 92, 4);
|
||||
/// Stores the second part of SPI_PAD_CONF
|
||||
pub const SPI_PAD_CONF_2: EfuseField = EfuseField::new(1, 3, 96, 18);
|
||||
///
|
||||
pub const WAFER_VERSION_MINOR: EfuseField = EfuseField::new(1, 3, 114, 4);
|
||||
///
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(1, 3, 118, 2);
|
||||
/// Package version
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(1, 3, 120, 3);
|
||||
/// BLK_VERSION_MINOR of BLOCK2
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(1, 3, 123, 3);
|
||||
/// BLK_VERSION_MAJOR of BLOCK2
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(1, 3, 126, 2);
|
||||
///
|
||||
pub const FLASH_CAP: EfuseField = EfuseField::new(1, 4, 128, 3);
|
||||
///
|
||||
pub const FLASH_TEMP: EfuseField = EfuseField::new(1, 4, 131, 2);
|
||||
///
|
||||
pub const FLASH_VENDOR: EfuseField = EfuseField::new(1, 4, 133, 3);
|
||||
/// reserved
|
||||
pub const RESERVED_1_136: EfuseField = EfuseField::new(1, 4, 136, 24);
|
||||
/// Stores the second 32 bits of the zeroth part of system data
|
||||
pub const SYS_DATA_PART0_2: EfuseField = EfuseField::new(1, 5, 160, 32);
|
||||
/// Optional unique 128-bit ID
|
||||
pub const OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(2, 0, 0, 128);
|
||||
/// Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(2, 4, 128, 9);
|
||||
/// ADC OCode
|
||||
pub const OCODE: EfuseField = EfuseField::new(2, 4, 137, 8);
|
||||
/// ADC1 init code at atten0
|
||||
pub const ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(2, 4, 145, 10);
|
||||
/// ADC1 init code at atten1
|
||||
pub const ADC1_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(2, 4, 155, 10);
|
||||
/// ADC1 init code at atten2
|
||||
pub const ADC1_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(2, 5, 165, 10);
|
||||
/// ADC1 init code at atten3
|
||||
pub const ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(2, 5, 175, 10);
|
||||
/// ADC1 calibration voltage at atten0
|
||||
pub const ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(2, 5, 185, 10);
|
||||
/// ADC1 calibration voltage at atten1
|
||||
pub const ADC1_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(2, 6, 195, 10);
|
||||
/// ADC1 calibration voltage at atten2
|
||||
pub const ADC1_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(2, 6, 205, 10);
|
||||
/// ADC1 calibration voltage at atten3
|
||||
pub const ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(2, 6, 215, 10);
|
||||
/// ADC1 init code at atten0 ch0
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH0: EfuseField = EfuseField::new(2, 7, 225, 4);
|
||||
/// ADC1 init code at atten0 ch1
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH1: EfuseField = EfuseField::new(2, 7, 229, 4);
|
||||
/// ADC1 init code at atten0 ch2
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH2: EfuseField = EfuseField::new(2, 7, 233, 4);
|
||||
/// ADC1 init code at atten0 ch3
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH3: EfuseField = EfuseField::new(2, 7, 237, 4);
|
||||
/// ADC1 init code at atten0 ch4
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH4: EfuseField = EfuseField::new(2, 7, 241, 4);
|
||||
/// ADC1 init code at atten0 ch5
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH5: EfuseField = EfuseField::new(2, 7, 245, 4);
|
||||
/// ADC1 init code at atten0 ch6
|
||||
pub const ADC1_INIT_CODE_ATTEN0_CH6: EfuseField = EfuseField::new(2, 7, 249, 4);
|
||||
/// reserved
|
||||
pub const RESERVED_2_253: EfuseField = EfuseField::new(2, 7, 253, 3);
|
||||
/// User data
|
||||
pub const BLOCK_USR_DATA: EfuseField = EfuseField::new(3, 0, 0, 192);
|
||||
/// reserved
|
||||
pub const RESERVED_3_192: EfuseField = EfuseField::new(3, 6, 192, 8);
|
||||
/// Custom MAC
|
||||
pub const CUSTOM_MAC: EfuseField = EfuseField::new(3, 6, 200, 48);
|
||||
/// reserved
|
||||
pub const RESERVED_3_248: EfuseField = EfuseField::new(3, 7, 248, 8);
|
||||
/// Key0 or user data
|
||||
pub const BLOCK_KEY0: EfuseField = EfuseField::new(4, 0, 0, 256);
|
||||
/// Key1 or user data
|
||||
pub const BLOCK_KEY1: EfuseField = EfuseField::new(5, 0, 0, 256);
|
||||
/// Key2 or user data
|
||||
pub const BLOCK_KEY2: EfuseField = EfuseField::new(6, 0, 0, 256);
|
||||
/// Key3 or user data
|
||||
pub const BLOCK_KEY3: EfuseField = EfuseField::new(7, 0, 0, 256);
|
||||
/// Key4 or user data
|
||||
pub const BLOCK_KEY4: EfuseField = EfuseField::new(8, 0, 0, 256);
|
||||
/// Key5 or user data
|
||||
pub const BLOCK_KEY5: EfuseField = EfuseField::new(9, 0, 0, 256);
|
||||
/// System data part 2 (reserved)
|
||||
pub const BLOCK_SYS_DATA2: EfuseField = EfuseField::new(10, 0, 0, 256);
|
||||
|
||||
@ -42,7 +42,7 @@
|
||||
//! ```
|
||||
|
||||
pub use self::fields::*;
|
||||
use crate::{analog::adc::Attenuation, peripherals::EFUSE};
|
||||
use crate::{analog::adc::Attenuation, peripherals::EFUSE, soc::efuse_field::EfuseField};
|
||||
|
||||
mod fields;
|
||||
|
||||
@ -50,11 +50,6 @@ mod fields;
|
||||
pub struct Efuse;
|
||||
|
||||
impl Efuse {
|
||||
/// Reads chip's MAC address from the eFuse storage.
|
||||
pub fn read_base_mac_address() -> [u8; 6] {
|
||||
Self::read_field_be(MAC)
|
||||
}
|
||||
|
||||
/// Get status of SPI boot encryption.
|
||||
pub fn flash_encryption() -> bool {
|
||||
(Self::read_field_le::<u8>(SPI_BOOT_CRYPT_CNT).count_ones() % 2) != 0
|
||||
@ -164,7 +159,8 @@ impl Efuse {
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
#[derive(Debug, Clone, Copy, strum::FromRepr)]
|
||||
#[repr(u32)]
|
||||
pub(crate) enum EfuseBlock {
|
||||
Block0,
|
||||
Block1,
|
||||
|
||||
@ -1,412 +1,249 @@
|
||||
//! eFuse fields for the ESP32-H2.
|
||||
//!
|
||||
//! This file was automatically generated, please do not edit it manually!
|
||||
//!
|
||||
//! For information on how to regenerate these files, please refer to the
|
||||
//! `xtask` package's `README.md` file.
|
||||
//!
|
||||
//! Generated on: 2024-03-11
|
||||
//! ESP-IDF Commit: 0de2912f
|
||||
//! Generated: 2025-04-22 11:33
|
||||
//! Version: 44563d2af4ebdba4db6c0a34a50c94f9
|
||||
|
||||
use super::EfuseBlock;
|
||||
use crate::soc::efuse_field::EfuseField;
|
||||
#![allow(clippy::empty_docs)]
|
||||
|
||||
/// `[]` Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 32);
|
||||
/// `[]` wr_dis of RD_DIS
|
||||
pub const WR_DIS_RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 1);
|
||||
/// `[]` wr_dis of DIS_ICACHE
|
||||
pub const WR_DIS_DIS_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_USB_JTAG
|
||||
pub const WR_DIS_DIS_USB_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of POWERGLITCH_EN
|
||||
pub const WR_DIS_POWERGLITCH_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_FORCE_DOWNLOAD
|
||||
pub const WR_DIS_DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of SPI_DOWNLOAD_MSPI_DIS
|
||||
pub const WR_DIS_SPI_DOWNLOAD_MSPI_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[WR_DIS.DIS_CAN]` wr_dis of DIS_TWAI
|
||||
pub const WR_DIS_DIS_TWAI: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of JTAG_SEL_ENABLE
|
||||
pub const WR_DIS_JTAG_SEL_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_PAD_JTAG
|
||||
pub const WR_DIS_DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of WDT_DELAY_SEL
|
||||
pub const WR_DIS_WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of SPI_BOOT_CRYPT_CNT
|
||||
pub const WR_DIS_SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE0
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(EfuseBlock::Block0, 5, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE1
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE2
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(EfuseBlock::Block0, 7, 1);
|
||||
/// `[WR_DIS.KEY0_PURPOSE]` wr_dis of KEY_PURPOSE_0
|
||||
pub const WR_DIS_KEY_PURPOSE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 8, 1);
|
||||
/// `[WR_DIS.KEY1_PURPOSE]` wr_dis of KEY_PURPOSE_1
|
||||
pub const WR_DIS_KEY_PURPOSE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
|
||||
/// `[WR_DIS.KEY2_PURPOSE]` wr_dis of KEY_PURPOSE_2
|
||||
pub const WR_DIS_KEY_PURPOSE_2: EfuseField = EfuseField::new(EfuseBlock::Block0, 10, 1);
|
||||
/// `[WR_DIS.KEY3_PURPOSE]` wr_dis of KEY_PURPOSE_3
|
||||
pub const WR_DIS_KEY_PURPOSE_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 11, 1);
|
||||
/// `[WR_DIS.KEY4_PURPOSE]` wr_dis of KEY_PURPOSE_4
|
||||
pub const WR_DIS_KEY_PURPOSE_4: EfuseField = EfuseField::new(EfuseBlock::Block0, 12, 1);
|
||||
/// `[WR_DIS.KEY5_PURPOSE]` wr_dis of KEY_PURPOSE_5
|
||||
pub const WR_DIS_KEY_PURPOSE_5: EfuseField = EfuseField::new(EfuseBlock::Block0, 13, 1);
|
||||
/// `[]` wr_dis of SEC_DPA_LEVEL
|
||||
pub const WR_DIS_SEC_DPA_LEVEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 14, 1);
|
||||
/// `[]` wr_dis of CRYPT_DPA_ENABLE
|
||||
pub const WR_DIS_CRYPT_DPA_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 14, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_EN
|
||||
pub const WR_DIS_SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 15, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
|
||||
pub const WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 16, 1);
|
||||
/// `[]` wr_dis of ECDSA_FORCE_USE_HARDWARE_K
|
||||
pub const WR_DIS_ECDSA_FORCE_USE_HARDWARE_K: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 17, 1);
|
||||
/// `[]` wr_dis of FLASH_TPUW
|
||||
pub const WR_DIS_FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_DIRECT_BOOT
|
||||
pub const WR_DIS_DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[WR_DIS.DIS_USB_PRINT]` wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
|
||||
pub const WR_DIS_DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of ENABLE_SECURITY_DOWNLOAD
|
||||
pub const WR_DIS_ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of UART_PRINT_CONTROL
|
||||
pub const WR_DIS_UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of FORCE_SEND_RESUME
|
||||
pub const WR_DIS_FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of SECURE_VERSION
|
||||
pub const WR_DIS_SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_DISABLE_FAST_WAKE
|
||||
pub const WR_DIS_SECURE_BOOT_DISABLE_FAST_WAKE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of HYS_EN_PAD0
|
||||
pub const WR_DIS_HYS_EN_PAD0: EfuseField = EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` wr_dis of HYS_EN_PAD1
|
||||
pub const WR_DIS_HYS_EN_PAD1: EfuseField = EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` wr_dis of BLOCK1
|
||||
pub const WR_DIS_BLK1: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[WR_DIS.MAC_FACTORY]` wr_dis of MAC
|
||||
pub const WR_DIS_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of MAC_EXT
|
||||
pub const WR_DIS_MAC_EXT: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of RXIQ_VERSION
|
||||
pub const WR_DIS_RXIQ_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of RXIQ_0
|
||||
pub const WR_DIS_RXIQ_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of RXIQ_1
|
||||
pub const WR_DIS_RXIQ_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of ACTIVE_HP_DBIAS
|
||||
pub const WR_DIS_ACTIVE_HP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of ACTIVE_LP_DBIAS
|
||||
pub const WR_DIS_ACTIVE_LP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of DSLP_DBIAS
|
||||
pub const WR_DIS_DSLP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of DBIAS_VOL_GAP
|
||||
pub const WR_DIS_DBIAS_VOL_GAP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MINOR
|
||||
pub const WR_DIS_WAFER_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MAJOR
|
||||
pub const WR_DIS_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of DISABLE_WAFER_VERSION_MAJOR
|
||||
pub const WR_DIS_DISABLE_WAFER_VERSION_MAJOR: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_CAP
|
||||
pub const WR_DIS_FLASH_CAP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_TEMP
|
||||
pub const WR_DIS_FLASH_TEMP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_VENDOR
|
||||
pub const WR_DIS_FLASH_VENDOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of PKG_VERSION
|
||||
pub const WR_DIS_PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of BLOCK2
|
||||
pub const WR_DIS_SYS_DATA_PART1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of OPTIONAL_UNIQUE_ID
|
||||
pub const WR_DIS_OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MINOR
|
||||
pub const WR_DIS_BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MAJOR
|
||||
pub const WR_DIS_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of DISABLE_BLK_VERSION_MAJOR
|
||||
pub const WR_DIS_DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of TEMP_CALIB
|
||||
pub const WR_DIS_TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_AVE_INITCODE_ATTEN0
|
||||
pub const WR_DIS_ADC1_AVE_INITCODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_AVE_INITCODE_ATTEN1
|
||||
pub const WR_DIS_ADC1_AVE_INITCODE_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_AVE_INITCODE_ATTEN2
|
||||
pub const WR_DIS_ADC1_AVE_INITCODE_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_AVE_INITCODE_ATTEN3
|
||||
pub const WR_DIS_ADC1_AVE_INITCODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_HI_DOUT_ATTEN0
|
||||
pub const WR_DIS_ADC1_HI_DOUT_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_HI_DOUT_ATTEN1
|
||||
pub const WR_DIS_ADC1_HI_DOUT_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_HI_DOUT_ATTEN2
|
||||
pub const WR_DIS_ADC1_HI_DOUT_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_HI_DOUT_ATTEN3
|
||||
pub const WR_DIS_ADC1_HI_DOUT_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CH0_ATTEN0_INITCODE_DIFF
|
||||
pub const WR_DIS_ADC1_CH0_ATTEN0_INITCODE_DIFF: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CH1_ATTEN0_INITCODE_DIFF
|
||||
pub const WR_DIS_ADC1_CH1_ATTEN0_INITCODE_DIFF: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CH2_ATTEN0_INITCODE_DIFF
|
||||
pub const WR_DIS_ADC1_CH2_ATTEN0_INITCODE_DIFF: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CH3_ATTEN0_INITCODE_DIFF
|
||||
pub const WR_DIS_ADC1_CH3_ATTEN0_INITCODE_DIFF: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CH4_ATTEN0_INITCODE_DIFF
|
||||
pub const WR_DIS_ADC1_CH4_ATTEN0_INITCODE_DIFF: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[WR_DIS.USER_DATA]` wr_dis of BLOCK_USR_DATA
|
||||
pub const WR_DIS_BLOCK_USR_DATA: EfuseField = EfuseField::new(EfuseBlock::Block0, 22, 1);
|
||||
/// `[WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM]` wr_dis of CUSTOM_MAC
|
||||
pub const WR_DIS_CUSTOM_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 22, 1);
|
||||
/// `[WR_DIS.KEY0]` wr_dis of BLOCK_KEY0
|
||||
pub const WR_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 23, 1);
|
||||
/// `[WR_DIS.KEY1]` wr_dis of BLOCK_KEY1
|
||||
pub const WR_DIS_BLOCK_KEY1: EfuseField = EfuseField::new(EfuseBlock::Block0, 24, 1);
|
||||
/// `[WR_DIS.KEY2]` wr_dis of BLOCK_KEY2
|
||||
pub const WR_DIS_BLOCK_KEY2: EfuseField = EfuseField::new(EfuseBlock::Block0, 25, 1);
|
||||
/// `[WR_DIS.KEY3]` wr_dis of BLOCK_KEY3
|
||||
pub const WR_DIS_BLOCK_KEY3: EfuseField = EfuseField::new(EfuseBlock::Block0, 26, 1);
|
||||
/// `[WR_DIS.KEY4]` wr_dis of BLOCK_KEY4
|
||||
pub const WR_DIS_BLOCK_KEY4: EfuseField = EfuseField::new(EfuseBlock::Block0, 27, 1);
|
||||
/// `[WR_DIS.KEY5]` wr_dis of BLOCK_KEY5
|
||||
pub const WR_DIS_BLOCK_KEY5: EfuseField = EfuseField::new(EfuseBlock::Block0, 28, 1);
|
||||
/// `[WR_DIS.SYS_DATA_PART2]` wr_dis of BLOCK_SYS_DATA2
|
||||
pub const WR_DIS_BLOCK_SYS_DATA2: EfuseField = EfuseField::new(EfuseBlock::Block0, 29, 1);
|
||||
/// `[]` wr_dis of USB_EXCHG_PINS
|
||||
pub const WR_DIS_USB_EXCHG_PINS: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[]` wr_dis of VDD_SPI_AS_GPIO
|
||||
pub const WR_DIS_VDD_SPI_AS_GPIO: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[]` wr_dis of SOFT_DIS_JTAG
|
||||
pub const WR_DIS_SOFT_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 31, 1);
|
||||
/// `[]` Disable reading from BlOCK4-10
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 7);
|
||||
/// `[RD_DIS.KEY0]` rd_dis of BLOCK_KEY0
|
||||
pub const RD_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 1);
|
||||
/// `[RD_DIS.KEY1]` rd_dis of BLOCK_KEY1
|
||||
pub const RD_DIS_BLOCK_KEY1: EfuseField = EfuseField::new(EfuseBlock::Block0, 33, 1);
|
||||
/// `[RD_DIS.KEY2]` rd_dis of BLOCK_KEY2
|
||||
pub const RD_DIS_BLOCK_KEY2: EfuseField = EfuseField::new(EfuseBlock::Block0, 34, 1);
|
||||
/// `[RD_DIS.KEY3]` rd_dis of BLOCK_KEY3
|
||||
pub const RD_DIS_BLOCK_KEY3: EfuseField = EfuseField::new(EfuseBlock::Block0, 35, 1);
|
||||
/// `[RD_DIS.KEY4]` rd_dis of BLOCK_KEY4
|
||||
pub const RD_DIS_BLOCK_KEY4: EfuseField = EfuseField::new(EfuseBlock::Block0, 36, 1);
|
||||
/// `[RD_DIS.KEY5]` rd_dis of BLOCK_KEY5
|
||||
pub const RD_DIS_BLOCK_KEY5: EfuseField = EfuseField::new(EfuseBlock::Block0, 37, 1);
|
||||
/// `[RD_DIS.SYS_DATA_PART2]` rd_dis of BLOCK_SYS_DATA2
|
||||
pub const RD_DIS_BLOCK_SYS_DATA2: EfuseField = EfuseField::new(EfuseBlock::Block0, 38, 1);
|
||||
/// `[]` Represents whether icache is disabled or enabled. 1: disabled. 0:
|
||||
use super::EfuseField;
|
||||
|
||||
/// Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(0, 0, 0, 32);
|
||||
/// Disable reading from BlOCK4-10
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(0, 1, 32, 7);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED0_4: EfuseField = EfuseField::new(0, 1, 39, 1);
|
||||
/// Represents whether icache is disabled or enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_ICACHE: EfuseField = EfuseField::new(0, 1, 40, 1);
|
||||
/// Represents whether the function of usb switch to jtag is disabled or
|
||||
/// enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_USB_JTAG: EfuseField = EfuseField::new(0, 1, 41, 1);
|
||||
/// Represents whether power glitch function is enabled. 1: enabled. 0: disabled
|
||||
pub const POWERGLITCH_EN: EfuseField = EfuseField::new(0, 1, 42, 1);
|
||||
/// Represents whether USB-Serial-JTAG is disabled or enabled. 1: disabled. 0:
|
||||
/// enabled
|
||||
pub const DIS_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 40, 1);
|
||||
/// `[]` Represents whether the function of usb switch to jtag is disabled or
|
||||
/// enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_USB_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 41, 1);
|
||||
/// `[]` Represents whether power glitch function is enabled. 1: enabled. 0:
|
||||
/// disabled
|
||||
pub const POWERGLITCH_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 42, 1);
|
||||
/// `[]` Represents whether the function that forces chip into download mode is
|
||||
pub const DIS_USB_SERIAL_JTAG: EfuseField = EfuseField::new(0, 1, 43, 1);
|
||||
/// Represents whether the function that forces chip into download mode is
|
||||
/// disabled or enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 44, 1);
|
||||
/// `[]` Represents whether SPI0 controller during boot_mode_download is
|
||||
/// disabled or enabled. 1: disabled. 0: enabled
|
||||
pub const SPI_DOWNLOAD_MSPI_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 45, 1);
|
||||
/// `[DIS_CAN]` Represents whether TWAI function is disabled or enabled. 1:
|
||||
/// disabled. 0: enabled
|
||||
pub const DIS_TWAI: EfuseField = EfuseField::new(EfuseBlock::Block0, 46, 1);
|
||||
/// `[]` Set this bit to enable selection between usb_to_jtag and pad_to_jtag
|
||||
/// through strapping gpio25 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG
|
||||
/// are equal to 0
|
||||
pub const JTAG_SEL_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 47, 1);
|
||||
/// `[]` Represents whether JTAG is disabled in soft way. Odd number: disabled.
|
||||
/// Even number: enabled
|
||||
pub const SOFT_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 48, 3);
|
||||
/// `[]` Represents whether JTAG is disabled in the hard way(permanently). 1:
|
||||
/// disabled. 0: enabled
|
||||
pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 51, 1);
|
||||
/// `[]` Represents whether flash encrypt function is disabled or enabled(except
|
||||
/// in SPI boot mode). 1: disabled. 0: enabled
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(EfuseBlock::Block0, 52, 1);
|
||||
/// `[]` Represents whether the D+ and D- pins is exchanged. 1: exchanged. 0:
|
||||
/// not exchanged
|
||||
pub const USB_EXCHG_PINS: EfuseField = EfuseField::new(EfuseBlock::Block0, 57, 1);
|
||||
/// `[]` Represents whether vdd spi pin is functioned as gpio. 1: functioned. 0:
|
||||
/// not functioned
|
||||
pub const VDD_SPI_AS_GPIO: EfuseField = EfuseField::new(EfuseBlock::Block0, 58, 1);
|
||||
/// `[]` Represents whether RTC watchdog timeout threshold is selected at
|
||||
/// startup. 1: selected. 0: not selected
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 80, 2);
|
||||
/// `[]` Enables flash encryption when 1 or 3 bits are set and disables
|
||||
/// otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 82, 3);
|
||||
/// `[]` Revoke 1st secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(EfuseBlock::Block0, 85, 1);
|
||||
/// `[]` Revoke 2nd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(EfuseBlock::Block0, 86, 1);
|
||||
/// `[]` Revoke 3rd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(EfuseBlock::Block0, 87, 1);
|
||||
/// `[KEY0_PURPOSE]` Represents the purpose of Key0
|
||||
pub const KEY_PURPOSE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 88, 4);
|
||||
/// `[KEY1_PURPOSE]` Represents the purpose of Key1
|
||||
pub const KEY_PURPOSE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 92, 4);
|
||||
/// `[KEY2_PURPOSE]` Represents the purpose of Key2
|
||||
pub const KEY_PURPOSE_2: EfuseField = EfuseField::new(EfuseBlock::Block0, 96, 4);
|
||||
/// `[KEY3_PURPOSE]` Represents the purpose of Key3
|
||||
pub const KEY_PURPOSE_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 100, 4);
|
||||
/// `[KEY4_PURPOSE]` Represents the purpose of Key4
|
||||
pub const KEY_PURPOSE_4: EfuseField = EfuseField::new(EfuseBlock::Block0, 104, 4);
|
||||
/// `[KEY5_PURPOSE]` Represents the purpose of Key5
|
||||
pub const KEY_PURPOSE_5: EfuseField = EfuseField::new(EfuseBlock::Block0, 108, 4);
|
||||
/// `[]` Represents the spa secure level by configuring the clock random divide
|
||||
/// mode
|
||||
pub const SEC_DPA_LEVEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 112, 2);
|
||||
/// `[]` Represents whether hardware random number k is forced used in ESDCA. 1:
|
||||
/// force used. 0: not force used
|
||||
pub const ECDSA_FORCE_USE_HARDWARE_K: EfuseField = EfuseField::new(EfuseBlock::Block0, 114, 1);
|
||||
/// `[]` Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled
|
||||
pub const CRYPT_DPA_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 115, 1);
|
||||
/// `[]` Represents whether secure boot is enabled or disabled. 1: enabled. 0:
|
||||
/// disabled
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 116, 1);
|
||||
/// `[]` Represents whether revoking aggressive secure boot is enabled or
|
||||
/// disabled. 1: enabled. 0: disabled
|
||||
pub const SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField = EfuseField::new(EfuseBlock::Block0, 117, 1);
|
||||
/// `[]` Represents the flash waiting time after power-up; in unit of ms. When
|
||||
/// the value less than 15; the waiting time is the programmed value. Otherwise;
|
||||
/// the waiting time is 2 times the programmed value
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 124, 4);
|
||||
/// `[]` Represents whether Download mode is disabled or enabled. 1: disabled.
|
||||
/// 0: enabled
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 128, 1);
|
||||
/// `[]` Represents whether direct boot mode is disabled or enabled. 1:
|
||||
/// disabled. 0: enabled
|
||||
pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 129, 1);
|
||||
/// `[DIS_USB_PRINT]` Set this bit to disable USB-Serial-JTAG print during rom
|
||||
/// boot
|
||||
pub const DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField = EfuseField::new(EfuseBlock::Block0, 130, 1);
|
||||
/// `[]` Represents whether the USB-Serial-JTAG download function is disabled or
|
||||
pub const DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(0, 1, 44, 1);
|
||||
/// Represents whether SPI0 controller during boot_mode_download is disabled or
|
||||
/// enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 132, 1);
|
||||
/// `[]` Represents whether security download is enabled or disabled. 1:
|
||||
/// enabled. 0: disabled
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 133, 1);
|
||||
/// `[]` Set the default UARTboot message output mode {0: "Enable"; 1: "Enable
|
||||
/// when GPIO8 is low at reset"; 2: "Enable when GPIO8 is high at reset"; 3:
|
||||
/// "Disable"}
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 134, 2);
|
||||
/// `[]` Represents whether ROM code is forced to send a resume command during
|
||||
/// SPI boot. 1: forced. 0:not forced
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 136, 1);
|
||||
/// `[]` Represents the version used by ESP-IDF anti-rollback feature
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 137, 16);
|
||||
/// `[]` Represents whether FAST VERIFY ON WAKE is disabled or enabled when
|
||||
/// Secure Boot is enabled. 1: disabled. 0: enabled
|
||||
pub const SECURE_BOOT_DISABLE_FAST_WAKE: EfuseField = EfuseField::new(EfuseBlock::Block0, 153, 1);
|
||||
/// `[]` Set bits to enable hysteresis function of PAD0~5
|
||||
pub const HYS_EN_PAD0: EfuseField = EfuseField::new(EfuseBlock::Block0, 154, 6);
|
||||
/// `[]` Set bits to enable hysteresis function of PAD6~27
|
||||
pub const HYS_EN_PAD1: EfuseField = EfuseField::new(EfuseBlock::Block0, 160, 22);
|
||||
/// `[MAC_FACTORY]` MAC address
|
||||
pub const MAC: EfuseField = EfuseField::new(EfuseBlock::Block1, 0, 48);
|
||||
/// `[]` Stores the extended bits of MAC address
|
||||
pub const MAC_EXT: EfuseField = EfuseField::new(EfuseBlock::Block1, 48, 16);
|
||||
/// `[]` Stores RF Calibration data. RXIQ version
|
||||
pub const RXIQ_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block1, 64, 3);
|
||||
/// `[]` Stores RF Calibration data. RXIQ data 0
|
||||
pub const RXIQ_0: EfuseField = EfuseField::new(EfuseBlock::Block1, 67, 7);
|
||||
/// `[]` Stores RF Calibration data. RXIQ data 1
|
||||
pub const RXIQ_1: EfuseField = EfuseField::new(EfuseBlock::Block1, 74, 7);
|
||||
/// `[]` Stores the PMU active hp dbias
|
||||
pub const ACTIVE_HP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block1, 81, 5);
|
||||
/// `[]` Stores the PMU active lp dbias
|
||||
pub const ACTIVE_LP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block1, 86, 5);
|
||||
/// `[]` Stores the PMU sleep dbias
|
||||
pub const DSLP_DBIAS: EfuseField = EfuseField::new(EfuseBlock::Block1, 91, 4);
|
||||
/// `[]` Stores the low 1 bit of dbias_vol_gap
|
||||
pub const DBIAS_VOL_GAP: EfuseField = EfuseField::new(EfuseBlock::Block1, 95, 5);
|
||||
/// `[]` Stores the wafer version minor
|
||||
pub const WAFER_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 114, 3);
|
||||
/// `[]` Stores the wafer version major
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 117, 2);
|
||||
/// `[]` Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 119, 1);
|
||||
/// `[]` Stores the flash cap
|
||||
pub const FLASH_CAP: EfuseField = EfuseField::new(EfuseBlock::Block1, 120, 3);
|
||||
/// `[]` Stores the flash temp
|
||||
pub const FLASH_TEMP: EfuseField = EfuseField::new(EfuseBlock::Block1, 123, 2);
|
||||
/// `[]` Stores the flash vendor
|
||||
pub const FLASH_VENDOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 125, 3);
|
||||
/// `[]` Package version
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block1, 128, 3);
|
||||
/// `[]` Optional unique 128-bit ID
|
||||
pub const OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(EfuseBlock::Block2, 0, 128);
|
||||
/// `[]` BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 130, 3);
|
||||
/// `[]` BLK_VERSION_MAJOR of BLOCK2
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 133, 2);
|
||||
/// `[]` Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 135, 1);
|
||||
/// `[]` Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block2, 136, 9);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_AVE_INITCODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 145, 10);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_AVE_INITCODE_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block2, 155, 10);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_AVE_INITCODE_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block2, 165, 10);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_AVE_INITCODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 175, 10);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_HI_DOUT_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 185, 10);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_HI_DOUT_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block2, 195, 10);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_HI_DOUT_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block2, 205, 10);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_HI_DOUT_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 215, 10);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_CH0_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(EfuseBlock::Block2, 225, 4);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_CH1_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(EfuseBlock::Block2, 229, 4);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_CH2_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(EfuseBlock::Block2, 233, 4);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_CH3_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(EfuseBlock::Block2, 237, 4);
|
||||
/// `[]` ADC1 calibration data
|
||||
pub const ADC1_CH4_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(EfuseBlock::Block2, 241, 4);
|
||||
/// `[BLOCK_USR_DATA]` User data
|
||||
pub const USER_DATA: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 256);
|
||||
/// `[MAC_CUSTOM CUSTOM_MAC]` Custom MAC
|
||||
pub const USER_DATA_MAC_CUSTOM: EfuseField = EfuseField::new(EfuseBlock::Block3, 200, 48);
|
||||
/// `[BLOCK_KEY0]` Key0 or user data
|
||||
pub const KEY0: EfuseField = EfuseField::new(EfuseBlock::Block4, 0, 256);
|
||||
/// `[BLOCK_KEY1]` Key1 or user data
|
||||
pub const KEY1: EfuseField = EfuseField::new(EfuseBlock::Block5, 0, 256);
|
||||
/// `[BLOCK_KEY2]` Key2 or user data
|
||||
pub const KEY2: EfuseField = EfuseField::new(EfuseBlock::Block6, 0, 256);
|
||||
/// `[BLOCK_KEY3]` Key3 or user data
|
||||
pub const KEY3: EfuseField = EfuseField::new(EfuseBlock::Block7, 0, 256);
|
||||
/// `[BLOCK_KEY4]` Key4 or user data
|
||||
pub const KEY4: EfuseField = EfuseField::new(EfuseBlock::Block8, 0, 256);
|
||||
/// `[BLOCK_KEY5]` Key5 or user data
|
||||
pub const KEY5: EfuseField = EfuseField::new(EfuseBlock::Block9, 0, 256);
|
||||
/// `[BLOCK_SYS_DATA2]` System data part 2 (reserved)
|
||||
pub const SYS_DATA_PART2: EfuseField = EfuseField::new(EfuseBlock::Block10, 0, 256);
|
||||
pub const SPI_DOWNLOAD_MSPI_DIS: EfuseField = EfuseField::new(0, 1, 45, 1);
|
||||
/// Represents whether TWAI function is disabled or enabled. 1: disabled. 0:
|
||||
/// enabled
|
||||
pub const DIS_TWAI: EfuseField = EfuseField::new(0, 1, 46, 1);
|
||||
/// Set this bit to enable selection between usb_to_jtag and pad_to_jtag through
|
||||
/// strapping gpio25 when both EFUSE_DIS_PAD_JTAG and EFUSE_DIS_USB_JTAG are
|
||||
/// equal to 0
|
||||
pub const JTAG_SEL_ENABLE: EfuseField = EfuseField::new(0, 1, 47, 1);
|
||||
/// Represents whether JTAG is disabled in soft way. Odd number: disabled. Even
|
||||
/// number: enabled
|
||||
pub const SOFT_DIS_JTAG: EfuseField = EfuseField::new(0, 1, 48, 3);
|
||||
/// Represents whether JTAG is disabled in the hard way(permanently). 1:
|
||||
/// disabled. 0: enabled
|
||||
pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(0, 1, 51, 1);
|
||||
/// Represents whether flash encrypt function is disabled or enabled(except in
|
||||
/// SPI boot mode). 1: disabled. 0: enabled
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(0, 1, 52, 1);
|
||||
/// Represents the single-end input threshold vrefh; 1.76 V to 2 V with step of
|
||||
/// 80 mV
|
||||
pub const USB_DREFH: EfuseField = EfuseField::new(0, 1, 53, 2);
|
||||
/// Represents the single-end input threshold vrefl; 1.76 V to 2 V with step of
|
||||
/// 80 mV
|
||||
pub const USB_DREFL: EfuseField = EfuseField::new(0, 1, 55, 2);
|
||||
/// Represents whether the D+ and D- pins is exchanged. 1: exchanged. 0: not
|
||||
/// exchanged
|
||||
pub const USB_EXCHG_PINS: EfuseField = EfuseField::new(0, 1, 57, 1);
|
||||
/// Represents whether vdd spi pin is functioned as gpio. 1: functioned. 0: not
|
||||
/// functioned
|
||||
pub const VDD_SPI_AS_GPIO: EfuseField = EfuseField::new(0, 1, 58, 1);
|
||||
/// Configures the curve of ECDSA calculation: 0: only enable P256. 1: only
|
||||
/// enable P192. 2: both enable P256 and P192. 3: only enable P256
|
||||
pub const ECDSA_CURVE_MODE: EfuseField = EfuseField::new(0, 1, 59, 2);
|
||||
/// Set this bit to permanently turn on ECC const-time mode
|
||||
pub const ECC_FORCE_CONST_TIME: EfuseField = EfuseField::new(0, 1, 61, 1);
|
||||
/// Set this bit to control the xts pseudo-round anti-dpa attack function: 0:
|
||||
/// controlled by register. 1-3: the higher the value is; the more pseudo-rounds
|
||||
/// are inserted to the xts-aes calculation
|
||||
pub const XTS_DPA_PSEUDO_LEVEL: EfuseField = EfuseField::new(0, 1, 62, 2);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED1_1: EfuseField = EfuseField::new(0, 2, 64, 16);
|
||||
/// Represents whether RTC watchdog timeout threshold is selected at startup. 1:
|
||||
/// selected. 0: not selected
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(0, 2, 80, 2);
|
||||
/// Enables flash encryption when 1 or 3 bits are set and disables otherwise
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(0, 2, 82, 3);
|
||||
/// Revoke 1st secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(0, 2, 85, 1);
|
||||
/// Revoke 2nd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(0, 2, 86, 1);
|
||||
/// Revoke 3rd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(0, 2, 87, 1);
|
||||
/// Represents the purpose of Key0
|
||||
pub const KEY_PURPOSE_0: EfuseField = EfuseField::new(0, 2, 88, 4);
|
||||
/// Represents the purpose of Key1
|
||||
pub const KEY_PURPOSE_1: EfuseField = EfuseField::new(0, 2, 92, 4);
|
||||
/// Represents the purpose of Key2
|
||||
pub const KEY_PURPOSE_2: EfuseField = EfuseField::new(0, 3, 96, 4);
|
||||
/// Represents the purpose of Key3
|
||||
pub const KEY_PURPOSE_3: EfuseField = EfuseField::new(0, 3, 100, 4);
|
||||
/// Represents the purpose of Key4
|
||||
pub const KEY_PURPOSE_4: EfuseField = EfuseField::new(0, 3, 104, 4);
|
||||
/// Represents the purpose of Key5
|
||||
pub const KEY_PURPOSE_5: EfuseField = EfuseField::new(0, 3, 108, 4);
|
||||
/// Represents the spa secure level by configuring the clock random divide mode
|
||||
pub const SEC_DPA_LEVEL: EfuseField = EfuseField::new(0, 3, 112, 2);
|
||||
/// Reserved
|
||||
pub const RESERVE_0_114: EfuseField = EfuseField::new(0, 3, 114, 1);
|
||||
/// Represents whether anti-dpa attack is enabled. 1:enabled. 0: disabled
|
||||
pub const CRYPT_DPA_ENABLE: EfuseField = EfuseField::new(0, 3, 115, 1);
|
||||
/// Represents whether secure boot is enabled or disabled. 1: enabled. 0:
|
||||
/// disabled
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(0, 3, 116, 1);
|
||||
/// Represents whether revoking aggressive secure boot is enabled or disabled.
|
||||
/// 1: enabled. 0: disabled
|
||||
pub const SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField = EfuseField::new(0, 3, 117, 1);
|
||||
/// Set these bits to enable power glitch function when chip power on
|
||||
pub const POWERGLITCH_EN1: EfuseField = EfuseField::new(0, 3, 118, 5);
|
||||
/// reserved
|
||||
pub const RESERVED_0_123: EfuseField = EfuseField::new(0, 3, 123, 1);
|
||||
/// Represents the flash waiting time after power-up; in unit of ms. When the
|
||||
/// value less than 15; the waiting time is the programmed value. Otherwise; the
|
||||
/// waiting time is 2 times the programmed value
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(0, 3, 124, 4);
|
||||
/// Represents whether Download mode is disabled or enabled. 1: disabled. 0:
|
||||
/// enabled
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 128, 1);
|
||||
/// Represents whether direct boot mode is disabled or enabled. 1: disabled. 0:
|
||||
/// enabled
|
||||
pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(0, 4, 129, 1);
|
||||
/// Set this bit to disable USB-Serial-JTAG print during rom boot
|
||||
pub const DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField = EfuseField::new(0, 4, 130, 1);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED3_5: EfuseField = EfuseField::new(0, 4, 131, 1);
|
||||
/// Represents whether the USB-Serial-JTAG download function is disabled or
|
||||
/// enabled. 1: disabled. 0: enabled
|
||||
pub const DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 132, 1);
|
||||
/// Represents whether security download is enabled or disabled. 1: enabled. 0:
|
||||
/// disabled
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(0, 4, 133, 1);
|
||||
/// Set the default UARTboot message output mode
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(0, 4, 134, 2);
|
||||
/// Represents whether ROM code is forced to send a resume command during SPI
|
||||
/// boot. 1: forced. 0:not forced
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(0, 4, 136, 1);
|
||||
/// Represents the version used by ESP-IDF anti-rollback feature
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(0, 4, 137, 16);
|
||||
/// Represents whether FAST VERIFY ON WAKE is disabled or enabled when Secure
|
||||
/// Boot is enabled. 1: disabled. 0: enabled
|
||||
pub const SECURE_BOOT_DISABLE_FAST_WAKE: EfuseField = EfuseField::new(0, 4, 153, 1);
|
||||
/// Set bits to enable hysteresis function of PAD0~5
|
||||
pub const HYS_EN_PAD0: EfuseField = EfuseField::new(0, 4, 154, 6);
|
||||
/// Set bits to enable hysteresis function of PAD6~27
|
||||
pub const HYS_EN_PAD1: EfuseField = EfuseField::new(0, 5, 160, 22);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED4_1: EfuseField = EfuseField::new(0, 5, 182, 2);
|
||||
/// Reserved
|
||||
pub const RPT4_RESERVED4_0: EfuseField = EfuseField::new(0, 5, 184, 8);
|
||||
/// MAC address
|
||||
pub const MAC0: EfuseField = EfuseField::new(1, 0, 0, 32);
|
||||
/// MAC address
|
||||
pub const MAC1: EfuseField = EfuseField::new(1, 1, 32, 16);
|
||||
/// Stores the extended bits of MAC address
|
||||
pub const MAC_EXT: EfuseField = EfuseField::new(1, 1, 48, 16);
|
||||
/// Stores RF Calibration data. RXIQ version
|
||||
pub const RXIQ_VERSION: EfuseField = EfuseField::new(1, 2, 64, 3);
|
||||
/// Stores RF Calibration data. RXIQ data 0
|
||||
pub const RXIQ_0: EfuseField = EfuseField::new(1, 2, 67, 7);
|
||||
/// Stores RF Calibration data. RXIQ data 1
|
||||
pub const RXIQ_1: EfuseField = EfuseField::new(1, 2, 74, 7);
|
||||
/// Stores the PMU active hp dbias
|
||||
pub const ACTIVE_HP_DBIAS: EfuseField = EfuseField::new(1, 2, 81, 5);
|
||||
/// Stores the PMU active lp dbias
|
||||
pub const ACTIVE_LP_DBIAS: EfuseField = EfuseField::new(1, 2, 86, 5);
|
||||
/// Stores the PMU sleep dbias
|
||||
pub const DSLP_DBIAS: EfuseField = EfuseField::new(1, 2, 91, 4);
|
||||
/// Stores the low 1 bit of dbias_vol_gap
|
||||
pub const DBIAS_VOL_GAP: EfuseField = EfuseField::new(1, 2, 95, 5);
|
||||
/// Reserved
|
||||
pub const MAC_RESERVED_2: EfuseField = EfuseField::new(1, 3, 100, 14);
|
||||
/// Stores the wafer version minor
|
||||
pub const WAFER_VERSION_MINOR: EfuseField = EfuseField::new(1, 3, 114, 3);
|
||||
/// Stores the wafer version major
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(1, 3, 117, 2);
|
||||
/// Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(1, 3, 119, 1);
|
||||
/// Stores the flash cap
|
||||
pub const FLASH_CAP: EfuseField = EfuseField::new(1, 3, 120, 3);
|
||||
/// Stores the flash temp
|
||||
pub const FLASH_TEMP: EfuseField = EfuseField::new(1, 3, 123, 2);
|
||||
/// Stores the flash vendor
|
||||
pub const FLASH_VENDOR: EfuseField = EfuseField::new(1, 3, 125, 3);
|
||||
/// Package version
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(1, 4, 128, 3);
|
||||
/// reserved
|
||||
pub const RESERVED_1_131: EfuseField = EfuseField::new(1, 4, 131, 29);
|
||||
/// Stores the second 32 bits of the zeroth part of system data
|
||||
pub const SYS_DATA_PART0_2: EfuseField = EfuseField::new(1, 5, 160, 32);
|
||||
/// Optional unique 128-bit ID
|
||||
pub const OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(2, 0, 0, 128);
|
||||
/// reserved
|
||||
pub const RESERVED_2_128: EfuseField = EfuseField::new(2, 4, 128, 2);
|
||||
/// BLK_VERSION_MINOR of BLOCK2. 1: RF Calibration data in BLOCK1
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(2, 4, 130, 3);
|
||||
/// BLK_VERSION_MAJOR of BLOCK2
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(2, 4, 133, 2);
|
||||
/// Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(2, 4, 135, 1);
|
||||
/// Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(2, 4, 136, 9);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_AVE_INITCODE_ATTEN0: EfuseField = EfuseField::new(2, 4, 145, 10);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_AVE_INITCODE_ATTEN1: EfuseField = EfuseField::new(2, 4, 155, 10);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_AVE_INITCODE_ATTEN2: EfuseField = EfuseField::new(2, 5, 165, 10);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_AVE_INITCODE_ATTEN3: EfuseField = EfuseField::new(2, 5, 175, 10);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_HI_DOUT_ATTEN0: EfuseField = EfuseField::new(2, 5, 185, 10);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_HI_DOUT_ATTEN1: EfuseField = EfuseField::new(2, 6, 195, 10);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_HI_DOUT_ATTEN2: EfuseField = EfuseField::new(2, 6, 205, 10);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_HI_DOUT_ATTEN3: EfuseField = EfuseField::new(2, 6, 215, 10);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_CH0_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(2, 7, 225, 4);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_CH1_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(2, 7, 229, 4);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_CH2_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(2, 7, 233, 4);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_CH3_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(2, 7, 237, 4);
|
||||
/// ADC1 calibration data
|
||||
pub const ADC1_CH4_ATTEN0_INITCODE_DIFF: EfuseField = EfuseField::new(2, 7, 241, 4);
|
||||
/// reserved
|
||||
pub const RESERVED_2_245: EfuseField = EfuseField::new(2, 7, 245, 11);
|
||||
/// User data
|
||||
pub const BLOCK_USR_DATA: EfuseField = EfuseField::new(3, 0, 0, 192);
|
||||
/// reserved
|
||||
pub const RESERVED_3_192: EfuseField = EfuseField::new(3, 6, 192, 8);
|
||||
/// Custom MAC
|
||||
pub const CUSTOM_MAC: EfuseField = EfuseField::new(3, 6, 200, 48);
|
||||
/// reserved
|
||||
pub const RESERVED_3_248: EfuseField = EfuseField::new(3, 7, 248, 8);
|
||||
/// Key0 or user data
|
||||
pub const BLOCK_KEY0: EfuseField = EfuseField::new(4, 0, 0, 256);
|
||||
/// Key1 or user data
|
||||
pub const BLOCK_KEY1: EfuseField = EfuseField::new(5, 0, 0, 256);
|
||||
/// Key2 or user data
|
||||
pub const BLOCK_KEY2: EfuseField = EfuseField::new(6, 0, 0, 256);
|
||||
/// Key3 or user data
|
||||
pub const BLOCK_KEY3: EfuseField = EfuseField::new(7, 0, 0, 256);
|
||||
/// Key4 or user data
|
||||
pub const BLOCK_KEY4: EfuseField = EfuseField::new(8, 0, 0, 256);
|
||||
/// Key5 or user data
|
||||
pub const BLOCK_KEY5: EfuseField = EfuseField::new(9, 0, 0, 256);
|
||||
/// System data part 2 (reserved)
|
||||
pub const BLOCK_SYS_DATA2: EfuseField = EfuseField::new(10, 0, 0, 256);
|
||||
|
||||
@ -42,7 +42,7 @@
|
||||
//! ```
|
||||
|
||||
pub use self::fields::*;
|
||||
use crate::{analog::adc::Attenuation, peripherals::EFUSE};
|
||||
use crate::{analog::adc::Attenuation, peripherals::EFUSE, soc::efuse_field::EfuseField};
|
||||
|
||||
mod fields;
|
||||
|
||||
@ -50,11 +50,6 @@ mod fields;
|
||||
pub struct Efuse;
|
||||
|
||||
impl Efuse {
|
||||
/// Reads chip's MAC address from the eFuse storage.
|
||||
pub fn read_base_mac_address() -> [u8; 6] {
|
||||
Self::read_field_be(MAC)
|
||||
}
|
||||
|
||||
/// Get status of SPI boot encryption.
|
||||
pub fn flash_encryption() -> bool {
|
||||
(Self::read_field_le::<u8>(SPI_BOOT_CRYPT_CNT).count_ones() % 2) != 0
|
||||
@ -166,7 +161,8 @@ impl Efuse {
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
#[derive(Debug, Clone, Copy, strum::FromRepr)]
|
||||
#[repr(u32)]
|
||||
pub(crate) enum EfuseBlock {
|
||||
Block0,
|
||||
Block1,
|
||||
|
||||
@ -1,416 +1,253 @@
|
||||
//! eFuse fields for the ESP32-S2.
|
||||
//!
|
||||
//! This file was automatically generated, please do not edit it manually!
|
||||
//!
|
||||
//! For information on how to regenerate these files, please refer to the
|
||||
//! `xtask` package's `README.md` file.
|
||||
//!
|
||||
//! Generated on: 2024-03-11
|
||||
//! ESP-IDF Commit: 0de2912f
|
||||
//! Generated: 2025-04-22 11:33
|
||||
//! Version: 888a61f6f500d9c7ee0aa32016b0bee7
|
||||
|
||||
use super::EfuseBlock;
|
||||
use crate::soc::efuse_field::EfuseField;
|
||||
#![allow(clippy::empty_docs)]
|
||||
|
||||
/// `[]` Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 32);
|
||||
/// `[]` wr_dis of RD_DIS
|
||||
pub const WR_DIS_RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 1);
|
||||
/// `[]` wr_dis of DIS_ICACHE
|
||||
pub const WR_DIS_DIS_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DCACHE
|
||||
pub const WR_DIS_DIS_DCACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_ICACHE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_DCACHE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_DCACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_FORCE_DOWNLOAD
|
||||
pub const WR_DIS_DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_USB
|
||||
pub const WR_DIS_DIS_USB: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[WR_DIS.DIS_CAN]` wr_dis of DIS_TWAI
|
||||
pub const WR_DIS_DIS_TWAI: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_BOOT_REMAP
|
||||
pub const WR_DIS_DIS_BOOT_REMAP: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of SOFT_DIS_JTAG
|
||||
pub const WR_DIS_SOFT_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of HARD_DIS_JTAG
|
||||
pub const WR_DIS_HARD_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of VDD_SPI_XPD
|
||||
pub const WR_DIS_VDD_SPI_XPD: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of VDD_SPI_TIEH
|
||||
pub const WR_DIS_VDD_SPI_TIEH: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of VDD_SPI_FORCE
|
||||
pub const WR_DIS_VDD_SPI_FORCE: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of WDT_DELAY_SEL
|
||||
pub const WR_DIS_WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of SPI_BOOT_CRYPT_CNT
|
||||
pub const WR_DIS_SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE0
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(EfuseBlock::Block0, 5, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE1
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE2
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(EfuseBlock::Block0, 7, 1);
|
||||
/// `[WR_DIS.KEY0_PURPOSE]` wr_dis of KEY_PURPOSE_0
|
||||
pub const WR_DIS_KEY_PURPOSE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 8, 1);
|
||||
/// `[WR_DIS.KEY1_PURPOSE]` wr_dis of KEY_PURPOSE_1
|
||||
pub const WR_DIS_KEY_PURPOSE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
|
||||
/// `[WR_DIS.KEY2_PURPOSE]` wr_dis of KEY_PURPOSE_2
|
||||
pub const WR_DIS_KEY_PURPOSE_2: EfuseField = EfuseField::new(EfuseBlock::Block0, 10, 1);
|
||||
/// `[WR_DIS.KEY3_PURPOSE]` wr_dis of KEY_PURPOSE_3
|
||||
pub const WR_DIS_KEY_PURPOSE_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 11, 1);
|
||||
/// `[WR_DIS.KEY4_PURPOSE]` wr_dis of KEY_PURPOSE_4
|
||||
pub const WR_DIS_KEY_PURPOSE_4: EfuseField = EfuseField::new(EfuseBlock::Block0, 12, 1);
|
||||
/// `[WR_DIS.KEY5_PURPOSE]` wr_dis of KEY_PURPOSE_5
|
||||
pub const WR_DIS_KEY_PURPOSE_5: EfuseField = EfuseField::new(EfuseBlock::Block0, 13, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_EN
|
||||
pub const WR_DIS_SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 15, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
|
||||
pub const WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 16, 1);
|
||||
/// `[]` wr_dis of FLASH_TPUW
|
||||
pub const WR_DIS_FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_LEGACY_SPI_BOOT
|
||||
pub const WR_DIS_DIS_LEGACY_SPI_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of UART_PRINT_CHANNEL
|
||||
pub const WR_DIS_UART_PRINT_CHANNEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_USB_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_USB_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of ENABLE_SECURITY_DOWNLOAD
|
||||
pub const WR_DIS_ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of UART_PRINT_CONTROL
|
||||
pub const WR_DIS_UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of PIN_POWER_SELECTION
|
||||
pub const WR_DIS_PIN_POWER_SELECTION: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of FLASH_TYPE
|
||||
pub const WR_DIS_FLASH_TYPE: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of FORCE_SEND_RESUME
|
||||
pub const WR_DIS_FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of SECURE_VERSION
|
||||
pub const WR_DIS_SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of BLOCK1
|
||||
pub const WR_DIS_BLK1: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[WR_DIS.MAC_FACTORY]` wr_dis of MAC
|
||||
pub const WR_DIS_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_CLK
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_Q
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_CS
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_CS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_HD
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_HD: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_WP
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_WP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_DQS
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_DQS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D4
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D4: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D5
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D5: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D6
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D6: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D7
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D7: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MAJOR
|
||||
pub const WR_DIS_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MINOR_HI
|
||||
pub const WR_DIS_WAFER_VERSION_MINOR_HI: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_VERSION
|
||||
pub const WR_DIS_FLASH_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MAJOR
|
||||
pub const WR_DIS_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of PSRAM_VERSION
|
||||
pub const WR_DIS_PSRAM_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of PKG_VERSION
|
||||
pub const WR_DIS_PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MINOR_LO
|
||||
pub const WR_DIS_WAFER_VERSION_MINOR_LO: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of BLOCK2
|
||||
pub const WR_DIS_SYS_DATA_PART1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of OPTIONAL_UNIQUE_ID
|
||||
pub const WR_DIS_OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC_CALIB
|
||||
pub const WR_DIS_ADC_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MINOR
|
||||
pub const WR_DIS_BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of TEMP_CALIB
|
||||
pub const WR_DIS_TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A10H
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A10H: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A11H
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A11H: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A12H
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A12H: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A13H
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A13H: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A20H
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A20H: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A21H
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A21H: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A22H
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A22H: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A23H
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A23H: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A10L
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A10L: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A11L
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A11L: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A12L
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A12L: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A13L
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A13L: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A20L
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A20L: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A21L
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A21L: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A22L
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A22L: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of RTCCALIB_V1IDX_A23L
|
||||
pub const WR_DIS_RTCCALIB_V1IDX_A23L: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[WR_DIS.USER_DATA]` wr_dis of BLOCK_USR_DATA
|
||||
pub const WR_DIS_BLOCK_USR_DATA: EfuseField = EfuseField::new(EfuseBlock::Block0, 22, 1);
|
||||
/// `[WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM]` wr_dis of CUSTOM_MAC
|
||||
pub const WR_DIS_CUSTOM_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 22, 1);
|
||||
/// `[WR_DIS.KEY0]` wr_dis of BLOCK_KEY0
|
||||
pub const WR_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 23, 1);
|
||||
/// `[WR_DIS.KEY1]` wr_dis of BLOCK_KEY1
|
||||
pub const WR_DIS_BLOCK_KEY1: EfuseField = EfuseField::new(EfuseBlock::Block0, 24, 1);
|
||||
/// `[WR_DIS.KEY2]` wr_dis of BLOCK_KEY2
|
||||
pub const WR_DIS_BLOCK_KEY2: EfuseField = EfuseField::new(EfuseBlock::Block0, 25, 1);
|
||||
/// `[WR_DIS.KEY3]` wr_dis of BLOCK_KEY3
|
||||
pub const WR_DIS_BLOCK_KEY3: EfuseField = EfuseField::new(EfuseBlock::Block0, 26, 1);
|
||||
/// `[WR_DIS.KEY4]` wr_dis of BLOCK_KEY4
|
||||
pub const WR_DIS_BLOCK_KEY4: EfuseField = EfuseField::new(EfuseBlock::Block0, 27, 1);
|
||||
/// `[WR_DIS.KEY5]` wr_dis of BLOCK_KEY5
|
||||
pub const WR_DIS_BLOCK_KEY5: EfuseField = EfuseField::new(EfuseBlock::Block0, 28, 1);
|
||||
/// `[WR_DIS.SYS_DATA_PART2]` wr_dis of BLOCK_SYS_DATA2
|
||||
pub const WR_DIS_BLOCK_SYS_DATA2: EfuseField = EfuseField::new(EfuseBlock::Block0, 29, 1);
|
||||
/// `[]` wr_dis of USB_EXCHG_PINS
|
||||
pub const WR_DIS_USB_EXCHG_PINS: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[WR_DIS.EXT_PHY_ENABLE]` wr_dis of USB_EXT_PHY_ENABLE
|
||||
pub const WR_DIS_USB_EXT_PHY_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[]` wr_dis of USB_FORCE_NOPERSIST
|
||||
pub const WR_DIS_USB_FORCE_NOPERSIST: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[]` wr_dis of BLOCK0_VERSION
|
||||
pub const WR_DIS_BLOCK0_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[]` Disable reading from BlOCK4-10
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 7);
|
||||
/// `[RD_DIS.KEY0]` rd_dis of BLOCK_KEY0
|
||||
pub const RD_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 1);
|
||||
/// `[RD_DIS.KEY1]` rd_dis of BLOCK_KEY1
|
||||
pub const RD_DIS_BLOCK_KEY1: EfuseField = EfuseField::new(EfuseBlock::Block0, 33, 1);
|
||||
/// `[RD_DIS.KEY2]` rd_dis of BLOCK_KEY2
|
||||
pub const RD_DIS_BLOCK_KEY2: EfuseField = EfuseField::new(EfuseBlock::Block0, 34, 1);
|
||||
/// `[RD_DIS.KEY3]` rd_dis of BLOCK_KEY3
|
||||
pub const RD_DIS_BLOCK_KEY3: EfuseField = EfuseField::new(EfuseBlock::Block0, 35, 1);
|
||||
/// `[RD_DIS.KEY4]` rd_dis of BLOCK_KEY4
|
||||
pub const RD_DIS_BLOCK_KEY4: EfuseField = EfuseField::new(EfuseBlock::Block0, 36, 1);
|
||||
/// `[RD_DIS.KEY5]` rd_dis of BLOCK_KEY5
|
||||
pub const RD_DIS_BLOCK_KEY5: EfuseField = EfuseField::new(EfuseBlock::Block0, 37, 1);
|
||||
/// `[RD_DIS.SYS_DATA_PART2]` rd_dis of BLOCK_SYS_DATA2
|
||||
pub const RD_DIS_BLOCK_SYS_DATA2: EfuseField = EfuseField::new(EfuseBlock::Block0, 38, 1);
|
||||
/// `[]` Set this bit to disable Icache
|
||||
pub const DIS_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 40, 1);
|
||||
/// `[]` Set this bit to disable Dcache
|
||||
pub const DIS_DCACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 41, 1);
|
||||
/// `[]` Disables Icache when SoC is in Download mode
|
||||
pub const DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 42, 1);
|
||||
/// `[]` Disables Dcache when SoC is in Download mode
|
||||
pub const DIS_DOWNLOAD_DCACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 43, 1);
|
||||
/// `[]` Set this bit to disable the function that forces chip into download
|
||||
/// mode
|
||||
pub const DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 44, 1);
|
||||
/// `[]` Set this bit to disable USB OTG function
|
||||
pub const DIS_USB: EfuseField = EfuseField::new(EfuseBlock::Block0, 45, 1);
|
||||
/// `[DIS_CAN]` Set this bit to disable the TWAI Controller function
|
||||
pub const DIS_TWAI: EfuseField = EfuseField::new(EfuseBlock::Block0, 46, 1);
|
||||
/// `[]` Disables capability to Remap RAM to ROM address space
|
||||
pub const DIS_BOOT_REMAP: EfuseField = EfuseField::new(EfuseBlock::Block0, 47, 1);
|
||||
/// `[]` Software disables JTAG. When software disabled; JTAG can be activated
|
||||
use super::EfuseField;
|
||||
|
||||
/// Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(0, 0, 0, 32);
|
||||
/// Disable reading from BlOCK4-10
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(0, 1, 32, 7);
|
||||
/// Reserved
|
||||
pub const DIS_RTC_RAM_BOOT: EfuseField = EfuseField::new(0, 1, 39, 1);
|
||||
/// Set this bit to disable Icache
|
||||
pub const DIS_ICACHE: EfuseField = EfuseField::new(0, 1, 40, 1);
|
||||
/// Set this bit to disable Dcache
|
||||
pub const DIS_DCACHE: EfuseField = EfuseField::new(0, 1, 41, 1);
|
||||
/// Disables Icache when SoC is in Download mode
|
||||
pub const DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(0, 1, 42, 1);
|
||||
/// Disables Dcache when SoC is in Download mode
|
||||
pub const DIS_DOWNLOAD_DCACHE: EfuseField = EfuseField::new(0, 1, 43, 1);
|
||||
/// Set this bit to disable the function that forces chip into download mode
|
||||
pub const DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(0, 1, 44, 1);
|
||||
/// Set this bit to disable USB OTG function
|
||||
pub const DIS_USB: EfuseField = EfuseField::new(0, 1, 45, 1);
|
||||
/// Set this bit to disable the TWAI Controller function
|
||||
pub const DIS_TWAI: EfuseField = EfuseField::new(0, 1, 46, 1);
|
||||
/// Disables capability to Remap RAM to ROM address space
|
||||
pub const DIS_BOOT_REMAP: EfuseField = EfuseField::new(0, 1, 47, 1);
|
||||
/// Reserved (used for four backups method)
|
||||
pub const RPT4_RESERVED5: EfuseField = EfuseField::new(0, 1, 48, 1);
|
||||
/// Software disables JTAG. When software disabled; JTAG can be activated
|
||||
/// temporarily by HMAC peripheral
|
||||
pub const SOFT_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 49, 1);
|
||||
/// `[]` Hardware disables JTAG permanently
|
||||
pub const HARD_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 50, 1);
|
||||
/// `[]` Disables flash encryption when in download boot modes
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(EfuseBlock::Block0, 51, 1);
|
||||
/// `[]` Set this bit to exchange USB D+ and D- pins
|
||||
pub const USB_EXCHG_PINS: EfuseField = EfuseField::new(EfuseBlock::Block0, 56, 1);
|
||||
/// `[EXT_PHY_ENABLE]` Set this bit to enable external USB PHY
|
||||
pub const USB_EXT_PHY_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 57, 1);
|
||||
/// `[]` If set; forces USB BVALID to 1
|
||||
pub const USB_FORCE_NOPERSIST: EfuseField = EfuseField::new(EfuseBlock::Block0, 58, 1);
|
||||
/// `[]` BLOCK0 efuse version
|
||||
pub const BLOCK0_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 59, 2);
|
||||
/// `[]` If VDD_SPI_FORCE is 1; this value determines if the VDD_SPI regulator
|
||||
/// is powered on
|
||||
pub const VDD_SPI_XPD: EfuseField = EfuseField::new(EfuseBlock::Block0, 68, 1);
|
||||
/// `[]` If VDD_SPI_FORCE is 1; determines VDD_SPI voltage {0: "VDD_SPI connects
|
||||
/// to 1.8 V LDO"; 1: "VDD_SPI connects to VDD3P3_RTC_IO"}
|
||||
pub const VDD_SPI_TIEH: EfuseField = EfuseField::new(EfuseBlock::Block0, 69, 1);
|
||||
/// `[]` Set this bit to use XPD_VDD_PSI_REG and VDD_SPI_TIEH to configure
|
||||
/// VDD_SPI LDO
|
||||
pub const VDD_SPI_FORCE: EfuseField = EfuseField::new(EfuseBlock::Block0, 70, 1);
|
||||
/// `[]` RTC watchdog timeout threshold; in unit of slow clock cycle {0:
|
||||
/// "40000"; 1: "80000"; 2: "160000"; 3: "320000"}
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 80, 2);
|
||||
/// `[]` Enables flash encryption when 1 or 3 bits are set and disabled
|
||||
/// otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 82, 3);
|
||||
/// `[]` Revoke 1st secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(EfuseBlock::Block0, 85, 1);
|
||||
/// `[]` Revoke 2nd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(EfuseBlock::Block0, 86, 1);
|
||||
/// `[]` Revoke 3rd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(EfuseBlock::Block0, 87, 1);
|
||||
/// `[KEY0_PURPOSE]` Purpose of KEY0
|
||||
pub const KEY_PURPOSE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 88, 4);
|
||||
/// `[KEY1_PURPOSE]` Purpose of KEY1
|
||||
pub const KEY_PURPOSE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 92, 4);
|
||||
/// `[KEY2_PURPOSE]` Purpose of KEY2
|
||||
pub const KEY_PURPOSE_2: EfuseField = EfuseField::new(EfuseBlock::Block0, 96, 4);
|
||||
/// `[KEY3_PURPOSE]` Purpose of KEY3
|
||||
pub const KEY_PURPOSE_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 100, 4);
|
||||
/// `[KEY4_PURPOSE]` Purpose of KEY4
|
||||
pub const KEY_PURPOSE_4: EfuseField = EfuseField::new(EfuseBlock::Block0, 104, 4);
|
||||
/// `[KEY5_PURPOSE]` Purpose of KEY5
|
||||
pub const KEY_PURPOSE_5: EfuseField = EfuseField::new(EfuseBlock::Block0, 108, 4);
|
||||
/// `[]` Set this bit to enable secure boot
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 116, 1);
|
||||
/// `[]` Set this bit to enable aggressive secure boot key revocation mode
|
||||
pub const SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField = EfuseField::new(EfuseBlock::Block0, 117, 1);
|
||||
/// `[]` Configures flash startup delay after SoC power-up; in unit of (ms/2).
|
||||
/// When the value is 15; delay is 7.5 ms
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 124, 4);
|
||||
/// `[]` Set this bit to disable all download boot modes
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 128, 1);
|
||||
/// `[]` Set this bit to disable Legacy SPI boot mode
|
||||
pub const DIS_LEGACY_SPI_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 129, 1);
|
||||
/// `[]` Selects the default UART for printing boot messages {0: "UART0"; 1:
|
||||
/// "UART1"}
|
||||
pub const UART_PRINT_CHANNEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 130, 1);
|
||||
/// `[]` Set this bit to disable use of USB OTG in UART download boot mode
|
||||
pub const DIS_USB_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 132, 1);
|
||||
/// `[]` Set this bit to enable secure UART download mode (read/write flash
|
||||
/// only)
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 133, 1);
|
||||
/// `[]` Set the default UART boot message output mode {0: "Enable"; 1: "Enable when GPIO46 is low at reset"; 2: "Enable when GPIO46 is high at reset"; 3: "Disable"}
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 134, 2);
|
||||
/// `[]` Set default power supply for GPIO33-GPIO37; set when SPI flash is
|
||||
/// initialized {0: "VDD3P3_CPU"; 1: "VDD_SPI"}
|
||||
pub const PIN_POWER_SELECTION: EfuseField = EfuseField::new(EfuseBlock::Block0, 136, 1);
|
||||
/// `[]` SPI flash type {0: "4 data lines"; 1: "8 data lines"}
|
||||
pub const FLASH_TYPE: EfuseField = EfuseField::new(EfuseBlock::Block0, 137, 1);
|
||||
/// `[]` If set; forces ROM code to send an SPI flash resume command during SPI
|
||||
/// boot
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 138, 1);
|
||||
/// `[]` Secure version (used by ESP-IDF anti-rollback feature)
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 139, 16);
|
||||
/// `[]` Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 160, 1);
|
||||
/// `[]` Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 161, 1);
|
||||
/// `[MAC_FACTORY]` MAC address
|
||||
pub const MAC: EfuseField = EfuseField::new(EfuseBlock::Block1, 0, 48);
|
||||
/// `[]` SPI_PAD_configure CLK
|
||||
pub const SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(EfuseBlock::Block1, 48, 6);
|
||||
/// `[]` SPI_PAD_configure Q(D1)
|
||||
pub const SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(EfuseBlock::Block1, 54, 6);
|
||||
/// `[]` SPI_PAD_configure D(D0)
|
||||
pub const SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(EfuseBlock::Block1, 60, 6);
|
||||
/// `[]` SPI_PAD_configure CS
|
||||
pub const SPI_PAD_CONFIG_CS: EfuseField = EfuseField::new(EfuseBlock::Block1, 66, 6);
|
||||
/// `[]` SPI_PAD_configure HD(D3)
|
||||
pub const SPI_PAD_CONFIG_HD: EfuseField = EfuseField::new(EfuseBlock::Block1, 72, 6);
|
||||
/// `[]` SPI_PAD_configure WP(D2)
|
||||
pub const SPI_PAD_CONFIG_WP: EfuseField = EfuseField::new(EfuseBlock::Block1, 78, 6);
|
||||
/// `[]` SPI_PAD_configure DQS
|
||||
pub const SPI_PAD_CONFIG_DQS: EfuseField = EfuseField::new(EfuseBlock::Block1, 84, 6);
|
||||
/// `[]` SPI_PAD_configure D4
|
||||
pub const SPI_PAD_CONFIG_D4: EfuseField = EfuseField::new(EfuseBlock::Block1, 90, 6);
|
||||
/// `[]` SPI_PAD_configure D5
|
||||
pub const SPI_PAD_CONFIG_D5: EfuseField = EfuseField::new(EfuseBlock::Block1, 96, 6);
|
||||
/// `[]` SPI_PAD_configure D6
|
||||
pub const SPI_PAD_CONFIG_D6: EfuseField = EfuseField::new(EfuseBlock::Block1, 102, 6);
|
||||
/// `[]` SPI_PAD_configure D7
|
||||
pub const SPI_PAD_CONFIG_D7: EfuseField = EfuseField::new(EfuseBlock::Block1, 108, 6);
|
||||
/// `[]` WAFER_VERSION_MAJOR
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 114, 2);
|
||||
/// `[]` WAFER_VERSION_MINOR most significant bit
|
||||
pub const WAFER_VERSION_MINOR_HI: EfuseField = EfuseField::new(EfuseBlock::Block1, 116, 1);
|
||||
/// `[]` Flash version
|
||||
pub const FLASH_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block1, 117, 4);
|
||||
/// `[]` BLK_VERSION_MAJOR
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 121, 2);
|
||||
/// `[]` PSRAM version
|
||||
pub const PSRAM_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block1, 124, 4);
|
||||
/// `[]` Package version
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block1, 128, 4);
|
||||
/// `[]` WAFER_VERSION_MINOR least significant bits
|
||||
pub const WAFER_VERSION_MINOR_LO: EfuseField = EfuseField::new(EfuseBlock::Block1, 132, 3);
|
||||
/// `[]` Optional unique 128-bit ID
|
||||
pub const OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(EfuseBlock::Block2, 0, 128);
|
||||
/// `[]` 4 bit of ADC calibration
|
||||
pub const ADC_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block2, 128, 4);
|
||||
/// `[]` BLK_VERSION_MINOR of BLOCK2 {0: "No calib"; 1: "ADC calib V1"; 2: "ADC
|
||||
/// calib V2"}
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 132, 3);
|
||||
/// `[]` Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block2, 135, 9);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A10H: EfuseField = EfuseField::new(EfuseBlock::Block2, 144, 8);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A11H: EfuseField = EfuseField::new(EfuseBlock::Block2, 152, 8);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A12H: EfuseField = EfuseField::new(EfuseBlock::Block2, 160, 8);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A13H: EfuseField = EfuseField::new(EfuseBlock::Block2, 168, 8);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A20H: EfuseField = EfuseField::new(EfuseBlock::Block2, 176, 8);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A21H: EfuseField = EfuseField::new(EfuseBlock::Block2, 184, 8);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A22H: EfuseField = EfuseField::new(EfuseBlock::Block2, 192, 8);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A23H: EfuseField = EfuseField::new(EfuseBlock::Block2, 200, 8);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A10L: EfuseField = EfuseField::new(EfuseBlock::Block2, 208, 6);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A11L: EfuseField = EfuseField::new(EfuseBlock::Block2, 214, 6);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A12L: EfuseField = EfuseField::new(EfuseBlock::Block2, 220, 6);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A13L: EfuseField = EfuseField::new(EfuseBlock::Block2, 226, 6);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A20L: EfuseField = EfuseField::new(EfuseBlock::Block2, 232, 6);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A21L: EfuseField = EfuseField::new(EfuseBlock::Block2, 238, 6);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A22L: EfuseField = EfuseField::new(EfuseBlock::Block2, 244, 6);
|
||||
/// `[]`
|
||||
pub const RTCCALIB_V1IDX_A23L: EfuseField = EfuseField::new(EfuseBlock::Block2, 250, 6);
|
||||
/// `[BLOCK_USR_DATA]` User data
|
||||
pub const USER_DATA: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 256);
|
||||
/// `[MAC_CUSTOM CUSTOM_MAC]` Custom MAC
|
||||
pub const USER_DATA_MAC_CUSTOM: EfuseField = EfuseField::new(EfuseBlock::Block3, 200, 48);
|
||||
/// `[BLOCK_KEY0]` Key0 or user data
|
||||
pub const KEY0: EfuseField = EfuseField::new(EfuseBlock::Block4, 0, 256);
|
||||
/// `[BLOCK_KEY1]` Key1 or user data
|
||||
pub const KEY1: EfuseField = EfuseField::new(EfuseBlock::Block5, 0, 256);
|
||||
/// `[BLOCK_KEY2]` Key2 or user data
|
||||
pub const KEY2: EfuseField = EfuseField::new(EfuseBlock::Block6, 0, 256);
|
||||
/// `[BLOCK_KEY3]` Key3 or user data
|
||||
pub const KEY3: EfuseField = EfuseField::new(EfuseBlock::Block7, 0, 256);
|
||||
/// `[BLOCK_KEY4]` Key4 or user data
|
||||
pub const KEY4: EfuseField = EfuseField::new(EfuseBlock::Block8, 0, 256);
|
||||
/// `[BLOCK_KEY5]` Key5 or user data
|
||||
pub const KEY5: EfuseField = EfuseField::new(EfuseBlock::Block9, 0, 256);
|
||||
/// `[BLOCK_SYS_DATA2]` System data part 2 (reserved)
|
||||
pub const SYS_DATA_PART2: EfuseField = EfuseField::new(EfuseBlock::Block10, 0, 256);
|
||||
pub const SOFT_DIS_JTAG: EfuseField = EfuseField::new(0, 1, 49, 1);
|
||||
/// Hardware disables JTAG permanently
|
||||
pub const HARD_DIS_JTAG: EfuseField = EfuseField::new(0, 1, 50, 1);
|
||||
/// Disables flash encryption when in download boot modes
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(0, 1, 51, 1);
|
||||
/// Controls single-end input threshold vrefh; 1.76 V to 2 V with step of 80 mV;
|
||||
/// stored in eFuse
|
||||
pub const USB_DREFH: EfuseField = EfuseField::new(0, 1, 52, 2);
|
||||
/// Controls single-end input threshold vrefl; 0.8 V to 1.04 V with step of 80
|
||||
/// mV; stored in eFuse
|
||||
pub const USB_DREFL: EfuseField = EfuseField::new(0, 1, 54, 2);
|
||||
/// Set this bit to exchange USB D+ and D- pins
|
||||
pub const USB_EXCHG_PINS: EfuseField = EfuseField::new(0, 1, 56, 1);
|
||||
/// Set this bit to enable external USB PHY
|
||||
pub const USB_EXT_PHY_ENABLE: EfuseField = EfuseField::new(0, 1, 57, 1);
|
||||
/// If set; forces USB BVALID to 1
|
||||
pub const USB_FORCE_NOPERSIST: EfuseField = EfuseField::new(0, 1, 58, 1);
|
||||
/// BLOCK0 efuse version
|
||||
pub const BLOCK0_VERSION: EfuseField = EfuseField::new(0, 1, 59, 2);
|
||||
/// SPI regulator switches current limit mode
|
||||
pub const VDD_SPI_MODECURLIM: EfuseField = EfuseField::new(0, 1, 61, 1);
|
||||
/// SPI regulator high voltage reference
|
||||
pub const VDD_SPI_DREFH: EfuseField = EfuseField::new(0, 1, 62, 2);
|
||||
/// SPI regulator medium voltage reference
|
||||
pub const VDD_SPI_DREFM: EfuseField = EfuseField::new(0, 2, 64, 2);
|
||||
/// SPI regulator low voltage reference
|
||||
pub const VDD_SPI_DREFL: EfuseField = EfuseField::new(0, 2, 66, 2);
|
||||
/// If VDD_SPI_FORCE is 1; this value determines if the VDD_SPI regulator is
|
||||
/// powered on
|
||||
pub const VDD_SPI_XPD: EfuseField = EfuseField::new(0, 2, 68, 1);
|
||||
/// If VDD_SPI_FORCE is 1; determines VDD_SPI voltage
|
||||
pub const VDD_SPI_TIEH: EfuseField = EfuseField::new(0, 2, 69, 1);
|
||||
/// Set this bit to use XPD_VDD_PSI_REG and VDD_SPI_TIEH to configure VDD_SPI
|
||||
/// LDO
|
||||
pub const VDD_SPI_FORCE: EfuseField = EfuseField::new(0, 2, 70, 1);
|
||||
/// Set SPI regulator to 0 to configure init\[1:0\]=0
|
||||
pub const VDD_SPI_EN_INIT: EfuseField = EfuseField::new(0, 2, 71, 1);
|
||||
/// Set SPI regulator to 1 to enable output current limit
|
||||
pub const VDD_SPI_ENCURLIM: EfuseField = EfuseField::new(0, 2, 72, 1);
|
||||
/// Tunes the current limit threshold of SPI regulator when tieh=0; about 800
|
||||
/// mA/(8+d)
|
||||
pub const VDD_SPI_DCURLIM: EfuseField = EfuseField::new(0, 2, 73, 3);
|
||||
/// Adds resistor from LDO output to ground
|
||||
pub const VDD_SPI_INIT: EfuseField = EfuseField::new(0, 2, 76, 2);
|
||||
/// Prevents SPI regulator from overshoot
|
||||
pub const VDD_SPI_DCAP: EfuseField = EfuseField::new(0, 2, 78, 2);
|
||||
/// RTC watchdog timeout threshold; in unit of slow clock cycle
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(0, 2, 80, 2);
|
||||
/// Enables flash encryption when 1 or 3 bits are set and disabled otherwise
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(0, 2, 82, 3);
|
||||
/// Revoke 1st secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(0, 2, 85, 1);
|
||||
/// Revoke 2nd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(0, 2, 86, 1);
|
||||
/// Revoke 3rd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(0, 2, 87, 1);
|
||||
/// Purpose of KEY0
|
||||
pub const KEY_PURPOSE_0: EfuseField = EfuseField::new(0, 2, 88, 4);
|
||||
/// Purpose of KEY1
|
||||
pub const KEY_PURPOSE_1: EfuseField = EfuseField::new(0, 2, 92, 4);
|
||||
/// Purpose of KEY2
|
||||
pub const KEY_PURPOSE_2: EfuseField = EfuseField::new(0, 3, 96, 4);
|
||||
/// Purpose of KEY3
|
||||
pub const KEY_PURPOSE_3: EfuseField = EfuseField::new(0, 3, 100, 4);
|
||||
/// Purpose of KEY4
|
||||
pub const KEY_PURPOSE_4: EfuseField = EfuseField::new(0, 3, 104, 4);
|
||||
/// Purpose of KEY5
|
||||
pub const KEY_PURPOSE_5: EfuseField = EfuseField::new(0, 3, 108, 4);
|
||||
/// Purpose of KEY6
|
||||
pub const KEY_PURPOSE_6: EfuseField = EfuseField::new(0, 3, 112, 4);
|
||||
/// Set this bit to enable secure boot
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(0, 3, 116, 1);
|
||||
/// Set this bit to enable aggressive secure boot key revocation mode
|
||||
pub const SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField = EfuseField::new(0, 3, 117, 1);
|
||||
/// Reserved (used for four backups method)
|
||||
pub const RPT4_RESERVED1: EfuseField = EfuseField::new(0, 3, 118, 6);
|
||||
/// Configures flash startup delay after SoC power-up; in unit of (ms/2). When
|
||||
/// the value is 15; delay is 7.5 ms
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(0, 3, 124, 4);
|
||||
/// Set this bit to disable all download boot modes
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 128, 1);
|
||||
/// Set this bit to disable Legacy SPI boot mode
|
||||
pub const DIS_LEGACY_SPI_BOOT: EfuseField = EfuseField::new(0, 4, 129, 1);
|
||||
/// Selects the default UART for printing boot messages
|
||||
pub const UART_PRINT_CHANNEL: EfuseField = EfuseField::new(0, 4, 130, 1);
|
||||
/// Reserved (used for four backups method)
|
||||
pub const RPT4_RESERVED3: EfuseField = EfuseField::new(0, 4, 131, 1);
|
||||
/// Set this bit to disable use of USB OTG in UART download boot mode
|
||||
pub const DIS_USB_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 132, 1);
|
||||
/// Set this bit to enable secure UART download mode (read/write flash only)
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(0, 4, 133, 1);
|
||||
/// Set the default UART boot message output mode
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(0, 4, 134, 2);
|
||||
/// Set default power supply for GPIO33-GPIO37; set when SPI flash is
|
||||
/// initialized
|
||||
pub const PIN_POWER_SELECTION: EfuseField = EfuseField::new(0, 4, 136, 1);
|
||||
/// SPI flash type
|
||||
pub const FLASH_TYPE: EfuseField = EfuseField::new(0, 4, 137, 1);
|
||||
/// If set; forces ROM code to send an SPI flash resume command during SPI boot
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(0, 4, 138, 1);
|
||||
/// Secure version (used by ESP-IDF anti-rollback feature)
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(0, 4, 139, 16);
|
||||
/// Reserved (used for four backups method)
|
||||
pub const RPT4_RESERVED2: EfuseField = EfuseField::new(0, 4, 155, 5);
|
||||
/// Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(0, 5, 160, 1);
|
||||
/// Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(0, 5, 161, 1);
|
||||
/// reserved
|
||||
pub const RESERVED_0_162: EfuseField = EfuseField::new(0, 5, 162, 30);
|
||||
/// MAC address
|
||||
pub const MAC0: EfuseField = EfuseField::new(1, 0, 0, 32);
|
||||
/// MAC address
|
||||
pub const MAC1: EfuseField = EfuseField::new(1, 1, 32, 16);
|
||||
/// SPI_PAD_configure CLK
|
||||
pub const SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(1, 1, 48, 6);
|
||||
/// SPI_PAD_configure Q(D1)
|
||||
pub const SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(1, 1, 54, 6);
|
||||
/// SPI_PAD_configure D(D0)
|
||||
pub const SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(1, 1, 60, 6);
|
||||
/// SPI_PAD_configure CS
|
||||
pub const SPI_PAD_CONFIG_CS: EfuseField = EfuseField::new(1, 2, 66, 6);
|
||||
/// SPI_PAD_configure HD(D3)
|
||||
pub const SPI_PAD_CONFIG_HD: EfuseField = EfuseField::new(1, 2, 72, 6);
|
||||
/// SPI_PAD_configure WP(D2)
|
||||
pub const SPI_PAD_CONFIG_WP: EfuseField = EfuseField::new(1, 2, 78, 6);
|
||||
/// SPI_PAD_configure DQS
|
||||
pub const SPI_PAD_CONFIG_DQS: EfuseField = EfuseField::new(1, 2, 84, 6);
|
||||
/// SPI_PAD_configure D4
|
||||
pub const SPI_PAD_CONFIG_D4: EfuseField = EfuseField::new(1, 2, 90, 6);
|
||||
/// SPI_PAD_configure D5
|
||||
pub const SPI_PAD_CONFIG_D5: EfuseField = EfuseField::new(1, 3, 96, 6);
|
||||
/// SPI_PAD_configure D6
|
||||
pub const SPI_PAD_CONFIG_D6: EfuseField = EfuseField::new(1, 3, 102, 6);
|
||||
/// SPI_PAD_configure D7
|
||||
pub const SPI_PAD_CONFIG_D7: EfuseField = EfuseField::new(1, 3, 108, 6);
|
||||
/// WAFER_VERSION_MAJOR
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(1, 3, 114, 2);
|
||||
/// WAFER_VERSION_MINOR most significant bit
|
||||
pub const WAFER_VERSION_MINOR_HI: EfuseField = EfuseField::new(1, 3, 116, 1);
|
||||
/// Flash version
|
||||
pub const FLASH_VERSION: EfuseField = EfuseField::new(1, 3, 117, 4);
|
||||
/// BLK_VERSION_MAJOR
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(1, 3, 121, 2);
|
||||
/// reserved
|
||||
pub const RESERVED_1_123: EfuseField = EfuseField::new(1, 3, 123, 1);
|
||||
/// PSRAM version
|
||||
pub const PSRAM_VERSION: EfuseField = EfuseField::new(1, 3, 124, 4);
|
||||
/// Package version
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(1, 4, 128, 4);
|
||||
/// WAFER_VERSION_MINOR least significant bits
|
||||
pub const WAFER_VERSION_MINOR_LO: EfuseField = EfuseField::new(1, 4, 132, 3);
|
||||
/// reserved
|
||||
pub const RESERVED_1_135: EfuseField = EfuseField::new(1, 4, 135, 25);
|
||||
/// Stores the second part of the zeroth part of system data
|
||||
pub const SYS_DATA_PART0_2: EfuseField = EfuseField::new(1, 5, 160, 32);
|
||||
/// Optional unique 128-bit ID
|
||||
pub const OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(2, 0, 0, 128);
|
||||
/// 4 bit of ADC calibration
|
||||
pub const ADC_CALIB: EfuseField = EfuseField::new(2, 4, 128, 4);
|
||||
/// BLK_VERSION_MINOR of BLOCK2
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(2, 4, 132, 3);
|
||||
/// Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(2, 4, 135, 9);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A10H: EfuseField = EfuseField::new(2, 4, 144, 8);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A11H: EfuseField = EfuseField::new(2, 4, 152, 8);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A12H: EfuseField = EfuseField::new(2, 5, 160, 8);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A13H: EfuseField = EfuseField::new(2, 5, 168, 8);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A20H: EfuseField = EfuseField::new(2, 5, 176, 8);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A21H: EfuseField = EfuseField::new(2, 5, 184, 8);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A22H: EfuseField = EfuseField::new(2, 6, 192, 8);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A23H: EfuseField = EfuseField::new(2, 6, 200, 8);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A10L: EfuseField = EfuseField::new(2, 6, 208, 6);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A11L: EfuseField = EfuseField::new(2, 6, 214, 6);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A12L: EfuseField = EfuseField::new(2, 6, 220, 6);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A13L: EfuseField = EfuseField::new(2, 7, 226, 6);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A20L: EfuseField = EfuseField::new(2, 7, 232, 6);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A21L: EfuseField = EfuseField::new(2, 7, 238, 6);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A22L: EfuseField = EfuseField::new(2, 7, 244, 6);
|
||||
///
|
||||
pub const RTCCALIB_V1IDX_A23L: EfuseField = EfuseField::new(2, 7, 250, 6);
|
||||
/// User data
|
||||
pub const BLOCK_USR_DATA: EfuseField = EfuseField::new(3, 0, 0, 192);
|
||||
/// reserved
|
||||
pub const RESERVED_3_192: EfuseField = EfuseField::new(3, 6, 192, 8);
|
||||
/// Custom MAC
|
||||
pub const CUSTOM_MAC: EfuseField = EfuseField::new(3, 6, 200, 48);
|
||||
/// reserved
|
||||
pub const RESERVED_3_248: EfuseField = EfuseField::new(3, 7, 248, 8);
|
||||
/// Key0 or user data
|
||||
pub const BLOCK_KEY0: EfuseField = EfuseField::new(4, 0, 0, 256);
|
||||
/// Key1 or user data
|
||||
pub const BLOCK_KEY1: EfuseField = EfuseField::new(5, 0, 0, 256);
|
||||
/// Key2 or user data
|
||||
pub const BLOCK_KEY2: EfuseField = EfuseField::new(6, 0, 0, 256);
|
||||
/// Key3 or user data
|
||||
pub const BLOCK_KEY3: EfuseField = EfuseField::new(7, 0, 0, 256);
|
||||
/// Key4 or user data
|
||||
pub const BLOCK_KEY4: EfuseField = EfuseField::new(8, 0, 0, 256);
|
||||
/// Key5 or user data
|
||||
pub const BLOCK_KEY5: EfuseField = EfuseField::new(9, 0, 0, 256);
|
||||
/// System data part 2 (reserved)
|
||||
pub const BLOCK_SYS_DATA2: EfuseField = EfuseField::new(10, 0, 0, 256);
|
||||
|
||||
@ -44,7 +44,7 @@
|
||||
//! ```
|
||||
|
||||
pub use self::fields::*;
|
||||
use crate::peripherals::EFUSE;
|
||||
use crate::{peripherals::EFUSE, soc::efuse_field::EfuseField};
|
||||
|
||||
mod fields;
|
||||
|
||||
@ -52,11 +52,6 @@ mod fields;
|
||||
pub struct Efuse;
|
||||
|
||||
impl Efuse {
|
||||
/// Reads chip's MAC address from the eFuse storage.
|
||||
pub fn read_base_mac_address() -> [u8; 6] {
|
||||
Self::read_field_be(MAC)
|
||||
}
|
||||
|
||||
/// Get status of SPI boot encryption.
|
||||
pub fn flash_encryption() -> bool {
|
||||
(Self::read_field_le::<u8>(SPI_BOOT_CRYPT_CNT).count_ones() % 2) != 0
|
||||
@ -68,7 +63,8 @@ impl Efuse {
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
#[derive(Debug, Clone, Copy, strum::FromRepr)]
|
||||
#[repr(u32)]
|
||||
pub(crate) enum EfuseBlock {
|
||||
Block0,
|
||||
Block1,
|
||||
|
||||
@ -1,491 +1,293 @@
|
||||
//! eFuse fields for the ESP32-S3.
|
||||
//!
|
||||
//! This file was automatically generated, please do not edit it manually!
|
||||
//!
|
||||
//! For information on how to regenerate these files, please refer to the
|
||||
//! `xtask` package's `README.md` file.
|
||||
//!
|
||||
//! Generated on: 2024-03-11
|
||||
//! ESP-IDF Commit: 0de2912f
|
||||
//! Generated: 2025-04-22 11:33
|
||||
//! Version: 7127dd097e72bb90d0b790d460993126
|
||||
|
||||
use super::EfuseBlock;
|
||||
use crate::soc::efuse_field::EfuseField;
|
||||
#![allow(clippy::empty_docs)]
|
||||
|
||||
/// `[]` Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 32);
|
||||
/// `[]` wr_dis of RD_DIS
|
||||
pub const WR_DIS_RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 0, 1);
|
||||
/// `[]` wr_dis of DIS_ICACHE
|
||||
pub const WR_DIS_DIS_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DCACHE
|
||||
pub const WR_DIS_DIS_DCACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_ICACHE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_DCACHE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_DCACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_FORCE_DOWNLOAD
|
||||
pub const WR_DIS_DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[WR_DIS.DIS_USB]` wr_dis of DIS_USB_OTG
|
||||
pub const WR_DIS_DIS_USB_OTG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[WR_DIS.DIS_CAN]` wr_dis of DIS_TWAI
|
||||
pub const WR_DIS_DIS_TWAI: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_APP_CPU
|
||||
pub const WR_DIS_DIS_APP_CPU: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[WR_DIS.HARD_DIS_JTAG]` wr_dis of DIS_PAD_JTAG
|
||||
pub const WR_DIS_DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MANUAL_ENCRYPT
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of DIS_USB_JTAG
|
||||
pub const WR_DIS_DIS_USB_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[WR_DIS.DIS_USB_DEVICE]` wr_dis of DIS_USB_SERIAL_JTAG
|
||||
pub const WR_DIS_DIS_USB_SERIAL_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of STRAP_JTAG_SEL
|
||||
pub const WR_DIS_STRAP_JTAG_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of USB_PHY_SEL
|
||||
pub const WR_DIS_USB_PHY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 2, 1);
|
||||
/// `[]` wr_dis of VDD_SPI_XPD
|
||||
pub const WR_DIS_VDD_SPI_XPD: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of VDD_SPI_TIEH
|
||||
pub const WR_DIS_VDD_SPI_TIEH: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of VDD_SPI_FORCE
|
||||
pub const WR_DIS_VDD_SPI_FORCE: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of WDT_DELAY_SEL
|
||||
pub const WR_DIS_WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 3, 1);
|
||||
/// `[]` wr_dis of SPI_BOOT_CRYPT_CNT
|
||||
pub const WR_DIS_SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 4, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE0
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(EfuseBlock::Block0, 5, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE1
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(EfuseBlock::Block0, 6, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_KEY_REVOKE2
|
||||
pub const WR_DIS_SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(EfuseBlock::Block0, 7, 1);
|
||||
/// `[WR_DIS.KEY0_PURPOSE]` wr_dis of KEY_PURPOSE_0
|
||||
pub const WR_DIS_KEY_PURPOSE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 8, 1);
|
||||
/// `[WR_DIS.KEY1_PURPOSE]` wr_dis of KEY_PURPOSE_1
|
||||
pub const WR_DIS_KEY_PURPOSE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 9, 1);
|
||||
/// `[WR_DIS.KEY2_PURPOSE]` wr_dis of KEY_PURPOSE_2
|
||||
pub const WR_DIS_KEY_PURPOSE_2: EfuseField = EfuseField::new(EfuseBlock::Block0, 10, 1);
|
||||
/// `[WR_DIS.KEY3_PURPOSE]` wr_dis of KEY_PURPOSE_3
|
||||
pub const WR_DIS_KEY_PURPOSE_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 11, 1);
|
||||
/// `[WR_DIS.KEY4_PURPOSE]` wr_dis of KEY_PURPOSE_4
|
||||
pub const WR_DIS_KEY_PURPOSE_4: EfuseField = EfuseField::new(EfuseBlock::Block0, 12, 1);
|
||||
/// `[WR_DIS.KEY5_PURPOSE]` wr_dis of KEY_PURPOSE_5
|
||||
pub const WR_DIS_KEY_PURPOSE_5: EfuseField = EfuseField::new(EfuseBlock::Block0, 13, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_EN
|
||||
pub const WR_DIS_SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 15, 1);
|
||||
/// `[]` wr_dis of SECURE_BOOT_AGGRESSIVE_REVOKE
|
||||
pub const WR_DIS_SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 16, 1);
|
||||
/// `[]` wr_dis of FLASH_TPUW
|
||||
pub const WR_DIS_FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[WR_DIS.DIS_LEGACY_SPI_BOOT]` wr_dis of DIS_DIRECT_BOOT
|
||||
pub const WR_DIS_DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[WR_DIS.UART_PRINT_CHANNEL]` wr_dis of DIS_USB_SERIAL_JTAG_ROM_PRINT
|
||||
pub const WR_DIS_DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of FLASH_ECC_MODE
|
||||
pub const WR_DIS_FLASH_ECC_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[WR_DIS.DIS_USB_DOWNLOAD_MODE]` wr_dis of DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of ENABLE_SECURITY_DOWNLOAD
|
||||
pub const WR_DIS_ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of UART_PRINT_CONTROL
|
||||
pub const WR_DIS_UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of PIN_POWER_SELECTION
|
||||
pub const WR_DIS_PIN_POWER_SELECTION: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of FLASH_TYPE
|
||||
pub const WR_DIS_FLASH_TYPE: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of FLASH_PAGE_SIZE
|
||||
pub const WR_DIS_FLASH_PAGE_SIZE: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of FLASH_ECC_EN
|
||||
pub const WR_DIS_FLASH_ECC_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of FORCE_SEND_RESUME
|
||||
pub const WR_DIS_FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of SECURE_VERSION
|
||||
pub const WR_DIS_SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 18, 1);
|
||||
/// `[]` wr_dis of DIS_USB_OTG_DOWNLOAD_MODE
|
||||
pub const WR_DIS_DIS_USB_OTG_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` wr_dis of DISABLE_WAFER_VERSION_MAJOR
|
||||
pub const WR_DIS_DISABLE_WAFER_VERSION_MAJOR: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` wr_dis of DISABLE_BLK_VERSION_MAJOR
|
||||
pub const WR_DIS_DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 19, 1);
|
||||
/// `[]` wr_dis of BLOCK1
|
||||
pub const WR_DIS_BLK1: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[WR_DIS.MAC_FACTORY]` wr_dis of MAC
|
||||
pub const WR_DIS_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_CLK
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_Q
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_CS
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_CS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_HD
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_HD: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_WP
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_WP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_DQS
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_DQS: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D4
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D4: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D5
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D5: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D6
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D6: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of SPI_PAD_CONFIG_D7
|
||||
pub const WR_DIS_SPI_PAD_CONFIG_D7: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MINOR_LO
|
||||
pub const WR_DIS_WAFER_VERSION_MINOR_LO: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of PKG_VERSION
|
||||
pub const WR_DIS_PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MINOR
|
||||
pub const WR_DIS_BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_CAP
|
||||
pub const WR_DIS_FLASH_CAP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_TEMP
|
||||
pub const WR_DIS_FLASH_TEMP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of FLASH_VENDOR
|
||||
pub const WR_DIS_FLASH_VENDOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of PSRAM_CAP
|
||||
pub const WR_DIS_PSRAM_CAP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of PSRAM_TEMP
|
||||
pub const WR_DIS_PSRAM_TEMP: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of PSRAM_VENDOR
|
||||
pub const WR_DIS_PSRAM_VENDOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of K_RTC_LDO
|
||||
pub const WR_DIS_K_RTC_LDO: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of K_DIG_LDO
|
||||
pub const WR_DIS_K_DIG_LDO: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of V_RTC_DBIAS20
|
||||
pub const WR_DIS_V_RTC_DBIAS20: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of V_DIG_DBIAS20
|
||||
pub const WR_DIS_V_DIG_DBIAS20: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of DIG_DBIAS_HVT
|
||||
pub const WR_DIS_DIG_DBIAS_HVT: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MINOR_HI
|
||||
pub const WR_DIS_WAFER_VERSION_MINOR_HI: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of WAFER_VERSION_MAJOR
|
||||
pub const WR_DIS_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of ADC2_CAL_VOL_ATTEN3
|
||||
pub const WR_DIS_ADC2_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 20, 1);
|
||||
/// `[]` wr_dis of BLOCK2
|
||||
pub const WR_DIS_SYS_DATA_PART1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of OPTIONAL_UNIQUE_ID
|
||||
pub const WR_DIS_OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of BLK_VERSION_MAJOR
|
||||
pub const WR_DIS_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of TEMP_CALIB
|
||||
pub const WR_DIS_TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of OCODE
|
||||
pub const WR_DIS_OCODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN0
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN1
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN2
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_INIT_CODE_ATTEN3
|
||||
pub const WR_DIS_ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC2_INIT_CODE_ATTEN0
|
||||
pub const WR_DIS_ADC2_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC2_INIT_CODE_ATTEN1
|
||||
pub const WR_DIS_ADC2_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC2_INIT_CODE_ATTEN2
|
||||
pub const WR_DIS_ADC2_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC2_INIT_CODE_ATTEN3
|
||||
pub const WR_DIS_ADC2_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN0
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN1
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN2
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC1_CAL_VOL_ATTEN3
|
||||
pub const WR_DIS_ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC2_CAL_VOL_ATTEN0
|
||||
pub const WR_DIS_ADC2_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC2_CAL_VOL_ATTEN1
|
||||
pub const WR_DIS_ADC2_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[]` wr_dis of ADC2_CAL_VOL_ATTEN2
|
||||
pub const WR_DIS_ADC2_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block0, 21, 1);
|
||||
/// `[WR_DIS.USER_DATA]` wr_dis of BLOCK_USR_DATA
|
||||
pub const WR_DIS_BLOCK_USR_DATA: EfuseField = EfuseField::new(EfuseBlock::Block0, 22, 1);
|
||||
/// `[WR_DIS.MAC_CUSTOM WR_DIS.USER_DATA_MAC_CUSTOM]` wr_dis of CUSTOM_MAC
|
||||
pub const WR_DIS_CUSTOM_MAC: EfuseField = EfuseField::new(EfuseBlock::Block0, 22, 1);
|
||||
/// `[WR_DIS.KEY0]` wr_dis of BLOCK_KEY0
|
||||
pub const WR_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 23, 1);
|
||||
/// `[WR_DIS.KEY1]` wr_dis of BLOCK_KEY1
|
||||
pub const WR_DIS_BLOCK_KEY1: EfuseField = EfuseField::new(EfuseBlock::Block0, 24, 1);
|
||||
/// `[WR_DIS.KEY2]` wr_dis of BLOCK_KEY2
|
||||
pub const WR_DIS_BLOCK_KEY2: EfuseField = EfuseField::new(EfuseBlock::Block0, 25, 1);
|
||||
/// `[WR_DIS.KEY3]` wr_dis of BLOCK_KEY3
|
||||
pub const WR_DIS_BLOCK_KEY3: EfuseField = EfuseField::new(EfuseBlock::Block0, 26, 1);
|
||||
/// `[WR_DIS.KEY4]` wr_dis of BLOCK_KEY4
|
||||
pub const WR_DIS_BLOCK_KEY4: EfuseField = EfuseField::new(EfuseBlock::Block0, 27, 1);
|
||||
/// `[WR_DIS.KEY5]` wr_dis of BLOCK_KEY5
|
||||
pub const WR_DIS_BLOCK_KEY5: EfuseField = EfuseField::new(EfuseBlock::Block0, 28, 1);
|
||||
/// `[WR_DIS.SYS_DATA_PART2]` wr_dis of BLOCK_SYS_DATA2
|
||||
pub const WR_DIS_BLOCK_SYS_DATA2: EfuseField = EfuseField::new(EfuseBlock::Block0, 29, 1);
|
||||
/// `[]` wr_dis of USB_EXCHG_PINS
|
||||
pub const WR_DIS_USB_EXCHG_PINS: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[WR_DIS.EXT_PHY_ENABLE]` wr_dis of USB_EXT_PHY_ENABLE
|
||||
pub const WR_DIS_USB_EXT_PHY_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 30, 1);
|
||||
/// `[]` wr_dis of SOFT_DIS_JTAG
|
||||
pub const WR_DIS_SOFT_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 31, 1);
|
||||
/// `[]` Disable reading from BlOCK4-10
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 7);
|
||||
/// `[RD_DIS.KEY0]` rd_dis of BLOCK_KEY0
|
||||
pub const RD_DIS_BLOCK_KEY0: EfuseField = EfuseField::new(EfuseBlock::Block0, 32, 1);
|
||||
/// `[RD_DIS.KEY1]` rd_dis of BLOCK_KEY1
|
||||
pub const RD_DIS_BLOCK_KEY1: EfuseField = EfuseField::new(EfuseBlock::Block0, 33, 1);
|
||||
/// `[RD_DIS.KEY2]` rd_dis of BLOCK_KEY2
|
||||
pub const RD_DIS_BLOCK_KEY2: EfuseField = EfuseField::new(EfuseBlock::Block0, 34, 1);
|
||||
/// `[RD_DIS.KEY3]` rd_dis of BLOCK_KEY3
|
||||
pub const RD_DIS_BLOCK_KEY3: EfuseField = EfuseField::new(EfuseBlock::Block0, 35, 1);
|
||||
/// `[RD_DIS.KEY4]` rd_dis of BLOCK_KEY4
|
||||
pub const RD_DIS_BLOCK_KEY4: EfuseField = EfuseField::new(EfuseBlock::Block0, 36, 1);
|
||||
/// `[RD_DIS.KEY5]` rd_dis of BLOCK_KEY5
|
||||
pub const RD_DIS_BLOCK_KEY5: EfuseField = EfuseField::new(EfuseBlock::Block0, 37, 1);
|
||||
/// `[RD_DIS.SYS_DATA_PART2]` rd_dis of BLOCK_SYS_DATA2
|
||||
pub const RD_DIS_BLOCK_SYS_DATA2: EfuseField = EfuseField::new(EfuseBlock::Block0, 38, 1);
|
||||
/// `[]` Set this bit to disable Icache
|
||||
pub const DIS_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 40, 1);
|
||||
/// `[]` Set this bit to disable Dcache
|
||||
pub const DIS_DCACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 41, 1);
|
||||
/// `[]` Set this bit to disable Icache in download mode (boot_mode`[3:0]` is 0;
|
||||
/// 1; 2; 3; 6; 7)
|
||||
pub const DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 42, 1);
|
||||
/// `[]` Set this bit to disable Dcache in download mode ( boot_mode`[3:0]` is
|
||||
/// 0; 1; 2; 3; 6; 7)
|
||||
pub const DIS_DOWNLOAD_DCACHE: EfuseField = EfuseField::new(EfuseBlock::Block0, 43, 1);
|
||||
/// `[]` Set this bit to disable the function that forces chip into download
|
||||
/// mode
|
||||
pub const DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 44, 1);
|
||||
/// `[DIS_USB]` Set this bit to disable USB function
|
||||
pub const DIS_USB_OTG: EfuseField = EfuseField::new(EfuseBlock::Block0, 45, 1);
|
||||
/// `[DIS_CAN]` Set this bit to disable TWAI function
|
||||
pub const DIS_TWAI: EfuseField = EfuseField::new(EfuseBlock::Block0, 46, 1);
|
||||
/// `[]` Disable app cpu
|
||||
pub const DIS_APP_CPU: EfuseField = EfuseField::new(EfuseBlock::Block0, 47, 1);
|
||||
/// `[]` Set these bits to disable JTAG in the soft way (odd number 1 means
|
||||
/// disable ). JTAG can be enabled in HMAC module
|
||||
pub const SOFT_DIS_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 48, 3);
|
||||
/// `[HARD_DIS_JTAG]` Set this bit to disable JTAG in the hard way. JTAG is
|
||||
/// disabled permanently
|
||||
pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 51, 1);
|
||||
/// `[]` Set this bit to disable flash encryption when in download boot modes
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(EfuseBlock::Block0, 52, 1);
|
||||
/// `[]` Set this bit to exchange USB D+ and D- pins
|
||||
pub const USB_EXCHG_PINS: EfuseField = EfuseField::new(EfuseBlock::Block0, 57, 1);
|
||||
/// `[EXT_PHY_ENABLE]` Set this bit to enable external PHY
|
||||
pub const USB_EXT_PHY_ENABLE: EfuseField = EfuseField::new(EfuseBlock::Block0, 58, 1);
|
||||
/// `[]` SPI regulator power up signal
|
||||
pub const VDD_SPI_XPD: EfuseField = EfuseField::new(EfuseBlock::Block0, 68, 1);
|
||||
/// `[]` If VDD_SPI_FORCE is 1; determines VDD_SPI voltage {0: "VDD_SPI connects
|
||||
/// to 1.8 V LDO"; 1: "VDD_SPI connects to VDD3P3_RTC_IO"}
|
||||
pub const VDD_SPI_TIEH: EfuseField = EfuseField::new(EfuseBlock::Block0, 69, 1);
|
||||
/// `[]` Set this bit and force to use the configuration of eFuse to configure
|
||||
use super::EfuseField;
|
||||
|
||||
/// Disable programming of individual eFuses
|
||||
pub const WR_DIS: EfuseField = EfuseField::new(0, 0, 0, 32);
|
||||
/// Disable reading from BlOCK4-10
|
||||
pub const RD_DIS: EfuseField = EfuseField::new(0, 1, 32, 7);
|
||||
/// Set this bit to disable boot from RTC RAM
|
||||
pub const DIS_RTC_RAM_BOOT: EfuseField = EfuseField::new(0, 1, 39, 1);
|
||||
/// Set this bit to disable Icache
|
||||
pub const DIS_ICACHE: EfuseField = EfuseField::new(0, 1, 40, 1);
|
||||
/// Set this bit to disable Dcache
|
||||
pub const DIS_DCACHE: EfuseField = EfuseField::new(0, 1, 41, 1);
|
||||
/// Set this bit to disable Icache in download mode (boot_mode\[3:0\] is 0; 1;
|
||||
/// 2; 3; 6; 7)
|
||||
pub const DIS_DOWNLOAD_ICACHE: EfuseField = EfuseField::new(0, 1, 42, 1);
|
||||
/// Set this bit to disable Dcache in download mode ( boot_mode\[3:0\] is 0; 1;
|
||||
/// 2; 3; 6; 7)
|
||||
pub const DIS_DOWNLOAD_DCACHE: EfuseField = EfuseField::new(0, 1, 43, 1);
|
||||
/// Set this bit to disable the function that forces chip into download mode
|
||||
pub const DIS_FORCE_DOWNLOAD: EfuseField = EfuseField::new(0, 1, 44, 1);
|
||||
/// Set this bit to disable USB function
|
||||
pub const DIS_USB_OTG: EfuseField = EfuseField::new(0, 1, 45, 1);
|
||||
/// Set this bit to disable CAN function
|
||||
pub const DIS_TWAI: EfuseField = EfuseField::new(0, 1, 46, 1);
|
||||
/// Disable app cpu
|
||||
pub const DIS_APP_CPU: EfuseField = EfuseField::new(0, 1, 47, 1);
|
||||
/// Set these bits to disable JTAG in the soft way (odd number 1 means disable
|
||||
/// ). JTAG can be enabled in HMAC module
|
||||
pub const SOFT_DIS_JTAG: EfuseField = EfuseField::new(0, 1, 48, 3);
|
||||
/// Set this bit to disable JTAG in the hard way. JTAG is disabled permanently
|
||||
pub const DIS_PAD_JTAG: EfuseField = EfuseField::new(0, 1, 51, 1);
|
||||
/// Set this bit to disable flash encryption when in download boot modes
|
||||
pub const DIS_DOWNLOAD_MANUAL_ENCRYPT: EfuseField = EfuseField::new(0, 1, 52, 1);
|
||||
/// Controls single-end input threshold vrefh; 1.76 V to 2 V with step of 80 mV;
|
||||
/// stored in eFuse
|
||||
pub const USB_DREFH: EfuseField = EfuseField::new(0, 1, 53, 2);
|
||||
/// Controls single-end input threshold vrefl; 0.8 V to 1.04 V with step of 80
|
||||
/// mV; stored in eFuse
|
||||
pub const USB_DREFL: EfuseField = EfuseField::new(0, 1, 55, 2);
|
||||
/// Set this bit to exchange USB D+ and D- pins
|
||||
pub const USB_EXCHG_PINS: EfuseField = EfuseField::new(0, 1, 57, 1);
|
||||
/// Set this bit to enable external PHY
|
||||
pub const USB_EXT_PHY_ENABLE: EfuseField = EfuseField::new(0, 1, 58, 1);
|
||||
/// Bluetooth GPIO signal output security level control
|
||||
pub const BTLC_GPIO_ENABLE: EfuseField = EfuseField::new(0, 1, 59, 2);
|
||||
/// SPI regulator switches current limit mode
|
||||
pub const VDD_SPI_MODECURLIM: EfuseField = EfuseField::new(0, 1, 61, 1);
|
||||
/// SPI regulator high voltage reference
|
||||
pub const VDD_SPI_DREFH: EfuseField = EfuseField::new(0, 1, 62, 2);
|
||||
/// SPI regulator medium voltage reference
|
||||
pub const VDD_SPI_DREFM: EfuseField = EfuseField::new(0, 2, 64, 2);
|
||||
/// SPI regulator low voltage reference
|
||||
pub const VDD_SPI_DREFL: EfuseField = EfuseField::new(0, 2, 66, 2);
|
||||
/// SPI regulator power up signal
|
||||
pub const VDD_SPI_XPD: EfuseField = EfuseField::new(0, 2, 68, 1);
|
||||
/// If VDD_SPI_FORCE is 1; determines VDD_SPI voltage
|
||||
pub const VDD_SPI_TIEH: EfuseField = EfuseField::new(0, 2, 69, 1);
|
||||
/// Set this bit and force to use the configuration of eFuse to configure
|
||||
/// VDD_SPI
|
||||
pub const VDD_SPI_FORCE: EfuseField = EfuseField::new(EfuseBlock::Block0, 70, 1);
|
||||
/// `[]` RTC watchdog timeout threshold; in unit of slow clock cycle {0:
|
||||
/// "40000"; 1: "80000"; 2: "160000"; 3: "320000"}
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 80, 2);
|
||||
/// `[]` Enables flash encryption when 1 or 3 bits are set and disabled
|
||||
/// otherwise {0: "Disable"; 1: "Enable"; 3: "Disable"; 7: "Enable"}
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(EfuseBlock::Block0, 82, 3);
|
||||
/// `[]` Revoke 1st secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(EfuseBlock::Block0, 85, 1);
|
||||
/// `[]` Revoke 2nd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(EfuseBlock::Block0, 86, 1);
|
||||
/// `[]` Revoke 3rd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(EfuseBlock::Block0, 87, 1);
|
||||
/// `[KEY0_PURPOSE]` Purpose of Key0
|
||||
pub const KEY_PURPOSE_0: EfuseField = EfuseField::new(EfuseBlock::Block0, 88, 4);
|
||||
/// `[KEY1_PURPOSE]` Purpose of Key1
|
||||
pub const KEY_PURPOSE_1: EfuseField = EfuseField::new(EfuseBlock::Block0, 92, 4);
|
||||
/// `[KEY2_PURPOSE]` Purpose of Key2
|
||||
pub const KEY_PURPOSE_2: EfuseField = EfuseField::new(EfuseBlock::Block0, 96, 4);
|
||||
/// `[KEY3_PURPOSE]` Purpose of Key3
|
||||
pub const KEY_PURPOSE_3: EfuseField = EfuseField::new(EfuseBlock::Block0, 100, 4);
|
||||
/// `[KEY4_PURPOSE]` Purpose of Key4
|
||||
pub const KEY_PURPOSE_4: EfuseField = EfuseField::new(EfuseBlock::Block0, 104, 4);
|
||||
/// `[KEY5_PURPOSE]` Purpose of Key5
|
||||
pub const KEY_PURPOSE_5: EfuseField = EfuseField::new(EfuseBlock::Block0, 108, 4);
|
||||
/// `[]` Set this bit to enable secure boot
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 116, 1);
|
||||
/// `[]` Set this bit to enable revoking aggressive secure boot
|
||||
pub const SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField = EfuseField::new(EfuseBlock::Block0, 117, 1);
|
||||
/// `[]` Set this bit to disable function of usb switch to jtag in module of usb
|
||||
pub const VDD_SPI_FORCE: EfuseField = EfuseField::new(0, 2, 70, 1);
|
||||
/// Set SPI regulator to 0 to configure init\[1:0\]=0
|
||||
pub const VDD_SPI_EN_INIT: EfuseField = EfuseField::new(0, 2, 71, 1);
|
||||
/// Set SPI regulator to 1 to enable output current limit
|
||||
pub const VDD_SPI_ENCURLIM: EfuseField = EfuseField::new(0, 2, 72, 1);
|
||||
/// Tunes the current limit threshold of SPI regulator when tieh=0; about 800
|
||||
/// mA/(8+d)
|
||||
pub const VDD_SPI_DCURLIM: EfuseField = EfuseField::new(0, 2, 73, 3);
|
||||
/// Adds resistor from LDO output to ground
|
||||
pub const VDD_SPI_INIT: EfuseField = EfuseField::new(0, 2, 76, 2);
|
||||
/// Prevents SPI regulator from overshoot
|
||||
pub const VDD_SPI_DCAP: EfuseField = EfuseField::new(0, 2, 78, 2);
|
||||
/// RTC watchdog timeout threshold; in unit of slow clock cycle
|
||||
pub const WDT_DELAY_SEL: EfuseField = EfuseField::new(0, 2, 80, 2);
|
||||
/// Enables flash encryption when 1 or 3 bits are set and disabled otherwise
|
||||
pub const SPI_BOOT_CRYPT_CNT: EfuseField = EfuseField::new(0, 2, 82, 3);
|
||||
/// Revoke 1st secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE0: EfuseField = EfuseField::new(0, 2, 85, 1);
|
||||
/// Revoke 2nd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE1: EfuseField = EfuseField::new(0, 2, 86, 1);
|
||||
/// Revoke 3rd secure boot key
|
||||
pub const SECURE_BOOT_KEY_REVOKE2: EfuseField = EfuseField::new(0, 2, 87, 1);
|
||||
/// Purpose of Key0
|
||||
pub const KEY_PURPOSE_0: EfuseField = EfuseField::new(0, 2, 88, 4);
|
||||
/// Purpose of Key1
|
||||
pub const KEY_PURPOSE_1: EfuseField = EfuseField::new(0, 2, 92, 4);
|
||||
/// Purpose of Key2
|
||||
pub const KEY_PURPOSE_2: EfuseField = EfuseField::new(0, 3, 96, 4);
|
||||
/// Purpose of Key3
|
||||
pub const KEY_PURPOSE_3: EfuseField = EfuseField::new(0, 3, 100, 4);
|
||||
/// Purpose of Key4
|
||||
pub const KEY_PURPOSE_4: EfuseField = EfuseField::new(0, 3, 104, 4);
|
||||
/// Purpose of Key5
|
||||
pub const KEY_PURPOSE_5: EfuseField = EfuseField::new(0, 3, 108, 4);
|
||||
/// Reserved (used for four backups method)
|
||||
pub const RPT4_RESERVED0: EfuseField = EfuseField::new(0, 3, 112, 4);
|
||||
/// Set this bit to enable secure boot
|
||||
pub const SECURE_BOOT_EN: EfuseField = EfuseField::new(0, 3, 116, 1);
|
||||
/// Set this bit to enable revoking aggressive secure boot
|
||||
pub const SECURE_BOOT_AGGRESSIVE_REVOKE: EfuseField = EfuseField::new(0, 3, 117, 1);
|
||||
/// Set this bit to disable function of usb switch to jtag in module of usb
|
||||
/// device
|
||||
pub const DIS_USB_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 118, 1);
|
||||
/// `[DIS_USB_DEVICE]` Set this bit to disable usb device
|
||||
pub const DIS_USB_SERIAL_JTAG: EfuseField = EfuseField::new(EfuseBlock::Block0, 119, 1);
|
||||
/// `[]` Set this bit to enable selection between usb_to_jtag and pad_to_jtag
|
||||
/// through strapping gpio10 when both reg_dis_usb_jtag and reg_dis_pad_jtag are
|
||||
/// equal to 0
|
||||
pub const STRAP_JTAG_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 120, 1);
|
||||
/// `[]` This bit is used to switch internal PHY and external PHY for USB OTG
|
||||
/// and USB Device {0: "internal PHY is assigned to USB Device while external
|
||||
/// PHY is assigned to USB OTG"; 1: "internal PHY is assigned to USB OTG while
|
||||
/// external PHY is assigned to USB Device"}
|
||||
pub const USB_PHY_SEL: EfuseField = EfuseField::new(EfuseBlock::Block0, 121, 1);
|
||||
/// `[]` Configures flash waiting time after power-up; in unit of ms. If the
|
||||
/// value is less than 15; the waiting time is the configurable value.
|
||||
/// Otherwise; the waiting time is twice the configurable value
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(EfuseBlock::Block0, 124, 4);
|
||||
/// `[]` Set this bit to disable download mode (boot_mode`[3:0]` = 0; 1; 2; 3;
|
||||
/// 6; 7)
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 128, 1);
|
||||
/// `[DIS_LEGACY_SPI_BOOT]` Disable direct boot mode
|
||||
pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(EfuseBlock::Block0, 129, 1);
|
||||
/// `[UART_PRINT_CHANNEL]` USB printing {0: "Enable"; 1: "Disable"}
|
||||
pub const DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField = EfuseField::new(EfuseBlock::Block0, 130, 1);
|
||||
/// `[]` Flash ECC mode in ROM {0: "16to18 byte"; 1: "16to17 byte"}
|
||||
pub const FLASH_ECC_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 131, 1);
|
||||
/// `[DIS_USB_DOWNLOAD_MODE]` Set this bit to disable UART download mode through
|
||||
/// USB
|
||||
pub const DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField =
|
||||
EfuseField::new(EfuseBlock::Block0, 132, 1);
|
||||
/// `[]` Set this bit to enable secure UART download mode
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(EfuseBlock::Block0, 133, 1);
|
||||
/// `[]` Set the default UART boot message output mode {0: "Enable"; 1: "Enable when GPIO46 is low at reset"; 2: "Enable when GPIO46 is high at reset"; 3: "Disable"}
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(EfuseBlock::Block0, 134, 2);
|
||||
/// `[]` Set default power supply for GPIO33-GPIO37; set when SPI flash is
|
||||
/// initialized {0: "VDD3P3_CPU"; 1: "VDD_SPI"}
|
||||
pub const PIN_POWER_SELECTION: EfuseField = EfuseField::new(EfuseBlock::Block0, 136, 1);
|
||||
/// `[]` SPI flash type {0: "4 data lines"; 1: "8 data lines"}
|
||||
pub const FLASH_TYPE: EfuseField = EfuseField::new(EfuseBlock::Block0, 137, 1);
|
||||
/// `[]` Set Flash page size
|
||||
pub const FLASH_PAGE_SIZE: EfuseField = EfuseField::new(EfuseBlock::Block0, 138, 2);
|
||||
/// `[]` Set 1 to enable ECC for flash boot
|
||||
pub const FLASH_ECC_EN: EfuseField = EfuseField::new(EfuseBlock::Block0, 140, 1);
|
||||
/// `[]` Set this bit to force ROM code to send a resume command during SPI boot
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(EfuseBlock::Block0, 141, 1);
|
||||
/// `[]` Secure version (used by ESP-IDF anti-rollback feature)
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block0, 142, 16);
|
||||
/// `[]` Set this bit to disable download through USB-OTG
|
||||
pub const DIS_USB_OTG_DOWNLOAD_MODE: EfuseField = EfuseField::new(EfuseBlock::Block0, 159, 1);
|
||||
/// `[]` Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 160, 1);
|
||||
/// `[]` Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block0, 161, 1);
|
||||
/// `[MAC_FACTORY]` MAC address
|
||||
pub const MAC: EfuseField = EfuseField::new(EfuseBlock::Block1, 0, 48);
|
||||
/// `[]` SPI_PAD_configure CLK
|
||||
pub const SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(EfuseBlock::Block1, 48, 6);
|
||||
/// `[]` SPI_PAD_configure Q(D1)
|
||||
pub const SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(EfuseBlock::Block1, 54, 6);
|
||||
/// `[]` SPI_PAD_configure D(D0)
|
||||
pub const SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(EfuseBlock::Block1, 60, 6);
|
||||
/// `[]` SPI_PAD_configure CS
|
||||
pub const SPI_PAD_CONFIG_CS: EfuseField = EfuseField::new(EfuseBlock::Block1, 66, 6);
|
||||
/// `[]` SPI_PAD_configure HD(D3)
|
||||
pub const SPI_PAD_CONFIG_HD: EfuseField = EfuseField::new(EfuseBlock::Block1, 72, 6);
|
||||
/// `[]` SPI_PAD_configure WP(D2)
|
||||
pub const SPI_PAD_CONFIG_WP: EfuseField = EfuseField::new(EfuseBlock::Block1, 78, 6);
|
||||
/// `[]` SPI_PAD_configure DQS
|
||||
pub const SPI_PAD_CONFIG_DQS: EfuseField = EfuseField::new(EfuseBlock::Block1, 84, 6);
|
||||
/// `[]` SPI_PAD_configure D4
|
||||
pub const SPI_PAD_CONFIG_D4: EfuseField = EfuseField::new(EfuseBlock::Block1, 90, 6);
|
||||
/// `[]` SPI_PAD_configure D5
|
||||
pub const SPI_PAD_CONFIG_D5: EfuseField = EfuseField::new(EfuseBlock::Block1, 96, 6);
|
||||
/// `[]` SPI_PAD_configure D6
|
||||
pub const SPI_PAD_CONFIG_D6: EfuseField = EfuseField::new(EfuseBlock::Block1, 102, 6);
|
||||
/// `[]` SPI_PAD_configure D7
|
||||
pub const SPI_PAD_CONFIG_D7: EfuseField = EfuseField::new(EfuseBlock::Block1, 108, 6);
|
||||
/// `[]` WAFER_VERSION_MINOR least significant bits
|
||||
pub const WAFER_VERSION_MINOR_LO: EfuseField = EfuseField::new(EfuseBlock::Block1, 114, 3);
|
||||
/// `[]` Package version
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(EfuseBlock::Block1, 117, 3);
|
||||
/// `[]` BLK_VERSION_MINOR
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 120, 3);
|
||||
/// `[]` Flash capacity {0: "None"; 1: "8M"; 2: "4M"}
|
||||
pub const FLASH_CAP: EfuseField = EfuseField::new(EfuseBlock::Block1, 123, 3);
|
||||
/// `[]` Flash temperature {0: "None"; 1: "105C"; 2: "85C"}
|
||||
pub const FLASH_TEMP: EfuseField = EfuseField::new(EfuseBlock::Block1, 126, 2);
|
||||
/// `[]` Flash vendor {0: "None"; 1: "XMC"; 2: "GD"; 3: "FM"; 4: "TT"; 5: "BY"}
|
||||
pub const FLASH_VENDOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 128, 3);
|
||||
/// `[]` PSRAM capacity {0: "None"; 1: "8M"; 2: "2M"}
|
||||
pub const PSRAM_CAP: EfuseField = EfuseField::new(EfuseBlock::Block1, 131, 2);
|
||||
/// `[]` PSRAM temperature {0: "None"; 1: "105C"; 2: "85C"}
|
||||
pub const PSRAM_TEMP: EfuseField = EfuseField::new(EfuseBlock::Block1, 133, 2);
|
||||
/// `[]` PSRAM vendor {0: "None"; 1: "AP_3v3"; 2: "AP_1v8"}
|
||||
pub const PSRAM_VENDOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 135, 2);
|
||||
/// `[]` BLOCK1 K_RTC_LDO
|
||||
pub const K_RTC_LDO: EfuseField = EfuseField::new(EfuseBlock::Block1, 141, 7);
|
||||
/// `[]` BLOCK1 K_DIG_LDO
|
||||
pub const K_DIG_LDO: EfuseField = EfuseField::new(EfuseBlock::Block1, 148, 7);
|
||||
/// `[]` BLOCK1 voltage of rtc dbias20
|
||||
pub const V_RTC_DBIAS20: EfuseField = EfuseField::new(EfuseBlock::Block1, 155, 8);
|
||||
/// `[]` BLOCK1 voltage of digital dbias20
|
||||
pub const V_DIG_DBIAS20: EfuseField = EfuseField::new(EfuseBlock::Block1, 163, 8);
|
||||
/// `[]` BLOCK1 digital dbias when hvt
|
||||
pub const DIG_DBIAS_HVT: EfuseField = EfuseField::new(EfuseBlock::Block1, 171, 5);
|
||||
/// `[]` WAFER_VERSION_MINOR most significant bit
|
||||
pub const WAFER_VERSION_MINOR_HI: EfuseField = EfuseField::new(EfuseBlock::Block1, 183, 1);
|
||||
/// `[]` WAFER_VERSION_MAJOR
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block1, 184, 2);
|
||||
/// `[]` ADC2 calibration voltage at atten3
|
||||
pub const ADC2_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block1, 186, 6);
|
||||
/// `[]` Optional unique 128-bit ID
|
||||
pub const OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(EfuseBlock::Block2, 0, 128);
|
||||
/// `[]` BLK_VERSION_MAJOR of BLOCK2 {0: "No calib"; 1: "ADC calib V1"}
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(EfuseBlock::Block2, 128, 2);
|
||||
/// `[]` Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(EfuseBlock::Block2, 132, 9);
|
||||
/// `[]` ADC OCode
|
||||
pub const OCODE: EfuseField = EfuseField::new(EfuseBlock::Block2, 141, 8);
|
||||
/// `[]` ADC1 init code at atten0
|
||||
pub const ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 149, 8);
|
||||
/// `[]` ADC1 init code at atten1
|
||||
pub const ADC1_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block2, 157, 6);
|
||||
/// `[]` ADC1 init code at atten2
|
||||
pub const ADC1_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block2, 163, 6);
|
||||
/// `[]` ADC1 init code at atten3
|
||||
pub const ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 169, 6);
|
||||
/// `[]` ADC2 init code at atten0
|
||||
pub const ADC2_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 175, 8);
|
||||
/// `[]` ADC2 init code at atten1
|
||||
pub const ADC2_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block2, 183, 6);
|
||||
/// `[]` ADC2 init code at atten2
|
||||
pub const ADC2_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block2, 189, 6);
|
||||
/// `[]` ADC2 init code at atten3
|
||||
pub const ADC2_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 195, 6);
|
||||
/// `[]` ADC1 calibration voltage at atten0
|
||||
pub const ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 201, 8);
|
||||
/// `[]` ADC1 calibration voltage at atten1
|
||||
pub const ADC1_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block2, 209, 8);
|
||||
/// `[]` ADC1 calibration voltage at atten2
|
||||
pub const ADC1_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block2, 217, 8);
|
||||
/// `[]` ADC1 calibration voltage at atten3
|
||||
pub const ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(EfuseBlock::Block2, 225, 8);
|
||||
/// `[]` ADC2 calibration voltage at atten0
|
||||
pub const ADC2_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(EfuseBlock::Block2, 233, 8);
|
||||
/// `[]` ADC2 calibration voltage at atten1
|
||||
pub const ADC2_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(EfuseBlock::Block2, 241, 7);
|
||||
/// `[]` ADC2 calibration voltage at atten2
|
||||
pub const ADC2_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(EfuseBlock::Block2, 248, 7);
|
||||
/// `[BLOCK_USR_DATA]` User data
|
||||
pub const USER_DATA: EfuseField = EfuseField::new(EfuseBlock::Block3, 0, 256);
|
||||
/// `[MAC_CUSTOM CUSTOM_MAC]` Custom MAC
|
||||
pub const USER_DATA_MAC_CUSTOM: EfuseField = EfuseField::new(EfuseBlock::Block3, 200, 48);
|
||||
/// `[BLOCK_KEY0]` Key0 or user data
|
||||
pub const KEY0: EfuseField = EfuseField::new(EfuseBlock::Block4, 0, 256);
|
||||
/// `[BLOCK_KEY1]` Key1 or user data
|
||||
pub const KEY1: EfuseField = EfuseField::new(EfuseBlock::Block5, 0, 256);
|
||||
/// `[BLOCK_KEY2]` Key2 or user data
|
||||
pub const KEY2: EfuseField = EfuseField::new(EfuseBlock::Block6, 0, 256);
|
||||
/// `[BLOCK_KEY3]` Key3 or user data
|
||||
pub const KEY3: EfuseField = EfuseField::new(EfuseBlock::Block7, 0, 256);
|
||||
/// `[BLOCK_KEY4]` Key4 or user data
|
||||
pub const KEY4: EfuseField = EfuseField::new(EfuseBlock::Block8, 0, 256);
|
||||
/// `[BLOCK_KEY5]` Key5 or user data
|
||||
pub const KEY5: EfuseField = EfuseField::new(EfuseBlock::Block9, 0, 256);
|
||||
/// `[BLOCK_SYS_DATA2]` System data part 2 (reserved)
|
||||
pub const SYS_DATA_PART2: EfuseField = EfuseField::new(EfuseBlock::Block10, 0, 256);
|
||||
pub const DIS_USB_JTAG: EfuseField = EfuseField::new(0, 3, 118, 1);
|
||||
/// Set this bit to disable usb device
|
||||
pub const DIS_USB_SERIAL_JTAG: EfuseField = EfuseField::new(0, 3, 119, 1);
|
||||
/// Set this bit to enable selection between usb_to_jtag and pad_to_jtag through
|
||||
/// strapping gpio3 when both reg_dis_usb_jtag and reg_dis_pad_jtag are equal to
|
||||
/// 0
|
||||
pub const STRAP_JTAG_SEL: EfuseField = EfuseField::new(0, 3, 120, 1);
|
||||
/// This bit is used to switch internal PHY and external PHY for USB OTG and USB
|
||||
/// Device
|
||||
pub const USB_PHY_SEL: EfuseField = EfuseField::new(0, 3, 121, 1);
|
||||
/// Sample delay configuration of power glitch
|
||||
pub const POWER_GLITCH_DSENSE: EfuseField = EfuseField::new(0, 3, 122, 2);
|
||||
/// Configures flash waiting time after power-up; in unit of ms. If the value is
|
||||
/// less than 15; the waiting time is the configurable value. Otherwise; the
|
||||
/// waiting time is twice the configurable value
|
||||
pub const FLASH_TPUW: EfuseField = EfuseField::new(0, 3, 124, 4);
|
||||
/// Set this bit to disable download mode (boot_mode\[3:0\] = 0; 1; 2; 3; 6; 7)
|
||||
pub const DIS_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 128, 1);
|
||||
/// Disable direct boot mode
|
||||
pub const DIS_DIRECT_BOOT: EfuseField = EfuseField::new(0, 4, 129, 1);
|
||||
/// USB printing
|
||||
pub const DIS_USB_SERIAL_JTAG_ROM_PRINT: EfuseField = EfuseField::new(0, 4, 130, 1);
|
||||
/// Flash ECC mode in ROM
|
||||
pub const FLASH_ECC_MODE: EfuseField = EfuseField::new(0, 4, 131, 1);
|
||||
/// Set this bit to disable UART download mode through USB
|
||||
pub const DIS_USB_SERIAL_JTAG_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 132, 1);
|
||||
/// Set this bit to enable secure UART download mode
|
||||
pub const ENABLE_SECURITY_DOWNLOAD: EfuseField = EfuseField::new(0, 4, 133, 1);
|
||||
/// Set the default UART boot message output mode
|
||||
pub const UART_PRINT_CONTROL: EfuseField = EfuseField::new(0, 4, 134, 2);
|
||||
/// Set default power supply for GPIO33-GPIO37; set when SPI flash is
|
||||
/// initialized
|
||||
pub const PIN_POWER_SELECTION: EfuseField = EfuseField::new(0, 4, 136, 1);
|
||||
/// SPI flash type
|
||||
pub const FLASH_TYPE: EfuseField = EfuseField::new(0, 4, 137, 1);
|
||||
/// Set Flash page size
|
||||
pub const FLASH_PAGE_SIZE: EfuseField = EfuseField::new(0, 4, 138, 2);
|
||||
/// Set 1 to enable ECC for flash boot
|
||||
pub const FLASH_ECC_EN: EfuseField = EfuseField::new(0, 4, 140, 1);
|
||||
/// Set this bit to force ROM code to send a resume command during SPI boot
|
||||
pub const FORCE_SEND_RESUME: EfuseField = EfuseField::new(0, 4, 141, 1);
|
||||
/// Secure version (used by ESP-IDF anti-rollback feature)
|
||||
pub const SECURE_VERSION: EfuseField = EfuseField::new(0, 4, 142, 16);
|
||||
/// Set this bit to enable power glitch function
|
||||
pub const POWERGLITCH_EN: EfuseField = EfuseField::new(0, 4, 158, 1);
|
||||
/// Set this bit to disable download through USB-OTG
|
||||
pub const DIS_USB_OTG_DOWNLOAD_MODE: EfuseField = EfuseField::new(0, 4, 159, 1);
|
||||
/// Disables check of wafer version major
|
||||
pub const DISABLE_WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(0, 5, 160, 1);
|
||||
/// Disables check of blk version major
|
||||
pub const DISABLE_BLK_VERSION_MAJOR: EfuseField = EfuseField::new(0, 5, 161, 1);
|
||||
/// reserved
|
||||
pub const RESERVED_0_162: EfuseField = EfuseField::new(0, 5, 162, 22);
|
||||
/// MAC address
|
||||
pub const MAC0: EfuseField = EfuseField::new(1, 0, 0, 32);
|
||||
/// MAC address
|
||||
pub const MAC1: EfuseField = EfuseField::new(1, 1, 32, 16);
|
||||
/// SPI_PAD_configure CLK
|
||||
pub const SPI_PAD_CONFIG_CLK: EfuseField = EfuseField::new(1, 1, 48, 6);
|
||||
/// SPI_PAD_configure Q(D1)
|
||||
pub const SPI_PAD_CONFIG_Q: EfuseField = EfuseField::new(1, 1, 54, 6);
|
||||
/// SPI_PAD_configure D(D0)
|
||||
pub const SPI_PAD_CONFIG_D: EfuseField = EfuseField::new(1, 1, 60, 6);
|
||||
/// SPI_PAD_configure CS
|
||||
pub const SPI_PAD_CONFIG_CS: EfuseField = EfuseField::new(1, 2, 66, 6);
|
||||
/// SPI_PAD_configure HD(D3)
|
||||
pub const SPI_PAD_CONFIG_HD: EfuseField = EfuseField::new(1, 2, 72, 6);
|
||||
/// SPI_PAD_configure WP(D2)
|
||||
pub const SPI_PAD_CONFIG_WP: EfuseField = EfuseField::new(1, 2, 78, 6);
|
||||
/// SPI_PAD_configure DQS
|
||||
pub const SPI_PAD_CONFIG_DQS: EfuseField = EfuseField::new(1, 2, 84, 6);
|
||||
/// SPI_PAD_configure D4
|
||||
pub const SPI_PAD_CONFIG_D4: EfuseField = EfuseField::new(1, 2, 90, 6);
|
||||
/// SPI_PAD_configure D5
|
||||
pub const SPI_PAD_CONFIG_D5: EfuseField = EfuseField::new(1, 3, 96, 6);
|
||||
/// SPI_PAD_configure D6
|
||||
pub const SPI_PAD_CONFIG_D6: EfuseField = EfuseField::new(1, 3, 102, 6);
|
||||
/// SPI_PAD_configure D7
|
||||
pub const SPI_PAD_CONFIG_D7: EfuseField = EfuseField::new(1, 3, 108, 6);
|
||||
/// WAFER_VERSION_MINOR least significant bits
|
||||
pub const WAFER_VERSION_MINOR_LO: EfuseField = EfuseField::new(1, 3, 114, 3);
|
||||
/// Package version
|
||||
pub const PKG_VERSION: EfuseField = EfuseField::new(1, 3, 117, 3);
|
||||
/// BLK_VERSION_MINOR
|
||||
pub const BLK_VERSION_MINOR: EfuseField = EfuseField::new(1, 3, 120, 3);
|
||||
/// Flash capacity
|
||||
pub const FLASH_CAP: EfuseField = EfuseField::new(1, 3, 123, 3);
|
||||
/// Flash temperature
|
||||
pub const FLASH_TEMP: EfuseField = EfuseField::new(1, 3, 126, 2);
|
||||
/// Flash vendor
|
||||
pub const FLASH_VENDOR: EfuseField = EfuseField::new(1, 4, 128, 3);
|
||||
/// PSRAM capacity
|
||||
pub const PSRAM_CAP: EfuseField = EfuseField::new(1, 4, 131, 2);
|
||||
/// PSRAM temperature
|
||||
pub const PSRAM_TEMP: EfuseField = EfuseField::new(1, 4, 133, 2);
|
||||
/// PSRAM vendor
|
||||
pub const PSRAM_VENDOR: EfuseField = EfuseField::new(1, 4, 135, 2);
|
||||
/// reserved
|
||||
pub const RESERVED_1_137: EfuseField = EfuseField::new(1, 4, 137, 4);
|
||||
/// BLOCK1 K_RTC_LDO
|
||||
pub const K_RTC_LDO: EfuseField = EfuseField::new(1, 4, 141, 7);
|
||||
/// BLOCK1 K_DIG_LDO
|
||||
pub const K_DIG_LDO: EfuseField = EfuseField::new(1, 4, 148, 7);
|
||||
/// BLOCK1 voltage of rtc dbias20
|
||||
pub const V_RTC_DBIAS20: EfuseField = EfuseField::new(1, 4, 155, 8);
|
||||
/// BLOCK1 voltage of digital dbias20
|
||||
pub const V_DIG_DBIAS20: EfuseField = EfuseField::new(1, 5, 163, 8);
|
||||
/// BLOCK1 digital dbias when hvt
|
||||
pub const DIG_DBIAS_HVT: EfuseField = EfuseField::new(1, 5, 171, 5);
|
||||
/// reserved
|
||||
pub const RESERVED_1_176: EfuseField = EfuseField::new(1, 5, 176, 3);
|
||||
/// PSRAM capacity bit 3
|
||||
pub const PSRAM_CAP_3: EfuseField = EfuseField::new(1, 5, 179, 1);
|
||||
/// reserved
|
||||
pub const RESERVED_1_180: EfuseField = EfuseField::new(1, 5, 180, 3);
|
||||
/// WAFER_VERSION_MINOR most significant bit
|
||||
pub const WAFER_VERSION_MINOR_HI: EfuseField = EfuseField::new(1, 5, 183, 1);
|
||||
/// WAFER_VERSION_MAJOR
|
||||
pub const WAFER_VERSION_MAJOR: EfuseField = EfuseField::new(1, 5, 184, 2);
|
||||
/// ADC2 calibration voltage at atten3
|
||||
pub const ADC2_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(1, 5, 186, 6);
|
||||
/// Optional unique 128-bit ID
|
||||
pub const OPTIONAL_UNIQUE_ID: EfuseField = EfuseField::new(2, 0, 0, 128);
|
||||
/// BLK_VERSION_MAJOR of BLOCK2
|
||||
pub const BLK_VERSION_MAJOR: EfuseField = EfuseField::new(2, 4, 128, 2);
|
||||
/// reserved
|
||||
pub const RESERVED_2_130: EfuseField = EfuseField::new(2, 4, 130, 2);
|
||||
/// Temperature calibration data
|
||||
pub const TEMP_CALIB: EfuseField = EfuseField::new(2, 4, 132, 9);
|
||||
/// ADC OCode
|
||||
pub const OCODE: EfuseField = EfuseField::new(2, 4, 141, 8);
|
||||
/// ADC1 init code at atten0
|
||||
pub const ADC1_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(2, 4, 149, 8);
|
||||
/// ADC1 init code at atten1
|
||||
pub const ADC1_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(2, 4, 157, 6);
|
||||
/// ADC1 init code at atten2
|
||||
pub const ADC1_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(2, 5, 163, 6);
|
||||
/// ADC1 init code at atten3
|
||||
pub const ADC1_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(2, 5, 169, 6);
|
||||
/// ADC2 init code at atten0
|
||||
pub const ADC2_INIT_CODE_ATTEN0: EfuseField = EfuseField::new(2, 5, 175, 8);
|
||||
/// ADC2 init code at atten1
|
||||
pub const ADC2_INIT_CODE_ATTEN1: EfuseField = EfuseField::new(2, 5, 183, 6);
|
||||
/// ADC2 init code at atten2
|
||||
pub const ADC2_INIT_CODE_ATTEN2: EfuseField = EfuseField::new(2, 5, 189, 6);
|
||||
/// ADC2 init code at atten3
|
||||
pub const ADC2_INIT_CODE_ATTEN3: EfuseField = EfuseField::new(2, 6, 195, 6);
|
||||
/// ADC1 calibration voltage at atten0
|
||||
pub const ADC1_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(2, 6, 201, 8);
|
||||
/// ADC1 calibration voltage at atten1
|
||||
pub const ADC1_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(2, 6, 209, 8);
|
||||
/// ADC1 calibration voltage at atten2
|
||||
pub const ADC1_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(2, 6, 217, 8);
|
||||
/// ADC1 calibration voltage at atten3
|
||||
pub const ADC1_CAL_VOL_ATTEN3: EfuseField = EfuseField::new(2, 7, 225, 8);
|
||||
/// ADC2 calibration voltage at atten0
|
||||
pub const ADC2_CAL_VOL_ATTEN0: EfuseField = EfuseField::new(2, 7, 233, 8);
|
||||
/// ADC2 calibration voltage at atten1
|
||||
pub const ADC2_CAL_VOL_ATTEN1: EfuseField = EfuseField::new(2, 7, 241, 7);
|
||||
/// ADC2 calibration voltage at atten2
|
||||
pub const ADC2_CAL_VOL_ATTEN2: EfuseField = EfuseField::new(2, 7, 248, 7);
|
||||
/// reserved
|
||||
pub const RESERVED_2_255: EfuseField = EfuseField::new(2, 7, 255, 1);
|
||||
/// User data
|
||||
pub const BLOCK_USR_DATA: EfuseField = EfuseField::new(3, 0, 0, 192);
|
||||
/// reserved
|
||||
pub const RESERVED_3_192: EfuseField = EfuseField::new(3, 6, 192, 8);
|
||||
/// Custom MAC
|
||||
pub const CUSTOM_MAC: EfuseField = EfuseField::new(3, 6, 200, 48);
|
||||
/// reserved
|
||||
pub const RESERVED_3_248: EfuseField = EfuseField::new(3, 7, 248, 8);
|
||||
/// Key0 or user data
|
||||
pub const BLOCK_KEY0: EfuseField = EfuseField::new(4, 0, 0, 256);
|
||||
/// Key1 or user data
|
||||
pub const BLOCK_KEY1: EfuseField = EfuseField::new(5, 0, 0, 256);
|
||||
/// Key2 or user data
|
||||
pub const BLOCK_KEY2: EfuseField = EfuseField::new(6, 0, 0, 256);
|
||||
/// Key3 or user data
|
||||
pub const BLOCK_KEY3: EfuseField = EfuseField::new(7, 0, 0, 256);
|
||||
/// Key4 or user data
|
||||
pub const BLOCK_KEY4: EfuseField = EfuseField::new(8, 0, 0, 256);
|
||||
/// Key5 or user data
|
||||
pub const BLOCK_KEY5: EfuseField = EfuseField::new(9, 0, 0, 256);
|
||||
/// System data part 2 (reserved)
|
||||
pub const BLOCK_SYS_DATA2: EfuseField = EfuseField::new(10, 0, 0, 256);
|
||||
|
||||
@ -42,7 +42,7 @@
|
||||
//! ```
|
||||
|
||||
pub use self::fields::*;
|
||||
use crate::{analog::adc::Attenuation, peripherals::EFUSE};
|
||||
use crate::{analog::adc::Attenuation, peripherals::EFUSE, soc::efuse_field::EfuseField};
|
||||
|
||||
mod fields;
|
||||
|
||||
@ -50,11 +50,6 @@ mod fields;
|
||||
pub struct Efuse;
|
||||
|
||||
impl Efuse {
|
||||
/// Reads chip's MAC address from the eFuse storage.
|
||||
pub fn read_base_mac_address() -> [u8; 6] {
|
||||
Self::read_field_be(MAC)
|
||||
}
|
||||
|
||||
/// Get status of SPI boot encryption.
|
||||
pub fn flash_encryption() -> bool {
|
||||
(Self::read_field_le::<u8>(SPI_BOOT_CRYPT_CNT).count_ones() % 2) != 0
|
||||
@ -191,7 +186,8 @@ impl Efuse {
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Copy, Clone)]
|
||||
#[derive(Debug, Clone, Copy, strum::FromRepr)]
|
||||
#[repr(u32)]
|
||||
pub(crate) enum EfuseBlock {
|
||||
Block0,
|
||||
Block1,
|
||||
|
||||
@ -1,5 +1,5 @@
|
||||
[package]
|
||||
name = "xtask"
|
||||
name = "xtask"
|
||||
version = "0.0.0"
|
||||
edition = "2024"
|
||||
publish = false
|
||||
@ -7,10 +7,8 @@ publish = false
|
||||
[dependencies]
|
||||
anyhow = "1.0.93"
|
||||
basic-toml = "0.1.9"
|
||||
chrono = "0.4.38"
|
||||
clap = { version = "4.5.20", features = ["derive", "wrap_help"] }
|
||||
console = "0.15.10"
|
||||
csv = "1.3.1"
|
||||
env_logger = "0.11.5"
|
||||
esp-metadata = { path = "../esp-metadata", features = ["clap"] }
|
||||
kuchikiki = "0.8.2"
|
||||
@ -33,5 +31,5 @@ reqwest = { version = "0.12.12", features = [
|
||||
], optional = true }
|
||||
|
||||
[features]
|
||||
deploy-docs = ["dep:reqwest"]
|
||||
preview-docs = ["dep:rocket", "dep:opener"]
|
||||
deploy-docs = ["dep:reqwest"]
|
||||
preview-docs = ["dep:opener", "dep:rocket"]
|
||||
|
||||
@ -8,19 +8,22 @@ Automation using [cargo-xtask](https://github.com/matklad/cargo-xtask).
|
||||
Usage: xtask <COMMAND>
|
||||
|
||||
Commands:
|
||||
build-documentation Build documentation for the specified chip
|
||||
build-examples Build all examples for the specified chip
|
||||
build-package Build the specified package with the given options
|
||||
build-tests Build all applicable tests or the specified test for a specified chip
|
||||
bump-version Bump the version of the specified package(s)
|
||||
fmt-packages Format all packages in the workspace with rustfmt
|
||||
generate-efuse-fields Generate the eFuse fields source file from a CSV
|
||||
lint-packages Lint all packages in the workspace with clippy
|
||||
run-example Run the given example for the specified chip
|
||||
run-doc-test Run doctests for specified chip and package
|
||||
run-tests Run all applicable tests or the specified test for a specified chip
|
||||
run-elfs Run all ELFs in a folder
|
||||
help Print this message or the help of the given subcommand(s)
|
||||
build-documentation Build documentation for the specified chip
|
||||
build-documentation-index Build documentation index including the specified packages
|
||||
build-examples Build all examples for the specified chip
|
||||
build-package Build the specified package with the given options
|
||||
build-tests Build all applicable tests or the specified test for a specified chip
|
||||
bump-version Bump the version of the specified package(s)
|
||||
fmt-packages Format all packages in the workspace with rustfmt
|
||||
lint-packages Lint all packages in the workspace with clippy
|
||||
publish Attempt to publish the specified package
|
||||
run-doc-tests Run doctests for specified chip and package
|
||||
run-example Run the given example for the specified chip
|
||||
run-tests Run all applicable tests or the specified test for a specified chip
|
||||
run-elfs Run all ELFs in a folder
|
||||
ci Perform (parts of) the checks done in CI
|
||||
tag-releases Generate git tags for all new package releases
|
||||
help Print this message or the help of the given subcommand(s)
|
||||
|
||||
Options:
|
||||
-h, --help Print help
|
||||
|
||||
158
xtask/src/lib.rs
158
xtask/src/lib.rs
@ -1,12 +1,9 @@
|
||||
use std::{
|
||||
collections::VecDeque,
|
||||
fs::{self, File},
|
||||
io::Write as _,
|
||||
fs,
|
||||
path::{Path, PathBuf},
|
||||
process::Command,
|
||||
};
|
||||
|
||||
use anyhow::{anyhow, Context, Result};
|
||||
use anyhow::{Context, Result, anyhow};
|
||||
use cargo::CargoAction;
|
||||
use clap::ValueEnum;
|
||||
use esp_metadata::{Chip, Config};
|
||||
@ -446,157 +443,6 @@ pub fn bump_version(workspace: &Path, package: Package, amount: Version) -> Resu
|
||||
Ok(())
|
||||
}
|
||||
|
||||
// File header for the generated eFuse fields.
|
||||
const EFUSE_FIELDS_RS_HEADER: &str = r#"
|
||||
//! eFuse fields for the $CHIP.
|
||||
//!
|
||||
//! This file was automatically generated, please do not edit it manually!
|
||||
//!
|
||||
//! For information on how to regenerate these files, please refer to the
|
||||
//! `xtask` package's `README.md` file.
|
||||
//!
|
||||
//! Generated on: $DATE
|
||||
//! ESP-IDF Commit: $HASH
|
||||
|
||||
use super::EfuseBlock;
|
||||
use crate::soc::efuse_field::EfuseField;
|
||||
"#;
|
||||
|
||||
#[derive(Debug, Clone, PartialEq, serde::Deserialize)]
|
||||
struct EfuseField {
|
||||
field_name: String,
|
||||
efuse_block: String,
|
||||
bit_start: u32,
|
||||
bit_count: u32,
|
||||
description: String,
|
||||
}
|
||||
|
||||
/// Generate Rust constants for each eFuse field defined in the given CSV file.
|
||||
pub fn generate_efuse_table(
|
||||
chip: &Chip,
|
||||
idf_path: impl AsRef<Path>,
|
||||
out_path: impl AsRef<Path>,
|
||||
) -> Result<()> {
|
||||
let idf_path = idf_path.as_ref();
|
||||
let out_path = out_path.as_ref();
|
||||
|
||||
// We will put the date of generation in the file header:
|
||||
let date = chrono::Utc::now().date_naive();
|
||||
|
||||
// Determine the commit (short) hash of the HEAD commit in the
|
||||
// provided ESP-IDF repository:
|
||||
let output = Command::new("git")
|
||||
.args(["rev-parse", "HEAD"])
|
||||
.current_dir(idf_path)
|
||||
.output()?;
|
||||
let idf_hash = String::from_utf8_lossy(&output.stdout[0..=7]).to_string();
|
||||
|
||||
// Read the CSV file containing the eFuse field definitions:
|
||||
let csv_path = idf_path
|
||||
.join("components")
|
||||
.join("efuse")
|
||||
.join(chip.to_string())
|
||||
.join("esp_efuse_table.csv");
|
||||
|
||||
// Create the reader and writer from our source and destination file paths:
|
||||
let mut reader = csv::ReaderBuilder::new()
|
||||
.comment(Some(b'#'))
|
||||
.has_headers(false)
|
||||
.trim(csv::Trim::All)
|
||||
.from_path(csv_path)?;
|
||||
let mut writer = File::create(out_path)?;
|
||||
|
||||
// Write the header to the destination file:
|
||||
writeln!(
|
||||
writer,
|
||||
"{}",
|
||||
EFUSE_FIELDS_RS_HEADER
|
||||
.trim_start()
|
||||
.replace("$CHIP", chip.pretty_name())
|
||||
.replace("$DATE", &date.to_string())
|
||||
.replace("$HASH", &idf_hash)
|
||||
)?;
|
||||
|
||||
// Build a vector of parsed eFuse fields; we build this vector up first rather
|
||||
// than writing directly to the destination file, as we need to do some
|
||||
// pre-processing first:
|
||||
let mut fields = VecDeque::new();
|
||||
for result in reader.deserialize() {
|
||||
// We will print a warning and just ignore any fields which cannot be
|
||||
// successfull parsed:
|
||||
let mut efuse_field: EfuseField = match result {
|
||||
Ok(field) => field,
|
||||
Err(e) => {
|
||||
log::warn!("{e}");
|
||||
continue;
|
||||
}
|
||||
};
|
||||
|
||||
// Remove any comments from the eFuse field descriptions:
|
||||
efuse_field.description.truncate(
|
||||
if let Some((prefix, _comment)) = efuse_field.description.split_once('#') {
|
||||
prefix
|
||||
} else {
|
||||
&efuse_field.description
|
||||
}
|
||||
.trim_end()
|
||||
.len(),
|
||||
);
|
||||
|
||||
// Link to other eFuse fields in documentation, using code blocks:
|
||||
efuse_field.description = efuse_field
|
||||
.description
|
||||
.replace('[', "`[")
|
||||
.replace(']', "]`");
|
||||
|
||||
// Convert the eFuse field name into a valid Rust iddentifier:
|
||||
efuse_field.field_name = efuse_field.field_name.replace('.', "_");
|
||||
|
||||
// Replace any non-digit characters in the eFuse block:
|
||||
efuse_field.efuse_block = efuse_field
|
||||
.efuse_block
|
||||
.replace(|c: char| !c.is_ascii_digit(), "");
|
||||
|
||||
fields.push_back(efuse_field);
|
||||
}
|
||||
|
||||
// Now that we've parsed all eFuse field definitions, we can perform our
|
||||
// pre-processing; right now, this just means handling any multi-world
|
||||
// fields:
|
||||
let mut i = 0;
|
||||
while i < fields.len() {
|
||||
let field = fields[i].clone();
|
||||
|
||||
if field.field_name.is_empty() {
|
||||
let mut prev = fields[i - 1].clone();
|
||||
prev.bit_start = field.bit_start;
|
||||
prev.bit_count += field.bit_count;
|
||||
fields[i - 1] = prev;
|
||||
|
||||
fields.retain(|x| *x != field);
|
||||
} else {
|
||||
i += 1;
|
||||
}
|
||||
}
|
||||
|
||||
// Finally, write out each eFuse field definition to the destination file:
|
||||
while let Some(EfuseField {
|
||||
field_name,
|
||||
efuse_block,
|
||||
bit_start,
|
||||
bit_count,
|
||||
description,
|
||||
}) = fields.pop_front()
|
||||
{
|
||||
writeln!(writer, "/// {description}")?;
|
||||
writeln!(writer,
|
||||
"pub const {field_name}: EfuseField = EfuseField::new(EfuseBlock::Block{efuse_block}, {bit_start}, {bit_count});"
|
||||
)?;
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
// ----------------------------------------------------------------------------
|
||||
// Helper Functions
|
||||
|
||||
|
||||
@ -5,15 +5,15 @@ use std::{
|
||||
time::Instant,
|
||||
};
|
||||
|
||||
use anyhow::{bail, ensure, Context as _, Result};
|
||||
use anyhow::{Context as _, Result, bail, ensure};
|
||||
use clap::{Args, Parser};
|
||||
use esp_metadata::{Chip, Config};
|
||||
use strum::IntoEnumIterator;
|
||||
use xtask::{
|
||||
cargo::{CargoAction, CargoArgsBuilder},
|
||||
firmware::Metadata,
|
||||
Package,
|
||||
Version,
|
||||
cargo::{CargoAction, CargoArgsBuilder},
|
||||
firmware::Metadata,
|
||||
};
|
||||
|
||||
// ----------------------------------------------------------------------------
|
||||
@ -36,8 +36,6 @@ enum Cli {
|
||||
/// Format all packages in the workspace with rustfmt
|
||||
#[clap(alias = "format-packages")]
|
||||
FmtPackages(FmtPackagesArgs),
|
||||
/// Generate the eFuse fields source file from a CSV.
|
||||
GenerateEfuseFields(GenerateEfuseFieldsArgs),
|
||||
/// Lint all packages in the workspace with clippy
|
||||
LintPackages(LintPackagesArgs),
|
||||
/// Attempt to publish the specified package.
|
||||
@ -235,7 +233,6 @@ fn main() -> Result<()> {
|
||||
),
|
||||
Cli::BumpVersion(args) => bump_version(&workspace, args),
|
||||
Cli::FmtPackages(args) => fmt_packages(&workspace, args),
|
||||
Cli::GenerateEfuseFields(args) => generate_efuse_src(&workspace, args),
|
||||
Cli::LintPackages(args) => lint_packages(&workspace, args),
|
||||
Cli::Publish(args) => publish(&workspace, args),
|
||||
Cli::RunDocTests(args) => run_doc_tests(&workspace, args),
|
||||
@ -567,28 +564,6 @@ fn bump_version(workspace: &Path, args: BumpVersionArgs) -> Result<()> {
|
||||
Ok(())
|
||||
}
|
||||
|
||||
fn generate_efuse_src(workspace: &Path, args: GenerateEfuseFieldsArgs) -> Result<()> {
|
||||
let idf_path = args.idf_path.canonicalize()?;
|
||||
|
||||
// Build the path for the generated source file, for the specified chip:
|
||||
let esp_hal = workspace.join("esp-hal");
|
||||
let out_path = esp_hal
|
||||
.join("src")
|
||||
.join("soc")
|
||||
.join(args.chip.to_string())
|
||||
.join("efuse")
|
||||
.join("fields.rs");
|
||||
|
||||
// Generate the Rust source file from the CSV file, and write it out to
|
||||
// the appropriate path:
|
||||
xtask::generate_efuse_table(&args.chip, idf_path, out_path)?;
|
||||
|
||||
// Format the generated code:
|
||||
xtask::cargo::run(&["fmt".into()], &esp_hal)?;
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
fn fmt_packages(workspace: &Path, args: FmtPackagesArgs) -> Result<()> {
|
||||
let mut packages = args.packages;
|
||||
packages.sort();
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user