mirror of
https://github.com/esp-rs/esp-hal.git
synced 2025-09-28 04:40:52 +00:00
Move interrupt related bits out of lib.rs and into the interrupt module (#2613)
* move interrupt related bits out of lib.rs and into the interrupt module * changelog and migration guide * review
This commit is contained in:
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eec75c8f82
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7095576e6a
@ -36,6 +36,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- `TimerGroup` `Timer`s are now type erased (#2581)
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- PSRAM is now initialized automatically if `quad-psram` or `octal-psram` is enabled (#2546)
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- DMA channels are now available via the `Peripherals` struct, and have been renamed accordingly. (#2545)
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- Moved interrupt related items from lib.rs, moved to the `interrupt` module (#2613)
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### Fixed
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@ -184,3 +184,12 @@ Analogs of all traits from the above mentioned version are available in `embedde
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You might also want to check the full official `embedded-hal` migration guide:
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https://github.com/rust-embedded/embedded-hal/blob/master/docs/migrating-from-0.2-to-1.0.md
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## Interrupt related reshuffle
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```diff
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- use esp_hal::InterruptConfigurable;
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- use esp_hal::DEFAULT_INTERRUPT_HANDLER;
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+ use esp_hal::interrupt::InterruptConfigurable;
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+ use esp_hal::interrupt::DEFAULT_INTERRUPT_HANDLER;
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```
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@ -24,10 +24,9 @@
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//! - This driver has only blocking API
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use crate::{
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interrupt::InterruptHandler,
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interrupt::{InterruptConfigurable, InterruptHandler},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::{Interrupt, ASSIST_DEBUG},
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InterruptConfigurable,
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};
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/// The debug assist driver instance.
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@ -28,12 +28,11 @@
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use core::marker::PhantomData;
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use crate::{
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interrupt::InterruptHandler,
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interrupt::{InterruptConfigurable, InterruptHandler},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::{Interrupt, ECC},
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reg_access::{AlignmentHelper, SocDependentEndianess},
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system::{self, GenericPeripheralGuard},
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InterruptConfigurable,
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};
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/// The ECC Accelerator driver instance
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@ -62,7 +62,13 @@ use procmacros::ram;
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use crate::peripherals::gpio::{handle_rtcio, handle_rtcio_with_resistors};
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pub use crate::soc::gpio::*;
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use crate::{
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interrupt::{self, InterruptHandler, Priority},
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interrupt::{
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self,
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InterruptConfigurable,
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InterruptHandler,
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Priority,
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DEFAULT_INTERRUPT_HANDLER,
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},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::{
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gpio::{handle_gpio_input, handle_gpio_output, AnyPinInner},
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@ -71,8 +77,6 @@ use crate::{
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IO_MUX,
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},
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private::{self, Sealed},
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InterruptConfigurable,
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DEFAULT_INTERRUPT_HANDLER,
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};
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pub mod interconnect;
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@ -51,7 +51,7 @@ use crate::{
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asynch::AtomicWaker,
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clock::Clocks,
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gpio::{interconnect::PeripheralOutput, InputSignal, OutputSignal, Pull},
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interrupt::InterruptHandler,
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interrupt::{InterruptConfigurable, InterruptHandler},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::{
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i2c0::{RegisterBlock, COMD},
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@ -62,7 +62,6 @@ use crate::{
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Async,
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Blocking,
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Cpu,
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InterruptConfigurable,
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Mode,
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};
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@ -99,12 +99,11 @@ use crate::{
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WriteBuffer,
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},
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gpio::interconnect::PeripheralOutput,
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interrupt::InterruptHandler,
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interrupt::{InterruptConfigurable, InterruptHandler},
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peripheral::{Peripheral, PeripheralRef},
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system::PeripheralGuard,
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Async,
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Blocking,
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InterruptConfigurable,
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Mode,
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};
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@ -81,6 +81,38 @@ mod xtensa;
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pub mod software;
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#[cfg(xtensa)]
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#[no_mangle]
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extern "C" fn EspDefaultHandler(_level: u32, _interrupt: crate::peripherals::Interrupt) {
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panic!("Unhandled level {} interrupt: {:?}", _level, _interrupt);
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}
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#[cfg(riscv)]
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#[no_mangle]
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extern "C" fn EspDefaultHandler(_interrupt: crate::peripherals::Interrupt) {
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panic!("Unhandled interrupt: {:?}", _interrupt);
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}
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/// Default (unhandled) interrupt handler
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pub const DEFAULT_INTERRUPT_HANDLER: InterruptHandler = InterruptHandler::new(
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unsafe { core::mem::transmute::<*const (), extern "C" fn()>(EspDefaultHandler as *const ()) },
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Priority::min(),
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);
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/// Trait implemented by drivers which allow the user to set an
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/// [InterruptHandler]
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pub trait InterruptConfigurable: crate::private::Sealed {
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/// Set the interrupt handler
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///
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/// Note that this will replace any previously registered interrupt handler.
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/// Some peripherals offer a shared interrupt handler for multiple purposes.
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/// It's the users duty to honor this.
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///
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/// You can restore the default/unhandled interrupt handler by using
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/// [DEFAULT_INTERRUPT_HANDLER]
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fn set_interrupt_handler(&mut self, handler: InterruptHandler);
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}
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/// An interrupt handler
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#[cfg_attr(
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multi_core,
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@ -45,7 +45,7 @@
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//! }
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//! ```
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use crate::{interrupt::InterruptHandler, InterruptConfigurable};
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use crate::interrupt::{InterruptConfigurable, InterruptHandler};
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/// A software interrupt can be triggered by software.
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#[non_exhaustive]
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@ -12,7 +12,7 @@ use core::marker::PhantomData;
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use crate::{
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asynch::AtomicWaker,
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interrupt::InterruptHandler,
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interrupt::{InterruptConfigurable, InterruptHandler},
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lcd_cam::{cam::Cam, lcd::Lcd},
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macros::handler,
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peripheral::Peripheral,
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@ -21,7 +21,6 @@ use crate::{
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Async,
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Blocking,
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Cpu,
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InterruptConfigurable,
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};
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/// Represents a combined LCD and Camera interface.
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@ -261,18 +261,6 @@ pub mod trapframe {
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// be directly exposed.
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mod soc;
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#[cfg(xtensa)]
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#[no_mangle]
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extern "C" fn EspDefaultHandler(_level: u32, _interrupt: peripherals::Interrupt) {
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panic!("Unhandled level {} interrupt: {:?}", _level, _interrupt);
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}
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#[cfg(riscv)]
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#[no_mangle]
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extern "C" fn EspDefaultHandler(_interrupt: peripherals::Interrupt) {
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panic!("Unhandled interrupt: {:?}", _interrupt);
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}
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/// A marker trait for initializing drivers in a specific mode.
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pub trait Mode: crate::private::Sealed {}
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@ -442,26 +430,6 @@ fn raw_core() -> usize {
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(xtensa_lx::get_processor_id() & 0x2000) as usize
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}
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/// Default (unhandled) interrupt handler
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pub const DEFAULT_INTERRUPT_HANDLER: interrupt::InterruptHandler = interrupt::InterruptHandler::new(
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unsafe { core::mem::transmute::<*const (), extern "C" fn()>(EspDefaultHandler as *const ()) },
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crate::interrupt::Priority::min(),
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);
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/// Trait implemented by drivers which allow the user to set an
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/// [interrupt::InterruptHandler]
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pub trait InterruptConfigurable: private::Sealed {
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/// Set the interrupt handler
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///
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/// Note that this will replace any previously registered interrupt handler.
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/// Some peripherals offer a shared interrupt handler for multiple purposes.
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/// It's the users duty to honor this.
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///
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/// You can restore the default/unhandled interrupt handler by using
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/// [DEFAULT_INTERRUPT_HANDLER]
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fn set_interrupt_handler(&mut self, handler: interrupt::InterruptHandler);
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}
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#[cfg(riscv)]
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#[export_name = "hal_main"]
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fn hal_main(a0: usize, a1: usize, a2: usize) -> ! {
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@ -156,13 +156,12 @@ use crate::{
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interconnect::{InputConnection, OutputConnection, PeripheralInput, PeripheralOutput},
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NoPin,
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},
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interrupt::InterruptHandler,
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interrupt::{InterruptConfigurable, InterruptHandler},
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peripheral::{self, Peripheral},
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peripherals::{Interrupt, PARL_IO},
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system::{self, GenericPeripheralGuard},
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Async,
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Blocking,
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InterruptConfigurable,
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Mode,
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};
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@ -95,11 +95,10 @@
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use self::unit::Unit;
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use crate::{
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interrupt::{self, InterruptHandler},
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interrupt::{self, InterruptConfigurable, InterruptHandler},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::{self, Interrupt},
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system::GenericPeripheralGuard,
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InterruptConfigurable,
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};
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pub mod channel;
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pub use crate::timer::timg::TimerGroupInstance as _esp_hal_timer_timg_TimerGroupInstance;
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#[cfg(any(systimer, timg0, timg1))]
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pub use crate::timer::Timer as _esp_hal_timer_Timer;
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pub use crate::{clock::CpuClock, entry, macros::*, InterruptConfigurable};
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pub use crate::{clock::CpuClock, entry, interrupt::InterruptConfigurable, macros::*};
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}
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use crate::{
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asynch::AtomicWaker,
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gpio::interconnect::{PeripheralInput, PeripheralOutput},
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interrupt::InterruptConfigurable,
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macros::handler,
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peripheral::Peripheral,
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peripherals::Interrupt,
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@ -235,7 +236,6 @@ use crate::{
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system::{self, GenericPeripheralGuard},
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Async,
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Blocking,
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InterruptConfigurable,
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};
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/// Errors
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@ -24,14 +24,13 @@
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use core::{marker::PhantomData, ptr::copy_nonoverlapping};
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use crate::{
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interrupt::InterruptHandler,
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interrupt::{InterruptConfigurable, InterruptHandler},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::{Interrupt, RSA},
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system::{GenericPeripheralGuard, Peripheral as PeripheralEnable},
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Async,
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Blocking,
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Cpu,
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InterruptConfigurable,
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};
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#[cfg_attr(esp32s2, path = "esp32sX.rs")]
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//! # use esp_hal::rtc_cntl::Rtc;
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//! # use esp_hal::rtc_cntl::Rwdt;
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//! # use esp_hal::rtc_cntl::RwdtStage;
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//! # use crate::esp_hal::InterruptConfigurable;
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//! static RWDT: Mutex<RefCell<Option<Rwdt>>> = Mutex::new(RefCell::new(None));
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//!
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//! let mut delay = Delay::new();
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@ -126,12 +125,11 @@ use crate::peripherals::{LP_AON, LP_TIMER, LP_WDT};
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use crate::rtc_cntl::sleep::{RtcSleepConfig, WakeSource, WakeTriggers};
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use crate::{
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clock::Clock,
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interrupt::{self, InterruptHandler},
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interrupt::{self, InterruptConfigurable, InterruptHandler},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::Interrupt,
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reset::{SleepSource, WakeupReason},
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Cpu,
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InterruptConfigurable,
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};
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// only include sleep where it's been implemented
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#[cfg(any(esp32, esp32s3, esp32c3, esp32c6, esp32c2))]
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@ -102,7 +102,7 @@ impl<'d> Sha<'d> {
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impl crate::private::Sealed for Sha<'_> {}
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#[cfg(not(esp32))]
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impl crate::InterruptConfigurable for Sha<'_> {
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impl crate::interrupt::InterruptConfigurable for Sha<'_> {
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fn set_interrupt_handler(&mut self, handler: crate::interrupt::InterruptHandler) {
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for core in crate::Cpu::other() {
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crate::interrupt::disable(core, Interrupt::SHA);
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@ -825,9 +825,9 @@ mod dma {
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Rx,
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Tx,
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},
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interrupt::InterruptConfigurable,
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Async,
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Blocking,
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InterruptConfigurable,
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};
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/// A DMA capable SPI instance.
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@ -43,9 +43,8 @@
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use fugit::{ExtU64, Instant, MicrosDurationU64};
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use crate::{
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interrupt::InterruptHandler,
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interrupt::{InterruptConfigurable, InterruptHandler},
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peripheral::{Peripheral, PeripheralRef},
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InterruptConfigurable,
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};
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#[cfg(systimer)]
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@ -72,13 +72,12 @@ use super::Error;
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use crate::soc::constants::TIMG_DEFAULT_CLK_SRC;
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use crate::{
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clock::Clocks,
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interrupt::{self, InterruptHandler},
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interrupt::{self, InterruptConfigurable, InterruptHandler},
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peripheral::Peripheral,
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peripherals::{timg0::RegisterBlock, Interrupt, TIMG0},
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private::Sealed,
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sync::{lock, Lock},
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system::PeripheralClockControl,
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InterruptConfigurable,
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};
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const NUM_TIMG: usize = 1 + cfg!(timg1) as usize;
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@ -29,13 +29,13 @@ use core::marker::PhantomData;
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use crate::{
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gpio::TouchPin,
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interrupt::InterruptConfigurable,
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peripheral::{Peripheral, PeripheralRef},
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peripherals::{RTC_CNTL, SENS, TOUCH},
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private::{Internal, Sealed},
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rtc_cntl::Rtc,
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Async,
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Blocking,
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InterruptConfigurable,
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Mode,
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};
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OutputSignal,
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Pull,
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},
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interrupt::InterruptHandler,
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interrupt::{InterruptConfigurable, InterruptHandler},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::twai0::RegisterBlock,
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system::PeripheralGuard,
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twai::filter::SingleStandardFilter,
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Async,
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Blocking,
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InterruptConfigurable,
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};
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pub mod filter;
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@ -229,14 +229,13 @@ use crate::{
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OutputSignal,
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Pull,
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},
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interrupt::InterruptHandler,
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interrupt::{InterruptConfigurable, InterruptHandler},
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peripheral::{Peripheral, PeripheralRef},
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peripherals::{uart0::RegisterBlock, Interrupt},
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private::Internal,
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system::{PeripheralClockControl, PeripheralGuard},
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Async,
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Blocking,
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InterruptConfigurable,
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Mode,
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};
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@ -132,13 +132,13 @@ use procmacros::handler;
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use crate::{
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asynch::AtomicWaker,
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interrupt::InterruptConfigurable,
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peripheral::{Peripheral, PeripheralRef},
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peripherals::{usb_device::RegisterBlock, Interrupt, USB_DEVICE},
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system::PeripheralClockControl,
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Async,
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Blocking,
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Cpu,
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InterruptConfigurable,
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Mode,
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};
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|
@ -12,9 +12,9 @@ use critical_section::Mutex;
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use esp_hal::{
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delay::Delay,
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gpio::{AnyPin, Input, Io, Level, Output, Pin, Pull},
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interrupt::InterruptConfigurable,
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macros::handler,
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timer::timg::TimerGroup,
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InterruptConfigurable,
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};
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use hil_test as _;
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|
@ -14,9 +14,9 @@
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use embassy_time::{Duration, Timer};
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use esp_hal::{
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gpio::{AnyPin, Input, Io, Level, Output, Pull},
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interrupt::InterruptConfigurable,
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macros::handler,
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timer::timg::TimerGroup,
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InterruptConfigurable,
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};
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use hil_test as _;
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use portable_atomic::{AtomicUsize, Ordering};
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