From 718d228d3990a3aab6f317738855025ea7eb33f8 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?D=C3=A1niel=20Buga?= Date: Fri, 11 Apr 2025 16:06:55 +0200 Subject: [PATCH] Simplify GPIO macros with a new PAC (#3350) * Simplify gpio-related macros using PAC changes * Remove redundant bit clearing * Update PAC rev * Explain paste noise --- esp-hal/Cargo.toml | 14 +++--- esp-hal/src/soc/esp32/gpio.rs | 39 +++++++-------- esp-hal/src/soc/esp32s2/gpio.rs | 89 ++++++++++++++++----------------- esp-hal/src/soc/esp32s3/gpio.rs | 86 +++++++++++++++---------------- 4 files changed, 108 insertions(+), 120 deletions(-) diff --git a/esp-hal/Cargo.toml b/esp-hal/Cargo.toml index c022afe35..1ac883382 100644 --- a/esp-hal/Cargo.toml +++ b/esp-hal/Cargo.toml @@ -58,13 +58,13 @@ ufmt-write = "0.1.0" # IMPORTANT: # Each supported device MUST have its PAC included below along with a # corresponding feature. -esp32 = { version = "0.36.0", git = "https://github.com/esp-rs/esp-pacs", rev = "37684f3", features = ["critical-section", "rt"], optional = true } -esp32c2 = { version = "0.25.0", git = "https://github.com/esp-rs/esp-pacs", rev = "37684f3", features = ["critical-section", "rt"], optional = true } -esp32c3 = { version = "0.28.0", git = "https://github.com/esp-rs/esp-pacs", rev = "37684f3", features = ["critical-section", "rt"], optional = true } -esp32c6 = { version = "0.19.0", git = "https://github.com/esp-rs/esp-pacs", rev = "37684f3", features = ["critical-section", "rt"], optional = true } -esp32h2 = { version = "0.15.0", git = "https://github.com/esp-rs/esp-pacs", rev = "37684f3", features = ["critical-section", "rt"], optional = true } -esp32s2 = { version = "0.27.0", git = "https://github.com/esp-rs/esp-pacs", rev = "37684f3", features = ["critical-section", "rt"], optional = true } -esp32s3 = { version = "0.31.0", git = "https://github.com/esp-rs/esp-pacs", rev = "37684f3", features = ["critical-section", "rt"], optional = true } +esp32 = { version = "0.36.0", git = "https://github.com/esp-rs/esp-pacs", rev = "2964cc4", features = ["critical-section", "rt"], optional = true } +esp32c2 = { version = "0.25.0", git = "https://github.com/esp-rs/esp-pacs", rev = "2964cc4", features = ["critical-section", "rt"], optional = true } +esp32c3 = { version = "0.28.0", git = "https://github.com/esp-rs/esp-pacs", rev = "2964cc4", features = ["critical-section", "rt"], optional = true } +esp32c6 = { version = "0.19.0", git = "https://github.com/esp-rs/esp-pacs", rev = "2964cc4", features = ["critical-section", "rt"], optional = true } +esp32h2 = { version = "0.15.0", git = "https://github.com/esp-rs/esp-pacs", rev = "2964cc4", features = ["critical-section", "rt"], optional = true } +esp32s2 = { version = "0.27.0", git = "https://github.com/esp-rs/esp-pacs", rev = "2964cc4", features = ["critical-section", "rt"], optional = true } +esp32s3 = { version = "0.31.0", git = "https://github.com/esp-rs/esp-pacs", rev = "2964cc4", features = ["critical-section", "rt"], optional = true } [target.'cfg(target_arch = "riscv32")'.dependencies] riscv = { version = "0.12.1" } diff --git a/esp-hal/src/soc/esp32/gpio.rs b/esp-hal/src/soc/esp32/gpio.rs index ada8c0252..b21f20a16 100644 --- a/esp-hal/src/soc/esp32/gpio.rs +++ b/esp-hal/src/soc/esp32/gpio.rs @@ -582,9 +582,6 @@ macro_rules! rtcio_analog { use $crate::gpio::RtcPin; let rtcio = $crate::peripherals::RTC_IO::regs(); - // disable input - rtcio.$pin_reg.modify(|_,w| w.[<$prefix fun_ie>]().bit(false)); - // disable output rtcio.enable_w1tc().write(|w| unsafe { w.enable_w1tc().bits(1 << self.rtc_number()) }); @@ -736,24 +733,24 @@ macro_rules! touch { } rtcio_analog! { - (36, 0, sensor_pads(), sense1_, sense1_hold_force ) - (37, 1, sensor_pads(), sense2_, sense2_hold_force ) - (38, 2, sensor_pads(), sense3_, sense3_hold_force ) - (39, 3, sensor_pads(), sense4_, sense4_hold_force ) - (34, 4, adc_pad(), adc1_, adc1_hold_force ) - (35, 5, adc_pad(), adc2_, adc2_hold_force ) - (25, 6, pad_dac1(), "", pdac1_hold_force, true) - (26, 7, pad_dac2(), "", pdac2_hold_force, true) - (33, 8, xtal_32k_pad(), x32n_, x32n_hold_force, true) - (32, 9, xtal_32k_pad(), x32p_, x32p_hold_force, true) - (4, 10, touch_pad0(), "", touch_pad0_hold_force, true) - (0, 11, touch_pad1(), "", touch_pad1_hold_force, true) - (2, 12, touch_pad2(), "", touch_pad2_hold_force, true) - (15, 13, touch_pad3(), "", touch_pad3_hold_force, true) - (13, 14, touch_pad4(), "", touch_pad4_hold_force, true) - (12, 15, touch_pad5(), "", touch_pad5_hold_force, true) - (14, 16, touch_pad6(), "", touch_pad6_hold_force, true) - (27, 17, touch_pad7(), "", touch_pad7_hold_force, true) + (36, 0, sensor_pads(), sense1_, sense1 ) + (37, 1, sensor_pads(), sense2_, sense2 ) + (38, 2, sensor_pads(), sense3_, sense3 ) + (39, 3, sensor_pads(), sense4_, sense4 ) + (34, 4, adc_pad(), adc1_, adc1 ) + (35, 5, adc_pad(), adc2_, adc2 ) + (25, 6, pad_dac1(), "", pdac1, true) + (26, 7, pad_dac2(), "", pdac2, true) + (33, 8, xtal_32k_pad(), x32n_, x32n, true) + (32, 9, xtal_32k_pad(), x32p_, x32p, true) + (4, 10, touch_pad0(), "", touch_pad0, true) + (0, 11, touch_pad1(), "", touch_pad1, true) + (2, 12, touch_pad2(), "", touch_pad2, true) + (15, 13, touch_pad3(), "", touch_pad3, true) + (13, 14, touch_pad4(), "", touch_pad4, true) + (12, 15, touch_pad5(), "", touch_pad5, true) + (14, 16, touch_pad6(), "", touch_pad6, true) + (27, 17, touch_pad7(), "", touch_pad7, true) } touch! { diff --git a/esp-hal/src/soc/esp32s2/gpio.rs b/esp-hal/src/soc/esp32s2/gpio.rs index 40366610c..8cfcb2e50 100644 --- a/esp-hal/src/soc/esp32s2/gpio.rs +++ b/esp-hal/src/soc/esp32s2/gpio.rs @@ -318,9 +318,7 @@ pub enum OutputSignal { } macro_rules! rtcio_analog { - ( - $pin_num:expr, $pin_reg:expr, $prefix:pat, $hold:ident - ) => { + ($pin_num:expr, $pin_reg:expr, $hold:ident) => { paste::paste!{ impl $crate::gpio::RtcPin for $crate::peripherals::[]<'_> { fn rtc_number(&self) -> u8 { @@ -332,12 +330,13 @@ macro_rules! rtcio_analog { fn rtc_set_config(&self, input_enable: bool, mux: bool, func: $crate::gpio::RtcFunction) { enable_iomux_clk_gate(); - // disable input - $crate::peripherals::RTC_IO::regs() + // We need `paste` to rewrite something in each function, so that rustc + // doesn't trip over trying to substitute a partial expression as `$pin_reg` + $crate::peripherals::[]::regs() .$pin_reg.modify(|_,w| unsafe { - w.[<$prefix fun_ie>]().bit(input_enable); - w.[<$prefix mux_sel>]().bit(mux); - w.[<$prefix fun_sel>]().bits(func as u8) + w.fun_ie().bit(input_enable); + w.mux_sel().bit(mux); + w.fun_sel().bits(func as u8) }); } @@ -348,16 +347,15 @@ macro_rules! rtcio_analog { } } - impl $crate::gpio::RtcPinWithResistors for $crate::peripherals::[]<'_> - { + impl $crate::gpio::RtcPinWithResistors for $crate::peripherals::[]<'_> { fn rtcio_pullup(&self, enable: bool) { - $crate::peripherals::RTC_IO::regs() - .$pin_reg.modify(|_, w| w.[< $prefix rue >]().bit(enable)); + $crate::peripherals::[]::regs() + .$pin_reg.modify(|_, w| w.rue().bit(enable)); } fn rtcio_pulldown(&self, enable: bool) { - $crate::peripherals::RTC_IO::regs() - .$pin_reg.modify(|_, w| w.[< $prefix rde >]().bit(enable)); + $crate::peripherals::[]::regs() + .$pin_reg.modify(|_, w| w.rde().bit(enable)); } } @@ -367,10 +365,7 @@ macro_rules! rtcio_analog { use $crate::gpio::RtcPin; enable_iomux_clk_gate(); - let rtcio = $crate::peripherals::RTC_IO::regs(); - - // disable input - rtcio.$pin_reg.modify(|_,w| w.[<$prefix fun_ie>]().bit(false)); + let rtcio = $crate::peripherals::[]::regs(); // disable output rtcio.enable_w1tc().write(|w| unsafe { w.enable_w1tc().bits(1 << self.rtc_number()) }); @@ -379,17 +374,17 @@ macro_rules! rtcio_analog { rtcio.pin(self.rtc_number() as usize).modify(|_,w| w.pad_driver().bit(false)); rtcio.$pin_reg.modify(|_,w| { - w.[<$prefix fun_ie>]().clear_bit(); + w.fun_ie().clear_bit(); // Connect pin to analog / RTC module instead of standard GPIO - w.[<$prefix mux_sel>]().set_bit(); + w.mux_sel().set_bit(); // Select function "RTC function 1" (GPIO) for analog use - unsafe { w.[<$prefix fun_sel>]().bits(0b00) }; + unsafe { w.fun_sel().bits(0b00) }; // Disable pull-up and pull-down resistors on the pin - w.[<$prefix rue>]().bit(false); - w.[<$prefix rde>]().bit(false); + w.rue().bit(false); + w.rde().bit(false); w }); @@ -399,37 +394,37 @@ macro_rules! rtcio_analog { }; ( - $( ( $pin_num:expr, $pin_reg:expr, $prefix:pat, $hold:ident ) )+ + $( ( $pin_num:expr, $pin_reg:expr, $hold:ident ) )+ ) => { $( - rtcio_analog!($pin_num, $pin_reg, $prefix, $hold); + rtcio_analog!($pin_num, $pin_reg, $hold); )+ }; } rtcio_analog! { - ( 0, touch_pad(0), "", touch_pad0_hold ) - ( 1, touch_pad(1), "", touch_pad1_hold ) - ( 2, touch_pad(2), "", touch_pad2_hold ) - ( 3, touch_pad(3), "", touch_pad3_hold ) - ( 4, touch_pad(4), "", touch_pad4_hold ) - ( 5, touch_pad(5), "", touch_pad5_hold ) - ( 6, touch_pad(6), "", touch_pad6_hold ) - ( 7, touch_pad(7), "", touch_pad7_hold ) - ( 8, touch_pad(8), "", touch_pad8_hold ) - ( 9, touch_pad(9), "", touch_pad9_hold ) - (10, touch_pad(10), "", touch_pad10_hold) - (11, touch_pad(11), "", touch_pad11_hold) - (12, touch_pad(12), "", touch_pad12_hold) - (13, touch_pad(13), "", touch_pad13_hold) - (14, touch_pad(14), "", touch_pad14_hold) - (15, xtal_32p_pad(), x32p_, x32p_hold ) - (16, xtal_32n_pad(), x32n_, x32n_hold ) - (17, pad_dac1(), "", pdac1_hold ) - (18, pad_dac2(), "", pdac2_hold ) - (19, rtc_pad19(), "", pad19_hold ) - (20, rtc_pad20(), "", pad20_hold ) - (21, rtc_pad21(), "", pad21_hold ) + ( 0, touch_pad(0), touch_pad0 ) + ( 1, touch_pad(1), touch_pad1 ) + ( 2, touch_pad(2), touch_pad2 ) + ( 3, touch_pad(3), touch_pad3 ) + ( 4, touch_pad(4), touch_pad4 ) + ( 5, touch_pad(5), touch_pad5 ) + ( 6, touch_pad(6), touch_pad6 ) + ( 7, touch_pad(7), touch_pad7 ) + ( 8, touch_pad(8), touch_pad8 ) + ( 9, touch_pad(9), touch_pad9 ) + (10, touch_pad(10), touch_pad10) + (11, touch_pad(11), touch_pad11) + (12, touch_pad(12), touch_pad12) + (13, touch_pad(13), touch_pad13) + (14, touch_pad(14), touch_pad14) + (15, xtal_32p_pad(), x32p ) + (16, xtal_32n_pad(), x32n ) + (17, pad_dac1(), pdac1 ) + (18, pad_dac2(), pdac2 ) + (19, rtc_pad19(), pad19 ) + (20, rtc_pad20(), pad20 ) + (21, rtc_pad21(), pad21 ) } #[derive(Clone, Copy)] diff --git a/esp-hal/src/soc/esp32s3/gpio.rs b/esp-hal/src/soc/esp32s3/gpio.rs index 47ad847da..93f79b1ef 100644 --- a/esp-hal/src/soc/esp32s3/gpio.rs +++ b/esp-hal/src/soc/esp32s3/gpio.rs @@ -396,9 +396,7 @@ pub enum OutputSignal { } macro_rules! rtcio_analog { - ( - $pin_num:expr, $pin_reg:expr, $prefix:pat, $hold:ident - ) => { + ($pin_num:expr, $pin_reg:expr, $hold:ident) => { paste::paste! { impl $crate::gpio::RtcPin for $crate::peripherals::[]<'_> { fn rtc_number(&self) -> u8 { @@ -410,12 +408,13 @@ macro_rules! rtcio_analog { fn rtc_set_config(&self, input_enable: bool, mux: bool, func: $crate::gpio::RtcFunction) { enable_iomux_clk_gate(); - // disable input - $crate::peripherals::RTC_IO::regs() + // We need `paste` to rewrite something in each function, so that rustc + // doesn't trip over trying to substitute a partial expression as `$pin_reg` + $crate::peripherals::[]::regs() .$pin_reg.modify(|_,w| unsafe { - w.[<$prefix fun_ie>]().bit(input_enable); - w.[<$prefix mux_sel>]().bit(mux); - w.[<$prefix fun_sel>]().bits(func as u8) + w.fun_ie().bit(input_enable); + w.mux_sel().bit(mux); + w.fun_sel().bits(func as u8) }); } @@ -428,13 +427,13 @@ macro_rules! rtcio_analog { impl $crate::gpio::RtcPinWithResistors for $crate::peripherals::[]<'_> { fn rtcio_pullup(&self, enable: bool) { - $crate::peripherals::RTC_IO::regs() - .$pin_reg.modify(|_, w| w.[< $prefix rue >]().bit(enable)); + $crate::peripherals::[]::regs() + .$pin_reg.modify(|_, w| w.rue().bit(enable)); } fn rtcio_pulldown(&self, enable: bool) { - $crate::peripherals::RTC_IO::regs() - .$pin_reg.modify(|_, w| w.[< $prefix rde >]().bit(enable)); + $crate::peripherals::[]::regs() + .$pin_reg.modify(|_, w| w.rde().bit(enable)); } } @@ -444,10 +443,7 @@ macro_rules! rtcio_analog { use $crate::gpio::RtcPin; enable_iomux_clk_gate(); - let rtcio = $crate::peripherals::RTC_IO::regs(); - - // disable input - rtcio.$pin_reg.modify(|_,w| w.[<$prefix fun_ie>]().bit(false)); + let rtcio = $crate::peripherals::[]::regs(); // disable output rtcio.enable_w1tc().write(|w| unsafe { w.enable_w1tc().bits(1 << self.rtc_number()) }); @@ -456,17 +452,17 @@ macro_rules! rtcio_analog { rtcio.pin(self.rtc_number() as usize).modify(|_,w| w.pad_driver().bit(false)); rtcio.$pin_reg.modify(|_,w| { - w.[<$prefix fun_ie>]().clear_bit(); + w.fun_ie().clear_bit(); // Connect pin to analog / RTC module instead of standard GPIO - w.[<$prefix mux_sel>]().set_bit(); + w.mux_sel().set_bit(); // Select function "RTC function 1" (GPIO) for analog use - unsafe { w.[<$prefix fun_sel>]().bits(0b00) }; + unsafe { w.fun_sel().bits(0b00) }; // Disable pull-up and pull-down resistors on the pin - w.[<$prefix rue>]().bit(false); - w.[<$prefix rde>]().bit(false); + w.rue().bit(false); + w.rde().bit(false); w }); @@ -476,37 +472,37 @@ macro_rules! rtcio_analog { }; ( - $( ( $pin_num:expr, $pin_reg:expr, $prefix:pat, $hold:ident ) )+ + $( ( $pin_num:expr, $pin_reg:expr, $hold:ident ) )+ ) => { $( - rtcio_analog!($pin_num, $pin_reg, $prefix, $hold); + rtcio_analog!($pin_num, $pin_reg, $hold); )+ }; } rtcio_analog! { - ( 0, touch_pad(0), "", touch_pad0_hold ) - ( 1, touch_pad(1), "", touch_pad1_hold ) - ( 2, touch_pad(2), "", touch_pad2_hold ) - ( 3, touch_pad(3), "", touch_pad3_hold ) - ( 4, touch_pad(4), "", touch_pad4_hold ) - ( 5, touch_pad(5), "", touch_pad5_hold ) - ( 6, touch_pad(6), "", touch_pad6_hold ) - ( 7, touch_pad(7), "", touch_pad7_hold ) - ( 8, touch_pad(8), "", touch_pad8_hold ) - ( 9, touch_pad(9), "", touch_pad9_hold ) - (10, touch_pad(10), "", touch_pad10_hold) - (11, touch_pad(11), "", touch_pad11_hold) - (12, touch_pad(12), "", touch_pad12_hold) - (13, touch_pad(13), "", touch_pad13_hold) - (14, touch_pad(14), "", touch_pad14_hold) - (15, xtal_32p_pad(), x32p_, x32p_hold ) - (16, xtal_32n_pad(), x32n_, x32n_hold ) - (17, pad_dac1(), pdac1_, pdac1_hold ) - (18, pad_dac2(), pdac2_, pdac2_hold ) - (19, rtc_pad19(), "", pad19_hold ) - (20, rtc_pad20(), "", pad20_hold ) - (21, rtc_pad21(), "", pad21_hold ) + ( 0, touch_pad(0), touch_pad0 ) + ( 1, touch_pad(1), touch_pad1 ) + ( 2, touch_pad(2), touch_pad2 ) + ( 3, touch_pad(3), touch_pad3 ) + ( 4, touch_pad(4), touch_pad4 ) + ( 5, touch_pad(5), touch_pad5 ) + ( 6, touch_pad(6), touch_pad6 ) + ( 7, touch_pad(7), touch_pad7 ) + ( 8, touch_pad(8), touch_pad8 ) + ( 9, touch_pad(9), touch_pad9 ) + (10, touch_pad(10), touch_pad10) + (11, touch_pad(11), touch_pad11) + (12, touch_pad(12), touch_pad12) + (13, touch_pad(13), touch_pad13) + (14, touch_pad(14), touch_pad14) + (15, xtal_32p_pad(), x32p ) + (16, xtal_32n_pad(), x32n ) + (17, pad_dac1(), pdac1 ) + (18, pad_dac2(), pdac2 ) + (19, rtc_pad19(), pad19 ) + (20, rtc_pad20(), pad20 ) + (21, rtc_pad21(), pad21 ) } // Whilst the S3 is a dual core chip, it shares the enable registers between