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Spi master: remove public hidden APIs, add Config/apply_config (#2448)

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* Remove hidden public SPI API

* Fix in_progress flags not being set

* Remove redundant checks, fix full-duplex flag

* Remove now-redundant Send impl

* apply_config

* SetConfig

* Return ConfigError

* Unwrap config result in ctor
This commit is contained in:
Dániel Buga 2024-11-06 10:03:43 +01:00 committed by GitHub
parent eabb6fb1c6
commit 8860aba9b2
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GPG Key ID: B5690EEEBB952194
17 changed files with 668 additions and 537 deletions
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4
esp-hal/CHANGELOG.md
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@ -32,6 +32,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- `{Uart, UartRx, UartTx}::apply_config()` (#2449)
- `{Uart, UartRx, UartTx}` now implement `embassy_embedded_hal::SetConfig` (#2449)
- GPIO ETM tasks and events now accept `InputSignal` and `OutputSignal` (#2427)
- `spi::master::Config` and `{Spi, SpiDma, SpiDmaBus}::apply_config` (#2448)
- `embassy_embedded_hal::SetConfig` is now implemented for `{Spi, SpiDma, SpiDmaBus}` (#2448)
### Changed
@ -50,6 +52,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- The `rmt::asynch::RxChannelAsync` and `rmt::asynch::TxChannelAsync` traits have been moved to `rmt` (#2430)
- Calling `AnyPin::output_signals` on an input-only pin (ESP32 GPIO 34-39) will now result in a panic. (#2418)
- UART configuration types have been moved to `esp_hal::uart` (#2449)
- `spi::master::Spi::new()` no longer takes `frequency` and `mode` as a parameter. (#2448)
### Fixed
@ -85,6 +88,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- The `SysTimerEtm` prefix has been removed from `timer::systimer::etm` types (#2427)
- The `GpioEtmEventRising`, `GpioEtmEventFalling`, `GpioEtmEventAny` types have been replaced with `Event` (#2427)
- The `TaskSet`, `TaskClear`, `TaskToggle` types have been replaced with `Task` (#2427)
- `{Spi, SpiDma, SpiDmaBus}` configuration methods (#2448)
## [0.21.1]

26
esp-hal/MIGRATING-0.21.md
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@ -251,4 +251,28 @@ The module's contents have been moved into `uart`.
```
If you work with multiple configurable peripherals, you may want to import the `uart` module and
refer to the `Config` struct as `uart::Config`.
refer to the `Config` struct as `uart::Config`.
### SPI drivers can now be configured using `spi::master::Config`
- The old methods to change configuration have been removed.
- The `new` and `new_typed` constructor no longer takes `frequency` and `mode`.
- The default configuration is now:
- bus frequency: 1 MHz
- bit order: MSB first
- mode: SPI mode 0
- There are new constructors (`new_with_config`, `new_typed_with_config`) and a new `apply_config` method to apply custom configuration.
```diff
-use esp_hal::spi::{master::Spi, SpiMode};
+use esp_hal::spi::{master::{Config, Spi}, SpiMode};
-Spi::new(SPI2, 100.kHz(), SpiMode::Mode1);
+Spi::new_with_config(
+ SPI2,
+ Config {
+ frequency: 100.kHz(),
+ mode: SpiMode::Mode0,
+ ..Config::default()
+ },
+)
```

11
esp-hal/src/dma/mod.rs
View File

@ -19,7 +19,7 @@
#![doc = crate::before_snippet!()]
//! # use esp_hal::dma_buffers;
//! # use esp_hal::gpio::Io;
//! # use esp_hal::spi::{master::Spi, SpiMode};
//! # use esp_hal::spi::{master::{Config, Spi}, SpiMode};
//! # use esp_hal::dma::{Dma, DmaPriority};
//! let dma = Dma::new(peripherals.DMA);
#![cfg_attr(any(esp32, esp32s2), doc = "let dma_channel = dma.spi2channel;")]
@ -30,10 +30,13 @@
//! let mosi = io.pins.gpio4;
//! let cs = io.pins.gpio5;
//!
//! let mut spi = Spi::new(
//! let mut spi = Spi::new_with_config(
//! peripherals.SPI2,
//! 100.kHz(),
//! SpiMode::Mode0,
//! Config {
//! frequency: 100.kHz(),
//! mode: SpiMode::Mode0,
//! ..Config::default()
//! },
//! )
//! .with_sck(sclk)
//! .with_mosi(mosi)

821
esp-hal/src/spi/master.rs
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File diff suppressed because it is too large Load Diff

3
esp-hal/src/spi/slave.rs
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@ -31,7 +31,8 @@
//! let cs = io.pins.gpio3;
//!
//! let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) =
//! dma_buffers!(32000); let mut spi = Spi::new(
//! dma_buffers!(32000);
//! let mut spi = Spi::new(
//! peripherals.SPI2,
//! sclk,
//! mosi,

28
examples/src/bin/embassy_spi.rs
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@ -26,7 +26,10 @@ use esp_hal::{
dma_buffers,
gpio::Io,
prelude::*,
spi::{master::Spi, SpiMode},
spi::{
master::{Config, Spi},
SpiMode,
},
timer::timg::TimerGroup,
};
@ -58,14 +61,21 @@ async fn main(_spawner: Spawner) {
let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_cs(cs)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0))
.with_buffers(dma_rx_buf, dma_tx_buf)
.into_async();
let mut spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_cs(cs)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0))
.with_buffers(dma_rx_buf, dma_tx_buf)
.into_async();
let send_buffer = [0, 1, 2, 3, 4, 5, 6, 7];
loop {

25
examples/src/bin/qspi_flash.rs
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@ -35,7 +35,7 @@ use esp_hal::{
gpio::Io,
prelude::*,
spi::{
master::{Address, Command, Spi},
master::{Address, Command, Config, Spi},
SpiDataMode,
SpiMode,
},
@ -79,14 +79,21 @@ fn main() -> ! {
let mut dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
let mut dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_sio2(sio2)
.with_sio3(sio3)
.with_cs(cs)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
let mut spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_sio2(sio2)
.with_sio3(sio3)
.with_cs(cs)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
let delay = Delay::new();

23
examples/src/bin/spi_halfduplex_read_manufacturer_id.rs
View File

@ -33,7 +33,7 @@ use esp_hal::{
gpio::Io,
prelude::*,
spi::{
master::{Address, Command, Spi},
master::{Address, Command, Config, Spi},
SpiDataMode,
SpiMode,
},
@ -63,13 +63,20 @@ fn main() -> ! {
}
}
let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_sio2(sio2)
.with_sio3(sio3)
.with_cs(cs);
let mut spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_sio2(sio2)
.with_sio3(sio3)
.with_cs(cs);
let delay = Delay::new();

22
examples/src/bin/spi_loopback.rs
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@ -21,7 +21,10 @@ use esp_hal::{
gpio::Io,
peripheral::Peripheral,
prelude::*,
spi::{master::Spi, SpiMode},
spi::{
master::{Config, Spi},
SpiMode,
},
};
use esp_println::println;
@ -36,11 +39,18 @@ fn main() -> ! {
let miso = unsafe { miso_mosi.clone_unchecked() };
let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_sck(sclk)
.with_mosi(miso_mosi)
.with_miso(miso)
.with_cs(cs);
let mut spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_sck(sclk)
.with_mosi(miso_mosi)
.with_miso(miso)
.with_cs(cs);
let delay = Delay::new();

24
examples/src/bin/spi_loopback_dma.rs
View File

@ -25,7 +25,10 @@ use esp_hal::{
dma_buffers,
gpio::Io,
prelude::*,
spi::{master::Spi, SpiMode},
spi::{
master::{Config, Spi},
SpiMode,
},
};
use esp_println::println;
@ -53,12 +56,19 @@ fn main() -> ! {
let mut dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
let mut dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_cs(cs)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
let mut spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)
.with_cs(cs)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
let delay = Delay::new();

24
examples/src/bin/spi_loopback_dma_psram.rs
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@ -29,7 +29,10 @@ use esp_hal::{
gpio::Io,
peripheral::Peripheral,
prelude::*,
spi::{master::Spi, SpiMode},
spi::{
master::{Config, Spi},
SpiMode,
},
};
extern crate alloc;
use log::*;
@ -90,12 +93,19 @@ fn main() -> ! {
let mut dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
// Need to set miso first so that mosi can overwrite the
// output connection (because we are using the same pin to loop back)
let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_sck(sclk)
.with_miso(miso)
.with_mosi(mosi)
.with_cs(cs)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
let mut spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_sck(sclk)
.with_miso(miso)
.with_mosi(mosi)
.with_cs(cs)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
delay.delay_millis(100); // delay to let the above messages display

53
hil-test/tests/embassy_interrupt_spi_dma.rs
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@ -14,7 +14,7 @@ use esp_hal::{
interrupt::{software::SoftwareInterruptControl, Priority},
prelude::*,
spi::{
master::{Spi, SpiDma},
master::{Config, Spi, SpiDma},
SpiMode,
},
timer::AnyTimer,
@ -94,14 +94,28 @@ mod test {
let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
let mut spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_dma(dma_channel1.configure(false, DmaPriority::Priority0))
.with_buffers(dma_rx_buf, dma_tx_buf)
.into_async();
let mut spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_dma(dma_channel1.configure(false, DmaPriority::Priority0))
.with_buffers(dma_rx_buf, dma_tx_buf)
.into_async();
let spi2 = Spi::new(peripherals.SPI3, 100.kHz(), SpiMode::Mode0)
.with_dma(dma_channel2.configure(false, DmaPriority::Priority0))
.into_async();
let spi2 = Spi::new_with_config(
peripherals.SPI3,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_dma(dma_channel2.configure(false, DmaPriority::Priority0))
.into_async();
let sw_ints = SoftwareInterruptControl::new(peripherals.SW_INTERRUPT);
@ -156,14 +170,21 @@ mod test {
let dma_rx_buf = DmaRxBuf::new(rx_descriptors, rx_buffer).unwrap();
let dma_tx_buf = DmaTxBuf::new(tx_descriptors, tx_buffer).unwrap();
let mut spi = Spi::new(peripherals.spi, 100.kHz(), SpiMode::Mode0)
.with_dma(
peripherals
.dma_channel
.configure(false, DmaPriority::Priority0),
)
.with_buffers(dma_rx_buf, dma_tx_buf)
.into_async();
let mut spi = Spi::new_with_config(
peripherals.spi,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_dma(
peripherals
.dma_channel
.configure(false, DmaPriority::Priority0),
)
.with_buffers(dma_rx_buf, dma_tx_buf)
.into_async();
let send_buffer = mk_static!([u8; BUFFER_SIZE], [0u8; BUFFER_SIZE]);
loop {

59
hil-test/tests/qspi.rs
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@ -13,7 +13,7 @@ use esp_hal::{
gpio::{AnyPin, Input, Io, Level, Output, Pull},
prelude::*,
spi::{
master::{Address, Command, Spi, SpiDma},
master::{Address, Command, Config, Spi, SpiDma},
SpiDataMode,
SpiMode,
},
@ -40,7 +40,7 @@ cfg_if::cfg_if! {
type SpiUnderTest = SpiDma<'static, Blocking>;
struct Context {
spi: esp_hal::peripherals::SPI2,
spi: Spi<'static, Blocking>,
#[cfg(pcnt)]
pcnt: esp_hal::peripherals::PCNT,
dma_channel: Channel<'static, DmaChannel0, Blocking>,
@ -205,9 +205,17 @@ mod tests {
}
let dma_channel = dma_channel.configure(false, DmaPriority::Priority0);
let spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
);
Context {
spi: peripherals.SPI2,
spi,
#[cfg(pcnt)]
pcnt: peripherals.PCNT,
dma_channel,
@ -225,9 +233,7 @@ mod tests {
let [pin, pin_mirror, _] = ctx.gpios;
let pin_mirror = Output::new(pin_mirror, Level::High);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
.with_mosi(pin)
.with_dma(ctx.dma_channel);
let spi = ctx.spi.with_mosi(pin).with_dma(ctx.dma_channel);
super::execute_read(spi, pin_mirror, 0b0001_0001);
}
@ -238,9 +244,7 @@ mod tests {
let [pin, pin_mirror, _] = ctx.gpios;
let pin_mirror = Output::new(pin_mirror, Level::High);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
.with_miso(pin)
.with_dma(ctx.dma_channel);
let spi = ctx.spi.with_miso(pin).with_dma(ctx.dma_channel);
super::execute_read(spi, pin_mirror, 0b0010_0010);
}
@ -251,9 +255,7 @@ mod tests {
let [pin, pin_mirror, _] = ctx.gpios;
let pin_mirror = Output::new(pin_mirror, Level::High);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
.with_sio2(pin)
.with_dma(ctx.dma_channel);
let spi = ctx.spi.with_sio2(pin).with_dma(ctx.dma_channel);
super::execute_read(spi, pin_mirror, 0b0100_0100);
}
@ -264,9 +266,7 @@ mod tests {
let [pin, pin_mirror, _] = ctx.gpios;
let pin_mirror = Output::new(pin_mirror, Level::High);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
.with_sio3(pin)
.with_dma(ctx.dma_channel);
let spi = ctx.spi.with_sio3(pin).with_dma(ctx.dma_channel);
super::execute_read(spi, pin_mirror, 0b1000_1000);
}
@ -277,9 +277,7 @@ mod tests {
let [pin, pin_mirror, _] = ctx.gpios;
let pin_mirror = Output::new(pin_mirror, Level::High);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
.with_mosi(pin)
.with_dma(ctx.dma_channel);
let spi = ctx.spi.with_mosi(pin).with_dma(ctx.dma_channel);
super::execute_write_read(spi, pin_mirror, 0b0001_0001);
}
@ -290,9 +288,7 @@ mod tests {
let [pin, pin_mirror, _] = ctx.gpios;
let pin_mirror = Output::new(pin_mirror, Level::High);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
.with_miso(pin)
.with_dma(ctx.dma_channel);
let spi = ctx.spi.with_miso(pin).with_dma(ctx.dma_channel);
super::execute_write_read(spi, pin_mirror, 0b0010_0010);
}
@ -303,9 +299,7 @@ mod tests {
let [pin, pin_mirror, _] = ctx.gpios;
let pin_mirror = Output::new(pin_mirror, Level::High);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
.with_sio2(pin)
.with_dma(ctx.dma_channel);
let spi = ctx.spi.with_sio2(pin).with_dma(ctx.dma_channel);
super::execute_write_read(spi, pin_mirror, 0b0100_0100);
}
@ -316,9 +310,7 @@ mod tests {
let [pin, pin_mirror, _] = ctx.gpios;
let pin_mirror = Output::new(pin_mirror, Level::High);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
.with_sio3(pin)
.with_dma(ctx.dma_channel);
let spi = ctx.spi.with_sio3(pin).with_dma(ctx.dma_channel);
super::execute_write_read(spi, pin_mirror, 0b1000_1000);
}
@ -342,9 +334,7 @@ mod tests {
.channel0
.set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
.with_mosi(mosi)
.with_dma(ctx.dma_channel);
let spi = ctx.spi.with_mosi(mosi).with_dma(ctx.dma_channel);
super::execute_write(unit0, unit1, spi, 0b0000_0001, false);
}
@ -374,7 +364,8 @@ mod tests {
.channel0
.set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
let spi = ctx
.spi
.with_mosi(mosi)
.with_miso(gpio)
.with_dma(ctx.dma_channel);
@ -407,7 +398,8 @@ mod tests {
.channel0
.set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
let spi = ctx
.spi
.with_mosi(mosi)
.with_sio2(gpio)
.with_dma(ctx.dma_channel);
@ -440,7 +432,8 @@ mod tests {
.channel0
.set_input_mode(EdgeMode::Hold, EdgeMode::Increment);
let spi = Spi::new(ctx.spi, 100.kHz(), SpiMode::Mode0)
let spi = ctx
.spi
.with_mosi(mosi)
.with_sio3(gpio)
.with_dma(ctx.dma_channel);

31
hil-test/tests/spi_full_duplex.rs
View File

@ -17,7 +17,7 @@ use esp_hal::{
gpio::{Io, Level, NoPin},
peripheral::Peripheral,
prelude::*,
spi::{master::Spi, SpiMode},
spi::master::{Config, Spi},
Blocking,
};
#[cfg(pcnt)]
@ -76,10 +76,16 @@ mod tests {
let (mosi_loopback_pcnt, mosi) = mosi.split();
// Need to set miso first so that mosi can overwrite the
// output connection (because we are using the same pin to loop back)
let spi = Spi::new(peripherals.SPI2, 10000.kHz(), SpiMode::Mode0)
.with_sck(sclk)
.with_miso(unsafe { mosi.clone_unchecked() })
.with_mosi(mosi);
let spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 10.MHz(),
..Config::default()
},
)
.with_sck(sclk)
.with_miso(unsafe { mosi.clone_unchecked() })
.with_mosi(mosi);
let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(32000);
@ -491,7 +497,10 @@ mod tests {
// Slow down. At 80kHz, the transfer is supposed to take a bit over 3 seconds.
// This means that without working cancellation, the test case should
// fail.
ctx.spi.change_bus_frequency(80.kHz());
ctx.spi.apply_config(&Config {
frequency: 80.kHz(),
..Config::default()
});
// Set up a large buffer that would trigger a timeout
let dma_rx_buf = DmaRxBuf::new(ctx.rx_descriptors, ctx.rx_buffer).unwrap();
@ -514,7 +523,10 @@ mod tests {
#[timeout(3)]
fn can_transmit_after_cancel(mut ctx: Context) {
// Slow down. At 80kHz, the transfer is supposed to take a bit over 3 seconds.
ctx.spi.change_bus_frequency(80.kHz());
ctx.spi.apply_config(&Config {
frequency: 80.kHz(),
..Config::default()
});
// Set up a large buffer that would trigger a timeout
let mut dma_rx_buf = DmaRxBuf::new(ctx.rx_descriptors, ctx.rx_buffer).unwrap();
@ -532,7 +544,10 @@ mod tests {
transfer.cancel();
(spi, (dma_rx_buf, dma_tx_buf)) = transfer.wait();
spi.change_bus_frequency(10000.kHz());
spi.apply_config(&Config {
frequency: 10.MHz(),
..Config::default()
});
let transfer = spi
.transfer(dma_rx_buf, dma_tx_buf)

17
hil-test/tests/spi_half_duplex_read.rs
View File

@ -11,7 +11,7 @@ use esp_hal::{
gpio::{Io, Level, Output},
prelude::*,
spi::{
master::{Address, Command, Spi, SpiDma},
master::{Address, Command, Config, Spi, SpiDma},
SpiDataMode,
SpiMode,
},
@ -49,10 +49,17 @@ mod tests {
}
}
let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_sck(sclk)
.with_miso(miso)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
let spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_sck(sclk)
.with_miso(miso)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
Context { spi, miso_mirror }
}

17
hil-test/tests/spi_half_duplex_write.rs
View File

@ -12,7 +12,7 @@ use esp_hal::{
pcnt::{channel::EdgeMode, unit::Unit, Pcnt},
prelude::*,
spi::{
master::{Address, Command, Spi, SpiDma},
master::{Address, Command, Config, Spi, SpiDma},
SpiDataMode,
SpiMode,
},
@ -52,10 +52,17 @@ mod tests {
let (mosi_loopback, mosi) = mosi.split();
let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_sck(sclk)
.with_mosi(mosi)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
let spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_sck(sclk)
.with_mosi(mosi)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
Context {
spi,

17
hil-test/tests/spi_half_duplex_write_psram.rs
View File

@ -14,7 +14,7 @@ use esp_hal::{
pcnt::{channel::EdgeMode, unit::Unit, Pcnt},
prelude::*,
spi::{
master::{Address, Command, Spi, SpiDma},
master::{Address, Command, Config, Spi, SpiDma},
SpiDataMode,
SpiMode,
},
@ -64,10 +64,17 @@ mod tests {
let (mosi_loopback, mosi) = mosi.split();
let spi = Spi::new(peripherals.SPI2, 100.kHz(), SpiMode::Mode0)
.with_sck(sclk)
.with_mosi(mosi)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
let spi = Spi::new_with_config(
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
..Config::default()
},
)
.with_sck(sclk)
.with_mosi(mosi)
.with_dma(dma_channel.configure(false, DmaPriority::Priority0));
Context {
spi,