From 8fb9fbddd5399fa6b203ed90bdd4b5088d3535c3 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Bj=C3=B6rn=20Quentin?= Date: Tue, 14 Jan 2025 09:57:05 +0100 Subject: [PATCH] ESP32-S3: Fix PSRAM start address calculation (#2880) * ESP32-S3: Fix PSRAM start address calculation * Change code for clarity * Explain * Link to esp-idf docs --- esp-hal/src/soc/esp32s3/psram.rs | 16 +++++++++++----- 1 file changed, 11 insertions(+), 5 deletions(-) diff --git a/esp-hal/src/soc/esp32s3/psram.rs b/esp-hal/src/soc/esp32s3/psram.rs index a801343bc..a00dfc7db 100644 --- a/esp-hal/src/soc/esp32s3/psram.rs +++ b/esp-hal/src/soc/esp32s3/psram.rs @@ -169,15 +169,21 @@ pub(crate) fn init_psram(config: PsramConfig) { const DR_REG_MMU_TABLE: u32 = 0x600C5000; // calculate the PSRAM start address to map - let mut start = EXTMEM_ORIGIN; + // the linker scripts can produce a gap between mapped IROM and DROM segments + // bigger than a flash page - i.e. we will see an unmapped memory slot + // start from the end and find the last mapped flash page + // + // More general information about the MMU can be found here: + // https://docs.espressif.com/projects/esp-idf/en/stable/esp32s3/api-reference/system/mm.html#introduction let mmu_table_ptr = DR_REG_MMU_TABLE as *const u32; - for i in 0..FLASH_MMU_TABLE_SIZE { + let mut mapped_pages = 0; + for i in (0..FLASH_MMU_TABLE_SIZE).rev() { if mmu_table_ptr.add(i).read_volatile() != MMU_INVALID { - start += MMU_PAGE_SIZE; - } else { + mapped_pages = (i + 1) as u32; break; } } + let start = EXTMEM_ORIGIN + (MMU_PAGE_SIZE * mapped_pages); debug!("PSRAM start address = {:x}", start); // Configure the mode of instruction cache : cache size, cache line size. @@ -187,7 +193,7 @@ pub(crate) fn init_psram(config: PsramConfig) { CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE, ); - // If we need use SPIRAM, we should use data cache.Connfigure the mode of data : + // If we need use SPIRAM, we should use data cache.Configure the mode of data : // cache size, cache line size. Cache_Suspend_DCache();