From 9ab751f55fc2521aa663087a71300001fd536bef Mon Sep 17 00:00:00 2001 From: Sergio Gasquez Arcos Date: Mon, 20 Jan 2025 17:03:32 +0100 Subject: [PATCH] Update I2C module documentation (#3000) * feat: Avoid raw md link * docs: Improve i2c master docs * fix: Typo Co-authored-by: Juraj Sadel --------- Co-authored-by: Juraj Sadel --- esp-hal/src/i2c/master/mod.rs | 14 +++++++++++--- esp-hal/src/i2c/mod.rs | 3 +++ 2 files changed, 14 insertions(+), 3 deletions(-) diff --git a/esp-hal/src/i2c/master/mod.rs b/esp-hal/src/i2c/master/mod.rs index be4456d03..affab0d4e 100644 --- a/esp-hal/src/i2c/master/mod.rs +++ b/esp-hal/src/i2c/master/mod.rs @@ -1,9 +1,16 @@ //! # Inter-Integrated Circuit (I2C) - Master mode //! +//! ## Overview +//! +//! In this mode, the I2C acts as master and initiates the I2C communication by +//! generating a START condition. Note that only one master is allowed to occupy +//! the bus to access one slave at the same time. +//! //! ## Configuration //! -//! Each I2C controller is individually configurable, and the usual setting -//! such as frequency, timeout, and SDA/SCL pins can easily be configured. +//! Each I2C Master controller is individually configurable, and the usual +//! setting such as frequency, timeout, and SDA/SCL pins can easily be +//! configured. //! //! ## Usage //! @@ -35,7 +42,8 @@ //! } //! # } //! ``` -//! [`embedded-hal`]: https://docs.rs/embedded-hal/latest/embedded_hal/index.html +//! +//! [`embedded-hal`]:embedded_hal use core::marker::PhantomData; #[cfg(not(esp32))] diff --git a/esp-hal/src/i2c/mod.rs b/esp-hal/src/i2c/mod.rs index ec19dba62..6a4f55669 100644 --- a/esp-hal/src/i2c/mod.rs +++ b/esp-hal/src/i2c/mod.rs @@ -4,6 +4,9 @@ //! protocol that allows co-existence of multiple masters and slaves on the //! same bus. I2C uses two bidirectional open-drain lines: serial data line //! (SDA) and serial clock line (SCL), pulled up by resistors. +//! +//! For more information, see +#![doc = crate::trm_markdown_link!("i2c")] pub mod master;