Hopefully innocent I2C-related cleanups (#3460)

* Simplify test

* Clean up

esp-hal/src/i2c/master/mod.rs

@@ -54,19 +54,8 @@ use crate::{
     time::Rate,
 };
 
-cfg_if::cfg_if! {
+const I2C_LL_INTR_MASK: u32 = if cfg!(esp32s2) { 0x1ffff } else { 0x3ffff };
-    if #[cfg(esp32s2)] {
+const I2C_FIFO_SIZE: usize = if cfg!(esp32c2) { 16 } else { 32 };
-        const I2C_LL_INTR_MASK: u32 = 0x1ffff;
-    } else {
-        const I2C_LL_INTR_MASK: u32 = 0x3ffff;
-    }
-}
-
-#[cfg(not(esp32c2))]
-const I2C_FIFO_SIZE: usize = 32;
-
-#[cfg(esp32c2)]
-const I2C_FIFO_SIZE: usize = 16;
 
 // Chunk writes/reads by this size
 const I2C_CHUNK_SIZE: usize = I2C_FIFO_SIZE - 1;
@@ -145,14 +134,15 @@ pub enum BusTimeout {
 impl BusTimeout {
     fn cycles(&self) -> u32 {
         match self {
-            #[cfg(esp32)]
+            BusTimeout::Maximum => {
-            BusTimeout::Maximum => 0xF_FFFF,
+                if cfg!(esp32) {
-
+                    0xF_FFFF
-            #[cfg(esp32s2)]
+                } else if cfg!(esp32s2) {
-            BusTimeout::Maximum => 0xFF_FFFF,
+                    0xFF_FFFF
-
+                } else {
-            #[cfg(not(any(esp32, esp32s2)))]
+                    0x1F
-            BusTimeout::Maximum => 0x1F,
+                }
+            }
 
             #[cfg(not(any(esp32, esp32s2)))]
             BusTimeout::Disabled => 1,
@@ -707,9 +697,10 @@ impl<'a> I2cFuture<'a> {
             w.time_out().set_bit();
             w.nack().set_bit();
             #[cfg(not(any(esp32, esp32s2)))]
-            w.scl_main_st_to().set_bit();
+            {
-            #[cfg(not(any(esp32, esp32s2)))]
+                w.scl_main_st_to().set_bit();
-            w.scl_st_to().set_bit();
+                w.scl_st_to().set_bit();
+            }
 
             w
         });
@@ -746,13 +737,13 @@ impl<'a> I2cFuture<'a> {
         }
 
         #[cfg(not(any(esp32, esp32s2)))]
-        if r.scl_st_to().bit_is_set() {
+        {
-            return Err(Error::Timeout);
+            if r.scl_st_to().bit_is_set() {
-        }
+                return Err(Error::Timeout);
-
+            }
-        #[cfg(not(any(esp32, esp32s2)))]
+            if r.scl_main_st_to().bit_is_set() {
-        if r.scl_main_st_to().bit_is_set() {
+                return Err(Error::Timeout);
-            return Err(Error::Timeout);
+            }
         }
 
         #[cfg(not(esp32))]
@@ -1115,22 +1106,7 @@ impl embedded_hal_async::i2c::I2c for I2c<'_, Async> {
 }
 
 fn async_handler(info: &Info, state: &State) {
-    let regs = info.regs();
+    info.regs().int_ena().write(|w| unsafe { w.bits(0) });
-    regs.int_ena().modify(|_, w| {
-        w.end_detect().clear_bit();
-        w.trans_complete().clear_bit();
-        w.arbitration_lost().clear_bit();
-        w.time_out().clear_bit();
-        #[cfg(not(esp32))]
-        w.scl_main_st_to().clear_bit();
-        #[cfg(not(esp32))]
-        w.scl_st_to().clear_bit();
-
-        #[cfg(not(any(esp32, esp32s2)))]
-        w.txfifo_wm().clear_bit();
-
-        w.nack().clear_bit()
-    });
 
     state.waker.wake();
 }

hil-test/tests/i2c.rs

@@ -69,23 +69,16 @@ mod tests {
     fn empty_write_returns_ack_error_for_unknown_address(mut ctx: Context) {
         // on some chips we can determine the ack-check-failed reason but not on all
         // chips
-        cfg_if::cfg_if! {
+        let reason = if cfg!(any(esp32, esp32s2, esp32c2, esp32c3)) {
-            if #[cfg(any(esp32,esp32s2,esp32c2,esp32c3))] {
+            AcknowledgeCheckFailedReason::Unknown
-                assert_eq!(
+        } else {
-                    ctx.i2c.write(NON_EXISTENT_ADDRESS, &[]),
+            AcknowledgeCheckFailedReason::Address
-                    Err(Error::AcknowledgeCheckFailed(
+        };
-                        AcknowledgeCheckFailedReason::Unknown
+
-                    ))
+        assert_eq!(
-                );
+            ctx.i2c.write(NON_EXISTENT_ADDRESS, &[]),
-            } else {
+            Err(Error::AcknowledgeCheckFailed(reason))
-                assert_eq!(
+        );
-                    ctx.i2c.write(NON_EXISTENT_ADDRESS, &[]),
-                    Err(Error::AcknowledgeCheckFailed(
-                        AcknowledgeCheckFailedReason::Address
-                    ))
-                );
-            }
-        }
 
         assert_eq!(ctx.i2c.write(DUT_ADDRESS, &[]), Ok(()));
     }
@@ -129,23 +122,14 @@ mod tests {
 
         // on some chips we can determine the ack-check-failed reason but not on all
         // chips
-        cfg_if::cfg_if! {
+        let reason = if cfg!(any(esp32, esp32s2, esp32c2, esp32c3)) {
-            if #[cfg(any(esp32,esp32s2,esp32c2,esp32c3))] {
+            AcknowledgeCheckFailedReason::Unknown
-                assert_eq!(
+        } else {
-                    i2c.write_async(NON_EXISTENT_ADDRESS, &[]).await,
+            AcknowledgeCheckFailedReason::Address
-                    Err(Error::AcknowledgeCheckFailed(
+        };
-                        AcknowledgeCheckFailedReason::Unknown
+
-                    ))
+        let should_fail = i2c.write_async(NON_EXISTENT_ADDRESS, &[]).await;
-                );
+        assert_eq!(should_fail, Err(Error::AcknowledgeCheckFailed(reason)));
-            } else {
-                assert_eq!(
-                    i2c.write_async(NON_EXISTENT_ADDRESS, &[]).await,
-                    Err(Error::AcknowledgeCheckFailed(
-                        AcknowledgeCheckFailedReason::Address
-                    ))
-                );
-            }
-        }
 
         assert_eq!(i2c.write_async(DUT_ADDRESS, &[]).await, Ok(()));
     }