From 9d5fb31c4bb6e92180b97d4c8d4424cda2195600 Mon Sep 17 00:00:00 2001 From: Dominic Fischer <14130965+Dominaezzz@users.noreply.github.com> Date: Tue, 25 Jun 2024 14:01:40 +0100 Subject: [PATCH] TIMG: Fix interrupt handler setup (#1715) Co-authored-by: Dominic Fischer --- esp-hal/CHANGELOG.md | 2 + esp-hal/src/timer/systimer.rs | 2 +- esp-hal/src/timer/timg.rs | 87 ++++++++++++----------------- examples/src/bin/etm_timer.rs | 2 +- examples/src/bin/timer_interrupt.rs | 2 +- 5 files changed, 41 insertions(+), 54 deletions(-) diff --git a/esp-hal/CHANGELOG.md b/esp-hal/CHANGELOG.md index 1fec21c8c..9b31e0faf 100644 --- a/esp-hal/CHANGELOG.md +++ b/esp-hal/CHANGELOG.md @@ -19,6 +19,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ### Fixed +- TIMG: Fix interrupt handler setup (#1714) + ### Changed - Refactor `Dac1`/`Dac2` drivers into a single `Dac` driver (#1661) diff --git a/esp-hal/src/timer/systimer.rs b/esp-hal/src/timer/systimer.rs index 2271e94e0..85ed77df5 100644 --- a/esp-hal/src/timer/systimer.rs +++ b/esp-hal/src/timer/systimer.rs @@ -32,7 +32,7 @@ //! peripherals.TIMG0, //! &clocks, //! Some(TimerInterrupts { -//! timer0_t0: Some(tg0_t0_level), +//! timer0: Some(tg0_t0_level), //! ..Default::default() //! }), //! ); diff --git a/esp-hal/src/timer/timg.rs b/esp-hal/src/timer/timg.rs index abeb0eaf6..1853d8d1c 100644 --- a/esp-hal/src/timer/timg.rs +++ b/esp-hal/src/timer/timg.rs @@ -85,21 +85,13 @@ use crate::{ /// Interrupts which can be registered in [Blocking] mode #[derive(Debug, Default)] pub struct TimerInterrupts { - /// T0 Interrupt for [`Timer0`] - pub timer0_t0: Option, - /// T1 Interrupt for [`Timer0`] - pub timer0_t1: Option, - /// WDT Interrupt for [`Timer0`] - pub timer0_wdt: Option, - /// T0 Interrupt for [`Timer1`] + /// Interrupt for [`Timer0`] + pub timer0: Option, #[cfg(timg_timer1)] - pub timer1_t0: Option, - /// T1 Interrupt for [`Timer1`] - #[cfg(timg_timer1)] - pub timer1_t1: Option, - /// WDT Interrupt for [`Timer1`] - #[cfg(timg_timer1)] - pub timer1_wdt: Option, + /// Interrupt for [`Timer1`] + pub timer1: Option, + /// WDT Interrupt + pub wdt: Option, } /// A timer group consisting of up to 2 timers (chip dependent) and a watchdog @@ -274,50 +266,43 @@ where ); if let Some(isr) = isr { - if let Some(handler) = isr.timer0_t0 { + if let Some(handler) = isr.timer0 { + let interrupt = match T::id() { + 0 => Interrupt::TG0_T0_LEVEL, + #[cfg(timg1)] + 1 => Interrupt::TG1_T0_LEVEL, + _ => unreachable!(), + }; unsafe { - interrupt::bind_interrupt(Interrupt::TG0_T0_LEVEL, handler.handler()); - interrupt::enable(Interrupt::TG0_T0_LEVEL, handler.priority()).unwrap(); - } - } - - #[cfg(any(esp32, esp32s2, esp32s3))] - if let Some(handler) = isr.timer0_t1 { - unsafe { - interrupt::bind_interrupt(Interrupt::TG0_T1_LEVEL, handler.handler()); - interrupt::enable(Interrupt::TG0_T1_LEVEL, handler.priority()).unwrap(); - } - } - - if let Some(handler) = isr.timer0_wdt { - unsafe { - interrupt::bind_interrupt(Interrupt::TG0_WDT_LEVEL, handler.handler()); - interrupt::enable(Interrupt::TG0_WDT_LEVEL, handler.priority()).unwrap(); + interrupt::bind_interrupt(interrupt, handler.handler()); + interrupt::enable(interrupt, handler.priority()).unwrap(); } } #[cfg(timg_timer1)] - { - if let Some(handler) = isr.timer1_t0 { - unsafe { - interrupt::bind_interrupt(Interrupt::TG1_T0_LEVEL, handler.handler()); - interrupt::enable(Interrupt::TG1_T0_LEVEL, handler.priority()).unwrap(); - } + if let Some(handler) = isr.timer1 { + let interrupt = match T::id() { + 0 => Interrupt::TG0_T1_LEVEL, + #[cfg(timg1)] + 1 => Interrupt::TG1_T1_LEVEL, + _ => unreachable!(), + }; + unsafe { + interrupt::bind_interrupt(interrupt, handler.handler()); + interrupt::enable(interrupt, handler.priority()).unwrap(); } + } - #[cfg(any(esp32, esp32s2, esp32s3))] - if let Some(handler) = isr.timer1_t1 { - unsafe { - interrupt::bind_interrupt(Interrupt::TG1_T1_LEVEL, handler.handler()); - interrupt::enable(Interrupt::TG1_T1_LEVEL, handler.priority()).unwrap(); - } - } - - if let Some(handler) = isr.timer1_wdt { - unsafe { - interrupt::bind_interrupt(Interrupt::TG1_WDT_LEVEL, handler.handler()); - interrupt::enable(Interrupt::TG1_WDT_LEVEL, handler.priority()).unwrap(); - } + if let Some(handler) = isr.wdt { + let interrupt = match T::id() { + 0 => Interrupt::TG0_WDT_LEVEL, + #[cfg(timg1)] + 1 => Interrupt::TG1_WDT_LEVEL, + _ => unreachable!(), + }; + unsafe { + interrupt::bind_interrupt(interrupt, handler.handler()); + interrupt::enable(interrupt, handler.priority()).unwrap(); } } } diff --git a/examples/src/bin/etm_timer.rs b/examples/src/bin/etm_timer.rs index 046878b69..560c2bdc7 100644 --- a/examples/src/bin/etm_timer.rs +++ b/examples/src/bin/etm_timer.rs @@ -39,7 +39,7 @@ fn main() -> ! { peripherals.TIMG0, &clocks, Some(TimerInterrupts { - timer0_t0: Some(tg0_t0_level), + timer0: Some(tg0_t0_level), ..Default::default() }), ); diff --git a/examples/src/bin/timer_interrupt.rs b/examples/src/bin/timer_interrupt.rs index 1c78624df..5248a3092 100644 --- a/examples/src/bin/timer_interrupt.rs +++ b/examples/src/bin/timer_interrupt.rs @@ -33,7 +33,7 @@ fn main() -> ! { peripherals.TIMG0, &clocks, Some(TimerInterrupts { - timer0_t0: Some(tg0_t0_level), + timer0: Some(tg0_t0_level), ..Default::default() }), );