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rtc: Add RWDT examples for ESP32, ESP32-S2 and ESP32-S3
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
This commit is contained in:
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66
esp32-hal/examples/rtc_watchdog.rs
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66
esp32-hal/examples/rtc_watchdog.rs
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@ -0,0 +1,66 @@
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//! This demos the RTC Watchdog Timer (RWDT).
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//! The RWDT is initially configured to trigger an interrupt after a given
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//! timeout. Then, upon expiration, the RWDT is restarted and then reconfigured
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//! to reset both the main system and the RTC.
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#![no_std]
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#![no_main]
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use core::cell::RefCell;
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use esp32_hal::{
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clock::ClockControl,
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interrupt,
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pac::{self, Peripherals},
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prelude::*,
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Rtc,
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Rwdt,
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};
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use panic_halt as _;
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use xtensa_lx::mutex::{CriticalSectionMutex, Mutex};
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use xtensa_lx_rt::entry;
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static mut RWDT: CriticalSectionMutex<RefCell<Option<Rwdt>>> =
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CriticalSectionMutex::new(RefCell::new(None));
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.DPORT.split();
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let _clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut rtc = Rtc::new(peripherals.RTC_CNTL);
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// Disable watchdog timer
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rtc.rwdt.disable();
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rtc.rwdt.start(2000u64.millis());
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rtc.rwdt.listen();
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interrupt::enable(pac::Interrupt::RTC_CORE, interrupt::Priority::Priority1).unwrap();
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unsafe {
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(&RWDT).lock(|data| (*data).replace(Some(rtc.rwdt)));
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}
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loop {}
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}
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#[interrupt]
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fn RTC_CORE() {
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unsafe {
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(&RWDT).lock(|data| {
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esp_println::println!("RWDT Interrupt");
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let mut rwdt = data.borrow_mut();
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let rwdt = rwdt.as_mut().unwrap();
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rwdt.clear_interrupt();
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esp_println::println!("Restarting in 5 seconds...");
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rwdt.start(5000u64.millis());
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rwdt.unlisten();
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});
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}
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}
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@ -22,6 +22,7 @@ pub use esp_hal_common::{
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PulseControl,
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Rng,
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Rtc,
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Rwdt,
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Serial,
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};
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@ -15,9 +15,8 @@ use esp32c3_hal::{
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interrupt,
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pac::{self, Peripherals},
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prelude::*,
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Rtc,
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Rtc, Rwdt,
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};
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use esp_hal_common::Rwdt;
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use panic_halt as _;
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use riscv_rt::entry;
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@ -4,28 +4,8 @@ use core::arch::global_asm;
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pub use embedded_hal as ehal;
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pub use esp_hal_common::{
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clock,
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efuse,
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gpio as gpio_types,
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i2c,
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interrupt,
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ledc,
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macros,
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pac,
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prelude,
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pulse_control,
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serial,
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spi,
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system,
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systimer,
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timer,
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utils,
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Cpu,
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Delay,
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PulseControl,
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Rng,
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Rtc,
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Serial,
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clock, efuse, gpio as gpio_types, i2c, interrupt, ledc, macros, pac, prelude, pulse_control,
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serial, spi, system, systimer, timer, utils, Cpu, Delay, PulseControl, Rng, Rtc, Rwdt, Serial,
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UsbSerialJtag,
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};
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#[cfg(feature = "direct-boot")]
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66
esp32s2-hal/examples/rtc_watchdog.rs
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66
esp32s2-hal/examples/rtc_watchdog.rs
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@ -0,0 +1,66 @@
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//! This demos the RTC Watchdog Timer (RWDT).
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//! The RWDT is initially configured to trigger an interrupt after a given
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//! timeout. Then, upon expiration, the RWDT is restarted and then reconfigured
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//! to reset both the main system and the RTC.
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#![no_std]
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#![no_main]
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use core::cell::RefCell;
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use esp32s2_hal::{
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clock::ClockControl,
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interrupt,
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pac::{self, Peripherals},
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prelude::*,
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Rtc,
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Rwdt,
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};
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use panic_halt as _;
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use xtensa_lx::mutex::{CriticalSectionMutex, Mutex};
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use xtensa_lx_rt::entry;
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static mut RWDT: CriticalSectionMutex<RefCell<Option<Rwdt>>> =
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CriticalSectionMutex::new(RefCell::new(None));
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.SYSTEM.split();
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let _clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut rtc = Rtc::new(peripherals.RTC_CNTL);
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// Disable watchdog timer
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rtc.rwdt.disable();
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rtc.rwdt.start(2000u64.millis());
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rtc.rwdt.listen();
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interrupt::enable(pac::Interrupt::RTC_CORE, interrupt::Priority::Priority1).unwrap();
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unsafe {
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(&RWDT).lock(|data| (*data).replace(Some(rtc.rwdt)));
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}
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loop {}
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}
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#[interrupt]
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fn RTC_CORE() {
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unsafe {
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(&RWDT).lock(|data| {
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esp_println::println!("RWDT Interrupt");
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let mut rwdt = data.borrow_mut();
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let rwdt = rwdt.as_mut().unwrap();
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rwdt.clear_interrupt();
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esp_println::println!("Restarting in 5 seconds...");
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rwdt.start(5000u64.millis());
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rwdt.unlisten();
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});
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}
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}
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@ -22,6 +22,7 @@ pub use esp_hal_common::{
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PulseControl,
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Rng,
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Rtc,
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Rwdt,
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Serial,
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};
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67
esp32s3-hal/examples/rtc_watchdog.rs
Normal file
67
esp32s3-hal/examples/rtc_watchdog.rs
Normal file
@ -0,0 +1,67 @@
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//! This demos the RTC Watchdog Timer (RWDT).
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//! The RWDT is initially configured to trigger an interrupt after a given
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//! timeout. Then, upon expiration, the RWDT is restarted and then reconfigured
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//! to reset both the main system and the RTC.
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#![no_std]
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#![no_main]
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use core::cell::RefCell;
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use esp32s3_hal::{
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clock::ClockControl,
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interrupt,
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pac::{self, Peripherals},
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prelude::*,
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Rtc,
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Rwdt,
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};
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use panic_halt as _;
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use xtensa_lx::mutex::{CriticalSectionMutex, Mutex};
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use xtensa_lx_rt::entry;
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static mut RWDT: CriticalSectionMutex<RefCell<Option<Rwdt>>> =
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CriticalSectionMutex::new(RefCell::new(None));
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take().unwrap();
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let system = peripherals.SYSTEM.split();
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let _clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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let mut rtc = Rtc::new(peripherals.RTC_CNTL);
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// Disable watchdog timers
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rtc.swd.disable();
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rtc.rwdt.disable();
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rtc.rwdt.start(2000u64.millis());
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rtc.rwdt.listen();
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interrupt::enable(pac::Interrupt::RTC_CORE, interrupt::Priority::Priority1).unwrap();
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unsafe {
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(&RWDT).lock(|data| (*data).replace(Some(rtc.rwdt)));
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}
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loop {}
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}
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#[interrupt]
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fn RTC_CORE() {
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unsafe {
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(&RWDT).lock(|data| {
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esp_println::println!("RWDT Interrupt");
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let mut rwdt = data.borrow_mut();
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let rwdt = rwdt.as_mut().unwrap();
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rwdt.clear_interrupt();
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esp_println::println!("Restarting in 5 seconds...");
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rwdt.start(5000u64.millis());
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rwdt.unlisten();
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});
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}
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}
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@ -26,6 +26,7 @@ pub use esp_hal_common::{
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PulseControl,
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Rng,
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Rtc,
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Rwdt,
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Serial,
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UsbSerialJtag,
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};
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