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RISC-V: Fix interrupt stack alignment (#2425)

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Björn Quentin 2024-10-29 12:45:30 +01:00 committed by GitHub
parent 8a23dbe1b6
commit b7224ef4c9
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1 changed files with 3 additions and 3 deletions
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esp-riscv-rt/src/lib.rs
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@ -721,12 +721,12 @@ r#"
"#,
// store current priority, set threshold, enable interrupts
r#"
addi sp, sp, -4 #build stack
addi sp, sp, -16 #build stack
sw ra, 0(sp)
jal ra, _handle_priority
lw ra, 0(sp)
sw a0, 0(sp) #reuse old stack, a0 is return of _handle_priority
addi a0, sp, 4 #the proper stack pointer is an argument to the HAL handler
addi a0, sp, 16 #the proper stack pointer is an argument to the HAL handler
"#,
// jump to handler loaded in direct handler
r#"
@ -736,7 +736,7 @@ r#"
r#"
lw a0, 0(sp) #load stored priority
jal ra, _restore_priority
addi sp, sp, 4 #pop
addi sp, sp, 16 #pop
"#,
r#"
lw t1, 31*4(sp)