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Add additional public functions to esp-lp-hal
for Delay and UART, deny missing documentation (#1789)
* Add `Delay.delay_millis` function * Provide basic UART functionality without requiring `embedded-hal`/`embedded-io` traits * Deny missing documentation * Update `CHANGELOG.md`
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@ -19,6 +19,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- Add `wake_hp_core` for ESP32-C6 (#1723)
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- Implement `embedded-hal@1.x.x` traits by default instead of `embedded-hal@0.2.x` (#1754)
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- Implement `embedded-hal-nb` and `embedded-io` traits for UART driver (#1754)
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- Add `Delay.delay_millis` function (#1789)
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- Make some UART functions public, allowing it to be used without `embedded-hal`/`embedded-io` traits (#1789)
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### Changed
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@ -8,7 +8,7 @@
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//! ## Examples
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//!
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//! ```rust
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//! esp_lp_hal::delay::Delay.delay_micros(500);
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//! esp_lp_hal::delay::Delay.delay_millis(500);
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//! ```
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/// Delay driver
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@ -16,6 +16,20 @@
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pub struct Delay;
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impl Delay {
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/// Delay for at least the number of specific milliseconds.
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pub fn delay_millis(&self, mut ms: u32) {
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const MICROS_PER_MILLI: u32 = 1_000;
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const MAX_MILLIS: u32 = u32::MAX / MICROS_PER_MILLI;
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// Avoid potential overflow if milli -> micro conversion is too large
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while ms > MAX_MILLIS {
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ms -= MAX_MILLIS;
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self.delay_micros(MAX_MILLIS * MICROS_PER_MILLI);
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}
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self.delay_micros(ms * MICROS_PER_MILLI);
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}
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/// Delay for at least the number of specific microseconds.
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pub fn delay_micros(&self, mut us: u32) {
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const NANOS_PER_MICRO: u32 = 1_000;
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@ -80,7 +94,7 @@ impl embedded_hal_02::blocking::delay::DelayUs<u32> for Delay {
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impl embedded_hal_02::blocking::delay::DelayMs<u32> for Delay {
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#[inline(always)]
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fn delay_ms(&mut self, ms: u32) {
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self.delay_micros(ms * 1000);
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self.delay_millis(ms);
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}
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}
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@ -21,7 +21,9 @@ pub unsafe fn conjure() -> LpI2c {
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}
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}
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// TODO: Document enum variants
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/// I2C-specific transmission errors
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#[allow(missing_docs)]
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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pub enum Error {
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ExceedingFifo,
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@ -179,6 +181,7 @@ impl CommandRegister {
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// Configure LP_EXT_I2C_CK_EN high to enable the clock source of I2C_SCLK.
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// Adjust the timing registers accordingly when the clock frequency changes.
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/// LP-I2C driver
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pub struct LpI2c {
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i2c: LP_I2C0,
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}
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@ -11,6 +11,7 @@
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#![doc = document_features::document_features!()]
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#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
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#![allow(asm_sub_register)]
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#![deny(missing_docs)]
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#![no_std]
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use core::arch::global_asm;
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@ -168,7 +168,8 @@ pub struct LpUart {
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}
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impl LpUart {
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fn read_byte(&mut self) -> nb::Result<u8, Error> {
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/// Read a single byte from the UART in a non-blocking manner.
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pub fn read_byte(&mut self) -> nb::Result<u8, Error> {
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if self.get_rx_fifo_count() > 0 {
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let byte = self.uart.fifo().read().rxfifo_rd_byte().bits();
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Ok(byte)
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@ -177,7 +178,8 @@ impl LpUart {
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}
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}
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fn write_byte(&mut self, byte: u8) -> nb::Result<(), Error> {
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/// Write a single byte to the UART in a non-blocking manner.
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pub fn write_byte(&mut self, byte: u8) -> nb::Result<(), Error> {
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if self.get_tx_fifo_count() < UART_FIFO_SIZE {
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self.uart
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.fifo()
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@ -188,7 +190,9 @@ impl LpUart {
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}
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}
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fn write_bytes(&mut self, data: &[u8]) -> Result<usize, Error> {
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/// Write one or more byte to the UART, blocking until the write has
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/// completed.
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pub fn write_bytes(&mut self, data: &[u8]) -> Result<usize, Error> {
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let count = data.len();
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data.iter()
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@ -197,7 +201,8 @@ impl LpUart {
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Ok(count)
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}
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fn flush_tx(&mut self) -> nb::Result<(), Error> {
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/// Flush the UART's transmit buffer in a non-blocking manner.
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pub fn flush_tx(&mut self) -> nb::Result<(), Error> {
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if self.is_tx_idle() {
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Ok(())
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} else {
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