mirror of
https://github.com/esp-rs/esp-hal.git
synced 2025-09-27 12:20:56 +00:00
Include ROM API symbols (#2374)
* Include ROM API symbols * Fixes and CHANGELOG.md * Fix * Move migration steps to the right crate's migration guide * Remove `-Trom_functions.x` where necessary
This commit is contained in:
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8
esp-hal/ld/README.md
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8
esp-hal/ld/README.md
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@ -0,0 +1,8 @@
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# ROM functions
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Files in the `rom` subdirectories are taken from esp-idf
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- DON'T include any `*newlib*` functions
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- systimer, wdt and mbedtls shouldn't be included
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- make sure to align the version you take the files from with esp-wifi-sys - NEVER randomly sync the files with other versions
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- some additional functions are needed from ROM - see `additional.ld` (these are usually defined in the `*newlib*` files)
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@ -1,34 +1,9 @@
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PROVIDE(ets_delay_us = 0x40008534);
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PROVIDE(ets_update_cpu_frequency_rom = 0x40008550);
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PROVIDE(rom_i2c_writeReg = 0x400041a4);
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PROVIDE(rom_i2c_writeReg_Mask = 0x400041fc);
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PROVIDE(rtc_get_reset_reason = 0x400081d4);
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PROVIDE(software_reset = 0x4000824c);
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PROVIDE(software_reset_cpu = 0x40008264);
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INCLUDE "rom/esp32.rom.api.ld"
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INCLUDE "rom/esp32.rom.eco3.ld"
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INCLUDE "rom/esp32.rom.ld"
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INCLUDE "rom/esp32.rom.libgcc.ld"
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INCLUDE "rom/esp32.rom.redefined.ld"
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INCLUDE "rom/esp32.rom.spiflash_legacy.ld"
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INCLUDE "rom/esp32.rom.syscalls.ld"
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PROVIDE ( ets_efuse_get_spiconfig = 0x40008658 );
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PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
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PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
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PROVIDE ( gpio_matrix_out = 0x40009f0c );
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PROVIDE ( gpio_matrix_in = 0x40009edc );
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PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
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PROVIDE ( esp_rom_spiflash_config_clk = 0x40062bc8 );
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PROVIDE ( g_rom_spiflash_dummy_len_plus = 0x3ffae290 );
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PROVIDE ( g_rom_flashchip = 0x3ffae270 );
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PROVIDE ( cache_sram_mmu_set_rom = 0x400097f4 );
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PROVIDE (esp_rom_crc32_be = 0x4005d024);
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PROVIDE (esp_rom_crc16_be = 0x4005d09c);
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PROVIDE (esp_rom_crc8_be = 0x4005d114);
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PROVIDE (esp_rom_crc32_le = 0x4005cfec);
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PROVIDE (esp_rom_crc16_le = 0x4005d05c);
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PROVIDE (esp_rom_crc8_le = 0x4005d0e0);
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PROVIDE (esp_rom_md5_init = 0x4005da7c);
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PROVIDE (esp_rom_md5_update = 0x4005da9c);
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PROVIDE (esp_rom_md5_final = 0x4005db1c);
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memcmp = 0x4000c260;
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memcpy = 0x4000c2c8;
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memmove = 0x4000c3c0;
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memset = 0x4000c44c;
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INCLUDE "rom/additional.ld"
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11
esp-hal/ld/esp32/rom/additional.ld
Normal file
11
esp-hal/ld/esp32/rom/additional.ld
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memcmp = 0x4000c260;
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memcpy = 0x4000c2c8;
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memmove = 0x4000c3c0;
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memset = 0x4000c44c;
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PROVIDE ( strcpy = 0x400013ac );
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PROVIDE ( abs = 0x40056340 );
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PROVIDE ( strncpy = 0x400015d4 );
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PROVIDE ( strncmp = 0x4000c5f4 );
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PROVIDE ( bzero = 0x4000c1f4 );
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62
esp-hal/ld/esp32/rom/esp32.rom.api.ld
Normal file
62
esp-hal/ld/esp32/rom/esp32.rom.api.ld
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/**
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* ROM APIs
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*/
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PROVIDE ( esp_rom_crc32_le = crc32_le );
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PROVIDE ( esp_rom_crc16_le = crc16_le );
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PROVIDE ( esp_rom_crc8_le = crc8_le );
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PROVIDE ( esp_rom_crc32_be = crc32_be );
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PROVIDE ( esp_rom_crc16_be = crc16_be );
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PROVIDE ( esp_rom_crc8_be = crc8_be );
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PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
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PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
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PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
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PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
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PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
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PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
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PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
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PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
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PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
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PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
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PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
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PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
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PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
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PROVIDE ( esp_rom_uart_rx_string = UartRxString );
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PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
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PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
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PROVIDE ( esp_rom_uart_switch_buffer = uart_buff_switch );
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PROVIDE ( esp_rom_output_flush_tx = uart_tx_flush );
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PROVIDE ( esp_rom_output_tx_one_char = uart_tx_one_char );
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PROVIDE ( esp_rom_output_tx_wait_idle = uart_tx_wait_idle );
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PROVIDE ( esp_rom_output_rx_one_char = uart_rx_one_char );
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PROVIDE ( esp_rom_output_rx_string = UartRxString );
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PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
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PROVIDE ( esp_rom_output_putc = ets_write_char_uart );
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PROVIDE ( esp_rom_output_switch_buffer = uart_buff_switch );
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/* wpa_supplicant re-implements the MD5 functions: MD5Init, MD5Update, MD5Final */
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/* so here we directly assign the symbols with the ROM API address */
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PROVIDE ( esp_rom_md5_init = 0x4005da7c );
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PROVIDE ( esp_rom_md5_update = 0x4005da9c );
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PROVIDE ( esp_rom_md5_final = 0x4005db1c );
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PROVIDE ( esp_rom_software_reset_system = software_reset );
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PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
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PROVIDE ( esp_rom_printf = ets_printf );
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PROVIDE ( esp_rom_delay_us = ets_delay_us );
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PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
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PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
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PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
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PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
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PROVIDE ( esp_rom_spiflash_set_bp = esp_rom_spiflash_lock );
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PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
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PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
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PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
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PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
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PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );
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10
esp-hal/ld/esp32/rom/esp32.rom.eco3.ld
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10
esp-hal/ld/esp32/rom/esp32.rom.eco3.ld
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/*
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ESP32 ECO3 ROM address table
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Secure Boot Version 2 API's imported from the ROM
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*/
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PROVIDE ( ets_secure_boot_verify_signature = 0x4006543c);
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PROVIDE ( ets_secure_boot_verify_boot_bootloader = 0x400655ec);
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PROVIDE ( ets_use_secure_boot_v2 = 0x4000f8d4);
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PROVIDE ( ets_rsa_pss_verify = 0x40065310);
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PROVIDE ( ets_mgf1_sha256 = 0x400651a8);
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PROVIDE ( ets_emsa_pss_verify = 0x4006520c);
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1635
esp-hal/ld/esp32/rom/esp32.rom.ld
Normal file
1635
esp-hal/ld/esp32/rom/esp32.rom.ld
Normal file
File diff suppressed because it is too large
Load Diff
94
esp-hal/ld/esp32/rom/esp32.rom.libgcc.ld
Normal file
94
esp-hal/ld/esp32/rom/esp32.rom.libgcc.ld
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/* Unlike other ROM functions which are exported using PROVIDE, which declares
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weak symbols, these libgcc functions are exported using assignment,
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which declares strong symbols. This is done so that ROM functions are always
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used instead of the ones provided by libgcc.a.
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*/
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__absvdi2 = 0x4006387c;
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__absvsi2 = 0x40063868;
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__adddf3 = 0x40002590;
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__addsf3 = 0x400020e8;
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__addvdi3 = 0x40002cbc;
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__addvsi3 = 0x40002c98;
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__ashldi3 = 0x4000c818;
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__ashrdi3 = 0x4000c830;
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__bswapdi2 = 0x40064b08;
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__bswapsi2 = 0x40064ae0;
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__clrsbdi2 = 0x40064b7c;
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__clrsbsi2 = 0x40064b64;
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__clzdi2 = 0x4000ca50;
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__clzsi2 = 0x4000c7e8;
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__cmpdi2 = 0x40063820;
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__ctzdi2 = 0x4000ca64;
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__ctzsi2 = 0x4000c7f0;
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__divdc3 = 0x400645a4;
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__divdf3 = 0x40002954;
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__divdi3 = 0x4000ca84;
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__divsi3 = 0x4000c7b8;
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__eqdf2 = 0x400636a8;
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__eqsf2 = 0x40063374;
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__extendsfdf2 = 0x40002c34;
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__ffsdi2 = 0x4000ca2c;
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__ffssi2 = 0x4000c804;
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__fixdfdi = 0x40002ac4;
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__fixdfsi = 0x40002a78;
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__fixsfdi = 0x4000244c;
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__fixsfsi = 0x4000240c;
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__fixunsdfsi = 0x40002b30;
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__fixunssfdi = 0x40002504;
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__fixunssfsi = 0x400024ac;
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__floatdidf = 0x4000c988;
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__floatdisf = 0x4000c8c0;
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__floatsidf = 0x4000c944;
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__floatsisf = 0x4000c870;
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__floatundidf = 0x4000c978;
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__floatundisf = 0x4000c8b0;
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__floatunsidf = 0x4000c938;
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__floatunsisf = 0x4000c864;
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__gcc_bcmp = 0x40064a70;
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__gedf2 = 0x40063768;
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__gesf2 = 0x4006340c;
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__gtdf2 = 0x400636dc;
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__gtsf2 = 0x400633a0;
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__ledf2 = 0x40063704;
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__lesf2 = 0x400633c0;
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__lshrdi3 = 0x4000c84c;
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__ltdf2 = 0x40063790;
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__ltsf2 = 0x4006342c;
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__moddi3 = 0x4000cd4c;
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__modsi3 = 0x4000c7c0;
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__muldc3 = 0x40063c90;
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__muldf3 = 0x4006358c;
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__muldi3 = 0x4000c9fc;
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__mulsf3 = 0x400632c8;
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__mulsi3 = 0x4000c7b0;
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__mulvdi3 = 0x40002d78;
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__mulvsi3 = 0x40002d60;
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__nedf2 = 0x400636a8;
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__negdf2 = 0x400634a0;
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__negdi2 = 0x4000ca14;
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__negsf2 = 0x400020c0;
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__negvdi2 = 0x40002e98;
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__negvsi2 = 0x40002e78;
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__nesf2 = 0x40063374;
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__nsau_data = 0x3ff96544;
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__paritysi2 = 0x40002f3c;
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__popcount_tab = 0x3ff96544;
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__popcountdi2 = 0x40002ef8;
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__popcountsi2 = 0x40002ed0;
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__powidf2 = 0x400638e4;
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__subdf3 = 0x400026e4;
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__subsf3 = 0x400021d0;
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__subvdi3 = 0x40002d20;
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__subvsi3 = 0x40002cf8;
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__truncdfsf2 = 0x40002b90;
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__ucmpdi2 = 0x40063840;
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__udiv_w_sdiv = 0x40064bec;
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__udivdi3 = 0x4000cff8;
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__udivmoddi4 = 0x40064bf4;
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__udivsi3 = 0x4000c7c8;
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__umoddi3 = 0x4000d280;
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__umodsi3 = 0x4000c7d0;
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__umulsidi3 = 0x4000c7d8;
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__unorddf2 = 0x400637f4;
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__unordsf2 = 0x40063478;
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38
esp-hal/ld/esp32/rom/esp32.rom.redefined.ld
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38
esp-hal/ld/esp32/rom/esp32.rom.redefined.ld
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/*
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ROM Functions defined in this file are not used in ESP-IDF as is,
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and different definitions for functions with the same names are provided.
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This file is not used when linking ESP-IDF and is intended for reference only
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*/
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PROVIDE ( abort = 0x4000bba4 );
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PROVIDE ( aes_128_cbc_decrypt = 0x4005cc7c );
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PROVIDE ( aes_128_cbc_encrypt = 0x4005cc18 );
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PROVIDE ( aes_unwrap = 0x4005ccf0 );
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PROVIDE ( base64_decode = 0x4005ced8 );
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PROVIDE ( base64_encode = 0x4005cdbc );
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PROVIDE ( ets_isr_mask = 0x400067fc );
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PROVIDE ( ets_isr_unmask = 0x40006808 );
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PROVIDE ( ets_timer_arm = 0x40008368 );
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PROVIDE ( ets_timer_arm_us = 0x400083ac );
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PROVIDE ( ets_timer_disarm = 0x400083ec );
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PROVIDE ( ets_timer_done = 0x40008428 );
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PROVIDE ( ets_timer_init = 0x400084e8 );
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PROVIDE ( ets_timer_handler_isr = 0x40008454 );
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PROVIDE ( ets_timer_setfn = 0x40008350 );
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PROVIDE ( hmac_md5 = 0x4005d264 );
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PROVIDE ( hmac_md5_vector = 0x4005d17c );
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PROVIDE ( hmac_sha1 = 0x40060acc );
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PROVIDE ( hmac_sha1_vector = 0x400609e4 );
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PROVIDE ( hmac_sha256 = 0x40060d58 );
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PROVIDE ( hmac_sha256_vector = 0x40060c84 );
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PROVIDE ( MD5Final = 0x4005db1c );
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PROVIDE ( MD5Init = 0x4005da7c );
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PROVIDE ( MD5Update = 0x4005da9c );
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PROVIDE ( md5_vector = 0x4005db80 );
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PROVIDE ( pbkdf2_sha1 = 0x40060ba4 );
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PROVIDE ( rc4_skip = 0x40060928 );
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PROVIDE ( sha1_prf = 0x40060ae8 );
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PROVIDE ( sha1_vector = 0x40060b64 );
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PROVIDE ( sha256_prf = 0x40060d70 );
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PROVIDE ( sha256_vector = 0x40060e08 );
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PROVIDE ( uart_tx_wait_idle = 0x40009278 );
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29
esp-hal/ld/esp32/rom/esp32.rom.spiflash_legacy.ld
Normal file
29
esp-hal/ld/esp32/rom/esp32.rom.spiflash_legacy.ld
Normal file
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/*
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* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/*
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Address table for SPI driver functions in ESP32 ROM.
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These functions are only linked from ROM when SPI_FLASH_ROM_DRIVER_PATCH is not set in configuration.
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*/
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PROVIDE ( esp_rom_spiflash_write_encrypted = 0x40062e78 );
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PROVIDE ( esp_rom_spiflash_erase_area = 0x400631ac );
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PROVIDE ( esp_rom_spiflash_erase_block = 0x40062c4c );
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PROVIDE ( esp_rom_spiflash_erase_chip = 0x40062c14 );
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PROVIDE ( esp_rom_spiflash_erase_sector = 0x40062ccc );
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PROVIDE ( esp_rom_spiflash_attach = 0x40062a6c );
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PROVIDE ( esp_rom_spiflash_lock = 0x400628f0 );
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PROVIDE ( esp_rom_spiflash_read = 0x40062ed8 );
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PROVIDE ( esp_rom_spiflash_config_readmode = 0x40062b64 ); /* SPIMasterReadModeCnfig */
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PROVIDE ( esp_rom_spiflash_read_status = 0x4006226c );
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PROVIDE ( esp_rom_spiflash_read_statushigh = 0x40062448 );
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PROVIDE ( esp_rom_spiflash_write = 0x40062d50 );
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PROVIDE ( esp_rom_spiflash_enable_write = 0x40062320 );
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PROVIDE ( esp_rom_spiflash_write_status = 0x400622f0 );
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/* always using patched versions of these functions
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PROVIDE ( esp_rom_spiflash_wait_idle = 0x400622c0 );
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PROVIDE ( esp_rom_spiflash_unlock = 0x400????? );
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*/
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66
esp-hal/ld/esp32/rom/esp32.rom.syscalls.ld
Normal file
66
esp-hal/ld/esp32/rom/esp32.rom.syscalls.ld
Normal file
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/* These ROM functions call respective entries in the syscall table.
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They are called by other ROM functions (mostly from newlib).
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We don't link to them directly, since in IDF there are actual
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implementations of these functions, with same names.
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I.e.:
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times (in ROM) -> _times_r (in ROM) -> syscall table entry _times_r -> _times_r (in IDF)
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Hence the following entries are provided only for reference
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and commented out.
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*/
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/* <--- the following lines are commented out
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PROVIDE ( calloc = 0x4000bee4 );
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PROVIDE ( free = 0x4000beb8 );
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PROVIDE ( _free_r = 0x4000bbcc );
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PROVIDE ( _getpid_r = 0x4000bcfc );
|
||||
PROVIDE ( __getreent = 0x4000be8c );
|
||||
PROVIDE ( _gettimeofday_r = 0x4000bc58 );
|
||||
PROVIDE ( _kill_r = 0x4000bd10 );
|
||||
PROVIDE ( _lock_acquire = 0x4000be14 );
|
||||
PROVIDE ( _lock_acquire_recursive = 0x4000be28 );
|
||||
PROVIDE ( _lock_close = 0x4000bdec );
|
||||
PROVIDE ( _lock_close_recursive = 0x4000be00 );
|
||||
PROVIDE ( _lock_init = 0x4000bdc4 );
|
||||
PROVIDE ( _lock_init_recursive = 0x4000bdd8 );
|
||||
PROVIDE ( _lock_release = 0x4000be64 );
|
||||
PROVIDE ( _lock_release_recursive = 0x4000be78 );
|
||||
PROVIDE ( _lock_try_acquire = 0x4000be3c );
|
||||
PROVIDE ( _lock_try_acquire_recursive = 0x4000be50 );
|
||||
PROVIDE ( malloc = 0x4000bea0 );
|
||||
PROVIDE ( _malloc_r = 0x4000bbb4 );
|
||||
PROVIDE ( _raise_r = 0x4000bc70 );
|
||||
PROVIDE ( realloc = 0x4000becc );
|
||||
PROVIDE ( _realloc_r = 0x4000bbe0 );
|
||||
PROVIDE ( _sbrk_r = 0x4000bce4 );
|
||||
PROVIDE ( _system_r = 0x4000bc10 );
|
||||
PROVIDE ( _times_r = 0x4000bc40 );
|
||||
PROVIDE ( _close_r = 0x4000bd3c );
|
||||
PROVIDE ( _exit_r = 0x4000bd28 );
|
||||
PROVIDE ( _fstat_r = 0x4000bccc );
|
||||
PROVIDE ( _link_r = 0x4000bc9c );
|
||||
PROVIDE ( _lseek_r = 0x4000bd8c );
|
||||
PROVIDE ( _open_r = 0x4000bd54 );
|
||||
PROVIDE ( _read_r = 0x4000bda8 );
|
||||
PROVIDE ( _rename_r = 0x4000bc28 );
|
||||
PROVIDE ( _unlink_r = 0x4000bc84 );
|
||||
PROVIDE ( _write_r = 0x4000bd70 );
|
||||
|
||||
---> end commented out block
|
||||
*/
|
||||
|
||||
|
||||
/* These are the non-reentrant versions of syscalls present in the ROM.
|
||||
They call the reentrant versions, passing the pointer returned by __getreent
|
||||
as the first argument.
|
||||
*/
|
||||
|
||||
close = 0x40001778;
|
||||
open = 0x4000178c;
|
||||
read = 0x400017dc;
|
||||
sbrk = 0x400017f4;
|
||||
times = 0x40001808;
|
||||
write = 0x4000181c;
|
@ -1,23 +1,8 @@
|
||||
PROVIDE(ets_delay_us = 0x40000044);
|
||||
PROVIDE(ets_update_cpu_frequency_rom = 0x40000774);
|
||||
PROVIDE(rom_i2c_writeReg = 0x400022f4);
|
||||
PROVIDE(rom_i2c_writeReg_Mask = 0x400022fc);
|
||||
PROVIDE(rtc_get_reset_reason = 0x40000018);
|
||||
PROVIDE(software_reset = 0x40000088);
|
||||
PROVIDE(software_reset_cpu = 0x4000008c);
|
||||
INCLUDE "rom/esp32c2.rom.api.ld"
|
||||
INCLUDE "rom/esp32c2.rom.heap.ld"
|
||||
INCLUDE "rom/esp32c2.rom.ld"
|
||||
INCLUDE "rom/esp32c2.rom.libgcc.ld"
|
||||
INCLUDE "rom/esp32c2.rom.rvfp.ld"
|
||||
INCLUDE "rom/esp32c2.rom.version.ld"
|
||||
|
||||
PROVIDE(esp_rom_crc32_be = 0x40000808);
|
||||
PROVIDE(esp_rom_crc16_be = 0x4000080c);
|
||||
PROVIDE(esp_rom_crc8_be = 0x40000810);
|
||||
PROVIDE(esp_rom_crc32_le = 0x400007fc);
|
||||
PROVIDE(esp_rom_crc16_le = 0x40000800);
|
||||
PROVIDE(esp_rom_crc8_le = 0x40000804);
|
||||
|
||||
PROVIDE(esp_rom_mbedtls_md5_starts_ret = 0x40002be4);
|
||||
PROVIDE(esp_rom_mbedtls_md5_update_ret = 0x40002be8);
|
||||
PROVIDE(esp_rom_mbedtls_md5_finish_ret = 0x40002bec);
|
||||
|
||||
memset = 0x40000488;
|
||||
memcpy = 0x4000048c;
|
||||
memmove = 0x40000490;
|
||||
memcmp = 0x40000494;
|
||||
INCLUDE "rom/additional.ld"
|
||||
|
8
esp-hal/ld/esp32c2/rom/additional.ld
Normal file
8
esp-hal/ld/esp32c2/rom/additional.ld
Normal file
@ -0,0 +1,8 @@
|
||||
memset = 0x40000488;
|
||||
memcpy = 0x4000048c;
|
||||
memmove = 0x40000490;
|
||||
memcmp = 0x40000494;
|
||||
|
||||
strcpy = 0x40000498;
|
||||
strncpy = 0x4000049c;
|
||||
strncmp = 0x400004a4;
|
69
esp-hal/ld/esp32c2/rom/esp32c2.rom.api.ld
Normal file
69
esp-hal/ld/esp32c2/rom/esp32c2.rom.api.ld
Normal file
@ -0,0 +1,69 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/** ROM APIs
|
||||
*/
|
||||
PROVIDE ( esp_rom_crc32_le = crc32_le );
|
||||
PROVIDE ( esp_rom_crc16_le = crc16_le );
|
||||
PROVIDE ( esp_rom_crc8_le = crc8_le );
|
||||
PROVIDE ( esp_rom_crc32_be = crc32_be );
|
||||
PROVIDE ( esp_rom_crc16_be = crc16_be );
|
||||
PROVIDE ( esp_rom_crc8_be = crc8_be );
|
||||
|
||||
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
|
||||
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
|
||||
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
|
||||
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
|
||||
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
|
||||
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
|
||||
|
||||
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
|
||||
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
|
||||
|
||||
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
|
||||
|
||||
PROVIDE ( esp_rom_output_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_output_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_output_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_output_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_output_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_output_putc = ets_write_char_uart );
|
||||
|
||||
PROVIDE ( esp_rom_mbedtls_md5_starts_ret = mbedtls_md5_starts_ret );
|
||||
PROVIDE ( esp_rom_mbedtls_md5_update_ret = mbedtls_md5_update_ret );
|
||||
PROVIDE ( esp_rom_mbedtls_md5_finish_ret = mbedtls_md5_finish_ret );
|
||||
|
||||
PROVIDE ( esp_rom_software_reset_system = software_reset );
|
||||
PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
|
||||
|
||||
PROVIDE ( esp_rom_printf = ets_printf );
|
||||
PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
|
||||
PROVIDE ( esp_rom_delay_us = ets_delay_us );
|
||||
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
|
||||
PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
|
||||
PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
|
||||
PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
|
||||
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
|
||||
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
|
||||
PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
|
||||
PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
|
||||
PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
|
||||
PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
|
||||
|
||||
PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
|
||||
PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
|
||||
PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
|
||||
PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );
|
75
esp-hal/ld/esp32c2/rom/esp32c2.rom.heap.ld
Normal file
75
esp-hal/ld/esp32c2/rom/esp32c2.rom.heap.ld
Normal file
@ -0,0 +1,75 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
|
||||
/***************************************
|
||||
Group heap
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
PROVIDE( tlsf_create = 0x400002dc );
|
||||
PROVIDE( tlsf_create_with_pool = 0x400002e0 );
|
||||
PROVIDE( tlsf_get_pool = 0x400002e4 );
|
||||
PROVIDE( tlsf_add_pool = 0x400002e8 );
|
||||
PROVIDE( tlsf_remove_pool = 0x400002ec );
|
||||
PROVIDE( tlsf_malloc = 0x400002f0 );
|
||||
PROVIDE( tlsf_memalign = 0x400002f4 );
|
||||
PROVIDE( tlsf_memalign_offs = 0x400002f8 );
|
||||
PROVIDE( tlsf_realloc = 0x400002fc );
|
||||
PROVIDE( tlsf_free = 0x40000300 );
|
||||
PROVIDE( tlsf_block_size = 0x40000304 );
|
||||
PROVIDE( tlsf_size = 0x40000308 );
|
||||
PROVIDE( tlsf_align_size = 0x4000030c );
|
||||
PROVIDE( tlsf_block_size_min = 0x40000310 );
|
||||
PROVIDE( tlsf_block_size_max = 0x40000314 );
|
||||
PROVIDE( tlsf_pool_overhead = 0x40000318 );
|
||||
PROVIDE( tlsf_alloc_overhead = 0x4000031c );
|
||||
PROVIDE( tlsf_walk_pool = 0x40000320 );
|
||||
PROVIDE( tlsf_check = 0x40000324 );
|
||||
PROVIDE( tlsf_check_pool = 0x40000328 );
|
||||
PROVIDE( tlsf_poison_fill_pfunc_set = 0x4000032c );
|
||||
PROVIDE( multi_heap_get_block_address_impl = 0x40000330 );
|
||||
PROVIDE( multi_heap_get_allocated_size_impl = 0x40000334 );
|
||||
PROVIDE( multi_heap_register_impl = 0x40000338 );
|
||||
PROVIDE( multi_heap_set_lock = 0x4000033c );
|
||||
PROVIDE( multi_heap_os_funcs_init = 0x40000340 );
|
||||
PROVIDE( multi_heap_internal_lock = 0x40000344 );
|
||||
PROVIDE( multi_heap_internal_unlock = 0x40000348 );
|
||||
PROVIDE( multi_heap_get_first_block = 0x4000034c );
|
||||
PROVIDE( multi_heap_get_next_block = 0x40000350 );
|
||||
PROVIDE( multi_heap_is_free = 0x40000354 );
|
||||
PROVIDE( multi_heap_malloc_impl = 0x40000358 );
|
||||
PROVIDE( multi_heap_free_impl = 0x4000035c );
|
||||
PROVIDE( multi_heap_realloc_impl = 0x40000360 );
|
||||
PROVIDE( multi_heap_aligned_alloc_impl_offs = 0x40000364 );
|
||||
PROVIDE( multi_heap_aligned_alloc_impl = 0x40000368 );
|
||||
PROVIDE( multi_heap_check = 0x4000036c );
|
||||
PROVIDE( multi_heap_dump = 0x40000370 );
|
||||
PROVIDE( multi_heap_free_size_impl = 0x40000374 );
|
||||
PROVIDE( multi_heap_minimum_free_size_impl = 0x40000378 );
|
||||
PROVIDE( multi_heap_get_info_impl = 0x4000037c );
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
PROVIDE( heap_tlsf_table_ptr = 0x3fcdffec );
|
||||
|
||||
/**
|
||||
* Multi heap function
|
||||
*/
|
||||
|
||||
PROVIDE (multi_heap_malloc = multi_heap_malloc_impl);
|
||||
PROVIDE (multi_heap_free = multi_heap_free_impl);
|
||||
PROVIDE (multi_heap_realloc = multi_heap_realloc_impl);
|
||||
PROVIDE (multi_heap_get_allocated_size = multi_heap_get_allocated_size_impl);
|
||||
PROVIDE (multi_heap_register = multi_heap_register_impl);
|
||||
PROVIDE (multi_heap_get_info = multi_heap_get_info_impl);
|
||||
PROVIDE (multi_heap_free_size = multi_heap_free_size_impl);
|
||||
PROVIDE (multi_heap_minimum_free_size = multi_heap_minimum_free_size_impl);
|
||||
PROVIDE (multi_heap_get_block_address = multi_heap_get_block_address_impl);
|
||||
PROVIDE (multi_heap_aligned_alloc = multi_heap_aligned_alloc_impl);
|
||||
PROVIDE (multi_heap_aligned_free = multi_heap_aligned_free_impl);
|
||||
PROVIDE (multi_heap_check = multi_heap_check);
|
||||
PROVIDE (multi_heap_set_lock = multi_heap_set_lock);
|
||||
PROVIDE (multi_heap_internal_lock = multi_heap_internal_lock);
|
||||
PROVIDE (multi_heap_internal_unlock = multi_heap_internal_unlock);
|
2237
esp-hal/ld/esp32c2/rom/esp32c2.rom.ld
Normal file
2237
esp-hal/ld/esp32c2/rom/esp32c2.rom.ld
Normal file
File diff suppressed because it is too large
Load Diff
113
esp-hal/ld/esp32c2/rom/esp32c2.rom.libgcc.ld
Normal file
113
esp-hal/ld/esp32c2/rom/esp32c2.rom.libgcc.ld
Normal file
@ -0,0 +1,113 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/* ROM function interface esp32c2.rom.libgcc.ld for esp32c2
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32c2.yml md5sum c679b6ed5e9f0a9c3e7b93e5e0f2a1a3
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 1.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group libgcc
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
__absvdi2 = 0x400008a8;
|
||||
__absvsi2 = 0x400008ac;
|
||||
__adddf3 = 0x400008b0;
|
||||
__addsf3 = 0x400008b4;
|
||||
__addvdi3 = 0x400008b8;
|
||||
__addvsi3 = 0x400008bc;
|
||||
__ashldi3 = 0x400008c0;
|
||||
__ashrdi3 = 0x400008c4;
|
||||
__bswapdi2 = 0x400008c8;
|
||||
__bswapsi2 = 0x400008cc;
|
||||
__clear_cache = 0x400008d0;
|
||||
__clrsbdi2 = 0x400008d4;
|
||||
__clrsbsi2 = 0x400008d8;
|
||||
__clzdi2 = 0x400008dc;
|
||||
__clzsi2 = 0x400008e0;
|
||||
__cmpdi2 = 0x400008e4;
|
||||
__ctzdi2 = 0x400008e8;
|
||||
__ctzsi2 = 0x400008ec;
|
||||
__divdc3 = 0x400008f0;
|
||||
__divdf3 = 0x400008f4;
|
||||
__divdi3 = 0x400008f8;
|
||||
__divsc3 = 0x400008fc;
|
||||
__divsf3 = 0x40000900;
|
||||
__divsi3 = 0x40000904;
|
||||
__eqdf2 = 0x40000908;
|
||||
__eqsf2 = 0x4000090c;
|
||||
__extendsfdf2 = 0x40000910;
|
||||
__ffsdi2 = 0x40000914;
|
||||
__ffssi2 = 0x40000918;
|
||||
__fixdfdi = 0x4000091c;
|
||||
__fixdfsi = 0x40000920;
|
||||
__fixsfdi = 0x40000924;
|
||||
__fixsfsi = 0x40000928;
|
||||
__fixunsdfsi = 0x4000092c;
|
||||
__fixunssfdi = 0x40000930;
|
||||
__fixunssfsi = 0x40000934;
|
||||
__floatdidf = 0x40000938;
|
||||
__floatdisf = 0x4000093c;
|
||||
__floatsidf = 0x40000940;
|
||||
__floatsisf = 0x40000944;
|
||||
__floatundidf = 0x40000948;
|
||||
__floatundisf = 0x4000094c;
|
||||
__floatunsidf = 0x40000950;
|
||||
__floatunsisf = 0x40000954;
|
||||
__gcc_bcmp = 0x40000958;
|
||||
__gedf2 = 0x4000095c;
|
||||
__gesf2 = 0x40000960;
|
||||
__gtdf2 = 0x40000964;
|
||||
__gtsf2 = 0x40000968;
|
||||
__ledf2 = 0x4000096c;
|
||||
__lesf2 = 0x40000970;
|
||||
__lshrdi3 = 0x40000974;
|
||||
__ltdf2 = 0x40000978;
|
||||
__ltsf2 = 0x4000097c;
|
||||
__moddi3 = 0x40000980;
|
||||
__modsi3 = 0x40000984;
|
||||
__muldc3 = 0x40000988;
|
||||
__muldf3 = 0x4000098c;
|
||||
__muldi3 = 0x40000990;
|
||||
__mulsc3 = 0x40000994;
|
||||
__mulsf3 = 0x40000998;
|
||||
__mulsi3 = 0x4000099c;
|
||||
__mulvdi3 = 0x400009a0;
|
||||
__mulvsi3 = 0x400009a4;
|
||||
__nedf2 = 0x400009a8;
|
||||
__negdf2 = 0x400009ac;
|
||||
__negdi2 = 0x400009b0;
|
||||
__negsf2 = 0x400009b4;
|
||||
__negvdi2 = 0x400009b8;
|
||||
__negvsi2 = 0x400009bc;
|
||||
__nesf2 = 0x400009c0;
|
||||
__paritysi2 = 0x400009c4;
|
||||
__popcountdi2 = 0x400009c8;
|
||||
__popcountsi2 = 0x400009cc;
|
||||
__powidf2 = 0x400009d0;
|
||||
__powisf2 = 0x400009d4;
|
||||
__subdf3 = 0x400009d8;
|
||||
__subsf3 = 0x400009dc;
|
||||
__subvdi3 = 0x400009e0;
|
||||
__subvsi3 = 0x400009e4;
|
||||
__truncdfsf2 = 0x400009e8;
|
||||
__ucmpdi2 = 0x400009ec;
|
||||
__udivdi3 = 0x400009f0;
|
||||
__udivmoddi4 = 0x400009f4;
|
||||
__udivsi3 = 0x400009f8;
|
||||
__udiv_w_sdiv = 0x400009fc;
|
||||
__umoddi3 = 0x40000a00;
|
||||
__umodsi3 = 0x40000a04;
|
||||
__unorddf2 = 0x40000a08;
|
||||
__unordsf2 = 0x40000a0c;
|
||||
__extenddftf2 = 0x40000a10;
|
||||
__trunctfdf2 = 0x40000a14;
|
118
esp-hal/ld/esp32c2/rom/esp32c2.rom.rvfp.ld
Normal file
118
esp-hal/ld/esp32c2/rom/esp32c2.rom.rvfp.ld
Normal file
@ -0,0 +1,118 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32c2.rom.rvfp.ld esp32c2
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32c2.yml md5sum c679b6ed5e9f0a9c3e7b93e5e0f2a1a3
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 1.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group rvfplib
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
__adddf3 = 0x40000a18;
|
||||
__addsf3 = 0x40000a1c;
|
||||
__divsf3 = 0x40000a20;
|
||||
__eqdf2 = 0x40000a24;
|
||||
__eqsf2 = 0x40000a28;
|
||||
__extendsfdf2 = 0x40000a2c;
|
||||
__fixdfdi = 0x40000a30;
|
||||
__fixdfsi = 0x40000a34;
|
||||
__fixsfdi = 0x40000a38;
|
||||
__fixsfsi = 0x40000a3c;
|
||||
__fixunsdfsi = 0x40000a40;
|
||||
__fixunssfdi = 0x40000a44;
|
||||
__fixunssfsi = 0x40000a48;
|
||||
__floatdidf = 0x40000a4c;
|
||||
__floatdisf = 0x40000a50;
|
||||
__floatsidf = 0x40000a54;
|
||||
__floatsisf = 0x40000a58;
|
||||
__floatundidf = 0x40000a5c;
|
||||
__floatundisf = 0x40000a60;
|
||||
__floatunsidf = 0x40000a64;
|
||||
__floatunsisf = 0x40000a68;
|
||||
__gedf2 = 0x40000a6c;
|
||||
__gesf2 = 0x40000a70;
|
||||
__gtdf2 = 0x40000a74;
|
||||
__gtsf2 = 0x40000a78;
|
||||
__ledf2 = 0x40000a7c;
|
||||
__lesf2 = 0x40000a80;
|
||||
__ltdf2 = 0x40000a84;
|
||||
__ltsf2 = 0x40000a88;
|
||||
__muldf3 = 0x40000a8c;
|
||||
__mulsf3 = 0x40000a90;
|
||||
__nedf2 = 0x40000a94;
|
||||
__nesf2 = 0x40000a98;
|
||||
__subdf3 = 0x40000a9c;
|
||||
__subsf3 = 0x40000aa0;
|
||||
__truncdfsf2 = 0x40000aa4;
|
||||
|
||||
/***************************************
|
||||
Group libgcc
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
__absvdi2 = 0x400008a8;
|
||||
__absvsi2 = 0x400008ac;
|
||||
__addvdi3 = 0x400008b8;
|
||||
__addvsi3 = 0x400008bc;
|
||||
__ashldi3 = 0x400008c0;
|
||||
__ashrdi3 = 0x400008c4;
|
||||
__bswapdi2 = 0x400008c8;
|
||||
__bswapsi2 = 0x400008cc;
|
||||
__clear_cache = 0x400008d0;
|
||||
__clrsbdi2 = 0x400008d4;
|
||||
__clrsbsi2 = 0x400008d8;
|
||||
__clzdi2 = 0x400008dc;
|
||||
__clzsi2 = 0x400008e0;
|
||||
__cmpdi2 = 0x400008e4;
|
||||
__ctzdi2 = 0x400008e8;
|
||||
__ctzsi2 = 0x400008ec;
|
||||
__divdc3 = 0x400008f0;
|
||||
__divdf3 = 0x400008f4;
|
||||
__divdi3 = 0x400008f8;
|
||||
__divsc3 = 0x400008fc;
|
||||
__divsi3 = 0x40000904;
|
||||
__ffsdi2 = 0x40000914;
|
||||
__ffssi2 = 0x40000918;
|
||||
__gcc_bcmp = 0x40000958;
|
||||
__lshrdi3 = 0x40000974;
|
||||
__moddi3 = 0x40000980;
|
||||
__modsi3 = 0x40000984;
|
||||
__muldc3 = 0x40000988;
|
||||
__muldi3 = 0x40000990;
|
||||
__mulsc3 = 0x40000994;
|
||||
__mulsi3 = 0x4000099c;
|
||||
__mulvdi3 = 0x400009a0;
|
||||
__mulvsi3 = 0x400009a4;
|
||||
__negdf2 = 0x400009ac;
|
||||
__negdi2 = 0x400009b0;
|
||||
__negsf2 = 0x400009b4;
|
||||
__negvdi2 = 0x400009b8;
|
||||
__negvsi2 = 0x400009bc;
|
||||
__paritysi2 = 0x400009c4;
|
||||
__popcountdi2 = 0x400009c8;
|
||||
__popcountsi2 = 0x400009cc;
|
||||
__powidf2 = 0x400009d0;
|
||||
__powisf2 = 0x400009d4;
|
||||
__subvdi3 = 0x400009e0;
|
||||
__subvsi3 = 0x400009e4;
|
||||
__ucmpdi2 = 0x400009ec;
|
||||
__udivdi3 = 0x400009f0;
|
||||
__udivmoddi4 = 0x400009f4;
|
||||
__udivsi3 = 0x400009f8;
|
||||
__udiv_w_sdiv = 0x400009fc;
|
||||
__umoddi3 = 0x40000a00;
|
||||
__umodsi3 = 0x40000a04;
|
||||
__unorddf2 = 0x40000a08;
|
||||
__unordsf2 = 0x40000a0c;
|
||||
__extenddftf2 = 0x40000a10;
|
||||
__trunctfdf2 = 0x40000a14;
|
14
esp-hal/ld/esp32c2/rom/esp32c2.rom.version.ld
Normal file
14
esp-hal/ld/esp32c2/rom/esp32c2.rom.version.ld
Normal file
@ -0,0 +1,14 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2021-2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
|
||||
/* ROM version variables for esp32c2
|
||||
*
|
||||
* These addresses should be compatible with any ROM version for this chip.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
_rom_chip_id = 0x40000010;
|
||||
_rom_eco_version = 0x40000014;
|
@ -1,30 +1,10 @@
|
||||
ets_printf = 0x40000040;
|
||||
PROVIDE(esp_rom_printf = ets_printf);
|
||||
PROVIDE(cache_invalidate_icache_all = 0x400004d8);
|
||||
PROVIDE(cache_suspend_icache = 0x40000524);
|
||||
PROVIDE(cache_resume_icache = 0x40000528);
|
||||
PROVIDE(cache_ibus_mmu_set = 0x40000560);
|
||||
PROVIDE(cache_dbus_mmu_set = 0x40000564);
|
||||
PROVIDE(ets_delay_us = 0x40000050);
|
||||
PROVIDE(ets_update_cpu_frequency_rom = 0x40000588);
|
||||
PROVIDE(rom_i2c_writeReg = 0x4000195c);
|
||||
PROVIDE(rom_i2c_writeReg_Mask = 0x40001960);
|
||||
PROVIDE(rtc_get_reset_reason = 0x40000018);
|
||||
PROVIDE(software_reset = 0x40000090);
|
||||
PROVIDE(software_reset_cpu = 0x40000094);
|
||||
INCLUDE "rom/esp32c3.rom.api.ld"
|
||||
INCLUDE "rom/esp32c3.rom.eco3.ld"
|
||||
/* TODO
|
||||
INCLUDE "rom/esp32c3.rom.eco7.ld"
|
||||
*/
|
||||
INCLUDE "rom/esp32c3.rom.ld"
|
||||
INCLUDE "rom/esp32c3.rom.libgcc.ld"
|
||||
INCLUDE "rom/esp32c3.rom.version.ld"
|
||||
|
||||
PROVIDE(esp_rom_crc32_be = 0x4000062c);
|
||||
PROVIDE(esp_rom_crc16_be = 0x40000634);
|
||||
PROVIDE(esp_rom_crc8_be = 0x4000063c);
|
||||
PROVIDE(esp_rom_crc32_le = 0x40000628);
|
||||
PROVIDE(esp_rom_crc16_le = 0x40000630);
|
||||
PROVIDE(esp_rom_crc8_le = 0x40000638);
|
||||
|
||||
PROVIDE(esp_rom_md5_init = 0x40000614);
|
||||
PROVIDE(esp_rom_md5_update = 0x40000618);
|
||||
PROVIDE(esp_rom_md5_final = 0x4000061c);
|
||||
|
||||
memset = 0x40000354;
|
||||
memcpy = 0x40000358;
|
||||
memmove = 0x4000035c;
|
||||
memcmp = 0x40000360;
|
||||
INCLUDE "rom/additional.ld"
|
||||
|
12
esp-hal/ld/esp32c3/rom/additional.ld
Normal file
12
esp-hal/ld/esp32c3/rom/additional.ld
Normal file
@ -0,0 +1,12 @@
|
||||
memset = 0x40000354;
|
||||
memcpy = 0x40000358;
|
||||
memmove = 0x4000035c;
|
||||
memcmp = 0x40000360;
|
||||
|
||||
strncmp = 0x40000370;
|
||||
strncpy = 0x40000368;
|
||||
strcpy = 0x40000364;
|
||||
|
||||
abs = 0x40000424;
|
||||
|
||||
PROVIDE(cache_dbus_mmu_set = 0x40000564);
|
61
esp-hal/ld/esp32c3/rom/esp32c3.rom.api.ld
Normal file
61
esp-hal/ld/esp32c3/rom/esp32c3.rom.api.ld
Normal file
@ -0,0 +1,61 @@
|
||||
/**
|
||||
* ROM APIs
|
||||
*/
|
||||
PROVIDE ( esp_rom_crc32_le = crc32_le );
|
||||
PROVIDE ( esp_rom_crc16_le = crc16_le );
|
||||
PROVIDE ( esp_rom_crc8_le = crc8_le );
|
||||
PROVIDE ( esp_rom_crc32_be = crc32_be );
|
||||
PROVIDE ( esp_rom_crc16_be = crc16_be );
|
||||
PROVIDE ( esp_rom_crc8_be = crc8_be );
|
||||
|
||||
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
|
||||
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
|
||||
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
|
||||
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
|
||||
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
|
||||
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
|
||||
|
||||
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
|
||||
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad );
|
||||
|
||||
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
|
||||
|
||||
PROVIDE ( esp_rom_output_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_output_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_output_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_output_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_output_rx_string = UartRxString );
|
||||
|
||||
PROVIDE ( esp_rom_md5_init = MD5Init );
|
||||
PROVIDE ( esp_rom_md5_update = MD5Update );
|
||||
PROVIDE ( esp_rom_md5_final = MD5Final );
|
||||
|
||||
PROVIDE ( esp_rom_software_reset_system = software_reset );
|
||||
PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
|
||||
|
||||
PROVIDE ( esp_rom_printf = ets_printf );
|
||||
PROVIDE ( esp_rom_delay_us = ets_delay_us );
|
||||
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
|
||||
PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
|
||||
PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
|
||||
PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
|
||||
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable );
|
||||
PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
|
||||
PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
|
||||
PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
|
||||
PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
|
||||
|
||||
PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
|
||||
PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
|
||||
PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
|
||||
PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );
|
129
esp-hal/ld/esp32c3/rom/esp32c3.rom.eco3.ld
Normal file
129
esp-hal/ld/esp32c3/rom/esp32c3.rom.eco3.ld
Normal file
@ -0,0 +1,129 @@
|
||||
/*
|
||||
ESP32C3 ECO3 ROM address table
|
||||
Version 3 API's imported from the ROM
|
||||
*/
|
||||
|
||||
/*esf_buf_alloc_dynamic = 0x400015c0;*/
|
||||
/*esf_buf_recycle = 0x400015c4;*/
|
||||
/*lmacTxDone = 0x4000162c;*/
|
||||
/*ppMapTxQueue = 0x400016d8;*/
|
||||
/*rcGetSched = 0x40001764;*/
|
||||
wDevCheckBlockError = 0x400017b4;
|
||||
/*ppProcTxDone = 0x40001804;*/
|
||||
/*sta_input = rom_sta_input;*/
|
||||
|
||||
/***************************************
|
||||
Group rom_phy
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
rom_index_to_txbbgain = 0x40001964;
|
||||
rom_pbus_xpd_tx_on = 0x400019b0;
|
||||
rom_set_tx_dig_gain = 0x400019f0;
|
||||
rom_set_txcap_reg = 0x400019f4;
|
||||
rom_txbbgain_to_index = 0x40001a0c;
|
||||
rom_agc_reg_init = 0x40001a54;
|
||||
rom_bb_reg_init = 0x40001a58;
|
||||
rom_set_pbus_reg = 0x40001a70;
|
||||
rom_phy_xpd_rf = 0x40001a78;
|
||||
rom_write_txrate_power_offset = 0x40001a8c;
|
||||
rom_temp_to_power = 0x40001ab4;
|
||||
rom_open_i2c_xpd = 0x40001af8;
|
||||
rom_tsens_read_init = 0x40001b00;
|
||||
rom_tsens_code_read = 0x40001b04;
|
||||
rom_tsens_dac_cal = 0x40001b10;
|
||||
rom_pll_vol_cal = 0x40001b28;
|
||||
|
||||
/***************************************
|
||||
Group eco3_wifi
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
wdev_is_data_in_rxlist = 0x40001b2c;
|
||||
ppProcTxCallback = 0x40001b30;
|
||||
ieee80211_gettid = 0x40001b34;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group eco3_bluetooth
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
r_lld_legacy_adv_dynamic_pti_get = 0x40001b38;
|
||||
r_lld_legacy_adv_dynamic_pti_process = 0x40001b3c;
|
||||
r_lld_ext_adv_dynamic_pti_get = 0x40001b40;
|
||||
r_lld_ext_adv_dynamic_aux_pti_process = 0x40001b44;
|
||||
r_lld_ext_adv_dynamic_pti_process = 0x40001b48;
|
||||
r_lld_adv_ext_pkt_prepare_set = 0x40001b4c;
|
||||
r_lld_adv_ext_chain_connectable_construct = 0x40001b54;
|
||||
r_lld_adv_pkt_rx_connect_post = 0x40001b5c;
|
||||
r_lld_adv_start_init_evt_param = 0x40001b60;
|
||||
r_lld_adv_start_set_cs = 0x40001b64;
|
||||
/* r_lld_adv_start_update_filter_policy = 0x40001b68; */
|
||||
r_lld_adv_start_schedule_asap = 0x40001b6c;
|
||||
r_lld_con_tx_prog_new_packet_coex = 0x40001b70;
|
||||
r_lld_per_adv_dynamic_pti_get = 0x40001b78;
|
||||
r_lld_per_adv_evt_start_chm_upd = 0x40001b7c;
|
||||
r_lld_ext_scan_dynamic_pti_get = 0x40001b80;
|
||||
r_lld_sync_insert = 0x40001b88;
|
||||
r_sch_prog_ble_push = 0x40001b8c;
|
||||
r_sch_prog_bt_push = 0x40001b90;
|
||||
r_lld_init_evt_end_type_set = 0x40001b94;
|
||||
r_lld_init_evt_end_type_get = 0x40001b98;
|
||||
r_lld_adv_direct_adv_use_rpa_addr_state_set = 0x40001b9c;
|
||||
r_lld_adv_direct_adv_use_rpa_addr_state_get = 0x40001ba0;
|
||||
r_lld_init_evt_end_type_check_state_set = 0x40001ba4;
|
||||
r_lld_init_evt_end_type_check_state_get = 0x40001ba8;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group eco3_phy
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
rom_wrtie_pll_cap = 0x40001bac;
|
||||
rom_set_tx_gain_mem = 0x40001bb0;
|
||||
rom_bt_tx_dig_gain = 0x40001bb4;
|
||||
rom_bt_get_tx_gain = 0x40001bb8;
|
||||
rom_get_chan_target_power = 0x40001bbc;
|
||||
rom_get_tx_gain_value = 0x40001bc0;
|
||||
rom_wifi_tx_dig_gain = 0x40001bc4;
|
||||
rom_wifi_get_tx_gain = 0x40001bc8;
|
||||
rom_fe_i2c_reg_renew = 0x40001bcc;
|
||||
rom_wifi_agc_sat_gain = 0x40001bd0;
|
||||
rom_i2c_master_reset = 0x40001bd4;
|
||||
rom_bt_filter_reg = 0x40001bd8;
|
||||
rom_phy_bbpll_cal = 0x40001bdc;
|
||||
rom_i2c_sar2_init_code = 0x40001be0;
|
||||
rom_phy_param_addr = 0x40001be4;
|
||||
rom_phy_reg_init = 0x40001be8;
|
||||
rom_set_chan_reg = 0x40001bec;
|
||||
rom_phy_wakeup_init = 0x40001bf0;
|
||||
rom_phy_i2c_init1 = 0x40001bf4;
|
||||
rom_tsens_temp_read = 0x40001bf8;
|
||||
rom_bt_track_pll_cap = 0x40001bfc;
|
||||
rom_wifi_track_pll_cap = 0x40001c00;
|
||||
rom_wifi_set_tx_gain = 0x40001c04;
|
||||
rom_txpwr_cal_track = 0x40001c08;
|
||||
rom_tx_pwctrl_background = 0x40001c0c;
|
||||
rom_bt_set_tx_gain = 0x40001c10;
|
||||
rom_noise_check_loop = 0x40001c14;
|
||||
rom_phy_close_rf = 0x40001c18;
|
||||
rom_phy_xpd_tsens = 0x40001c1c;
|
||||
rom_phy_freq_mem_backup = 0x40001c20;
|
||||
rom_phy_ant_init = 0x40001c24;
|
||||
rom_bt_track_tx_power = 0x40001c28;
|
||||
rom_wifi_track_tx_power = 0x40001c2c;
|
||||
rom_phy_dig_reg_backup = 0x40001c30;
|
||||
chip726_phyrom_version_num = 0x40001c34;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
phy_param_rom = 0x3fcdf830;
|
||||
|
||||
/***************************************
|
||||
Group eco3_esp_flash
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
PROVIDE( esp_flash_read_chip_id = 0x40001c38 );
|
||||
PROVIDE( detect_spi_flash_chip = 0x40001c3c );
|
||||
PROVIDE( esp_rom_spiflash_write_disable = 0x40001c40 );
|
240
esp-hal/ld/esp32c3/rom/esp32c3.rom.eco7.ld
Normal file
240
esp-hal/ld/esp32c3/rom/esp32c3.rom.eco7.ld
Normal file
@ -0,0 +1,240 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
esf_buf_alloc = 0x400015bc;
|
||||
esf_buf_alloc_dynamic = 0x400015c0;
|
||||
esf_buf_recycle = 0x400015c4;
|
||||
/*hal_mac_tx_set_ppdu = 0x400015d4;*/
|
||||
ic_mac_deinit = 0x400015dc;
|
||||
lmacDiscardMSDU = 0x400015f4;
|
||||
/*lmacSetTxFrame = 0x40001628;*/
|
||||
lmacTxDone = 0x4000162c;
|
||||
lmacTxFrame = 0x40001630;
|
||||
mac_tx_set_htsig = 0x40001638;
|
||||
mac_tx_set_plcp1 = 0x40001640;
|
||||
pm_check_state = 0x40001648;
|
||||
/*pm_on_beacon_rx = 0x4000167c;*/
|
||||
/*pm_parse_beacon = 0x40001688;*/
|
||||
pm_process_tim = 0x4000168c;
|
||||
pm_rx_beacon_process = 0x40001690;
|
||||
pm_rx_data_process = 0x40001694;
|
||||
/* pm_sleep = 0x40001698;*/
|
||||
/* pm_tbtt_process = 0x400016a0;*/
|
||||
ppMapTxQueue = 0x400016d8;
|
||||
ppProcTxSecFrame = 0x400016dc;
|
||||
/*ppRxFragmentProc = 0x40001704;*/
|
||||
/* rcGetSched = 0x40001764;*/
|
||||
rcTxUpdatePer = 0x40001770;
|
||||
rcUpdateTxDone = 0x4000177c;
|
||||
wDevCheckBlockError = 0x400017b4;
|
||||
/* wDev_IndicateFrame = 0x400017c8;*/
|
||||
wDev_ProcessFiq = 0x400017f0;
|
||||
/*wDev_ProcessRxSucData = 0x400017f4;*/
|
||||
/*ppProcTxDone = 0x40001804;*/
|
||||
/*pm_tx_data_done_process = 0x40001808;*/
|
||||
ppMapWaitTxq = 0x40001810;
|
||||
/*ieee80211_encap_esfbuf = 0x4000185c;*/
|
||||
/*sta_input = 0x40001870;*/
|
||||
ieee80211_crypto_decap = 0x4000189c;
|
||||
ieee80211_decap = 0x400018a0;
|
||||
/*coex_core_timer_idx_get = 0x400018d0;*/
|
||||
rom1_chip_i2c_readReg = 0x40001924;
|
||||
rom1_chip_i2c_writeReg = 0x40001928;
|
||||
rom_index_to_txbbgain = 0x40001964;
|
||||
rom_pbus_xpd_tx_on = 0x400019b0;
|
||||
rom1_set_noise_floor = 0x400019e8;
|
||||
rom_set_tx_dig_gain = 0x400019f0;
|
||||
rom_set_txcap_reg = 0x400019f4;
|
||||
rom_txbbgain_to_index = 0x40001a0c;
|
||||
rom1_disable_wifi_agc = 0x40001a1c;
|
||||
rom1_enable_wifi_agc = 0x40001a20;
|
||||
rom1_tx_paon_set = 0x40001a44;
|
||||
rom_agc_reg_init = 0x40001a54;
|
||||
rom_bb_reg_init = 0x40001a58;
|
||||
rom1_set_pbus_reg = 0x40001a70;
|
||||
rom_phy_xpd_rf = 0x40001a78;
|
||||
rom_write_txrate_power_offset = 0x40001a8c;
|
||||
rom1_get_rate_fcc_index = 0x40001a90;
|
||||
rom1_read_sar2_code = 0x40001aa4;
|
||||
rom2_temp_to_power1 = 0x40001ab4;
|
||||
rom1_get_i2c_hostid = 0x40001ac8;
|
||||
rom_open_i2c_xpd = 0x40001af8;
|
||||
rom2_tsens_read_init1 = 0x40001b00;
|
||||
rom_tsens_code_read = 0x40001b04;
|
||||
rom_tsens_dac_cal = 0x40001b10;
|
||||
rom1_phy_en_hw_set_freq = 0x40001b20;
|
||||
rom1_phy_dis_hw_set_freq = 0x40001b24;
|
||||
rom_pll_vol_cal = 0x40001b28;
|
||||
|
||||
rom1_bt_get_tx_gain = 0x40001bb8;
|
||||
rom1_get_chan_target_power = 0x40001bbc;
|
||||
rom2_get_tx_gain_value1 = 0x40001bc0;
|
||||
rom1_wifi_tx_dig_gain = 0x40001bc4;
|
||||
rom1_wifi_get_tx_gain = 0x40001bc8;
|
||||
rom1_fe_i2c_reg_renew = 0x40001bcc;
|
||||
rom1_i2c_master_reset = 0x40001bd4;
|
||||
rom1_phy_wakeup_init = 0x40001bf0;
|
||||
rom1_phy_i2c_init1 = 0x40001bf4;
|
||||
rom1_tsens_temp_read = 0x40001bf8;
|
||||
rom1_bt_track_pll_cap = 0x40001bfc;
|
||||
rom1_wifi_set_tx_gain = 0x40001c04;
|
||||
rom1_txpwr_cal_track = 0x40001c08;
|
||||
rom1_bt_set_tx_gain = 0x40001c10;
|
||||
rom1_phy_close_rf = 0x40001c18;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group eco7_uart
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
uart_tx_switch = 0x40001c44;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group eco7_bluetooth
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
r_lld_con_count_get = 0x40001c48;
|
||||
r_lld_update_con_offset = 0x40001c4c;
|
||||
r_lld_con_update_last_clock = 0x40001c50;
|
||||
r_lld_con_llcp_ind_info_clear = 0x40001c54;
|
||||
r_lld_con_update_terminte_info_init = 0x40001c58;
|
||||
r_lld_con_terminate_max_evt_update = 0x40001c5c;
|
||||
r_llc_pref_param_compute_eco = 0x40001ce8;
|
||||
r_llc_hci_con_upd_info_send_eco = 0x40001cec;
|
||||
r_llc_rem_encrypt_proc_continue_eco = 0x40001cf0;
|
||||
r_llc_start_eco = 0x40001cf8;
|
||||
r_lld_ext_adv_dynamic_aux_pti_process_eco = 0x40001cfc;
|
||||
r_lld_adv_start_eco = 0x40001d04;
|
||||
r_lld_con_evt_canceled_cbk_eco = 0x40001d08;
|
||||
r_lld_con_evt_time_update_eco = 0x40001d0c;
|
||||
r_lld_con_start_eco = 0x40001d10;
|
||||
r_lld_con_frm_isr_eco = 0x40001d14;
|
||||
r_lld_con_tx_eco = 0x40001d18;
|
||||
r_lld_ext_scan_dynamic_pti_process_eco = 0x40001d28;
|
||||
r_lld_scan_frm_eof_isr_eco = 0x40001d2c;
|
||||
r_lld_sync_start_eco = 0x40001d30;
|
||||
r_lld_sync_insert_eco = 0x40001d34;
|
||||
r_llm_adv_rep_flow_control_update_eco = 0x40001d38;
|
||||
r_llm_env_adv_dup_filt_init_eco = 0x40001d3c;
|
||||
r_llm_env_adv_dup_filt_deinit_eco = 0x40001d40;
|
||||
r_llm_adv_rep_flow_control_check_eco = 0x40001d44;
|
||||
r_llm_scan_start_eco = 0x40001d48;
|
||||
r_llm_update_duplicate_scan_count = 0x40001d4c;
|
||||
r_llc_hci_command_handler_pre = 0x40001d50;
|
||||
r_llc_hci_command_handler_get = 0x40001d54;
|
||||
r_llc_hci_command_handler_search = 0x40001d58;
|
||||
r_llc_llcp_pdu_handler_get_overwrite = 0x40001d5c;
|
||||
r_llc_llcp_pdu_handler_pre = 0x40001d60;
|
||||
r_llc_llcp_pdu_handler_end = 0x40001d64;
|
||||
r_llc_con_conflict_check = 0x40001d6c;
|
||||
r_sch_prog_hw_reset_try = 0x40001d70;
|
||||
r_sch_prog_et_state_reset = 0x40001d74;
|
||||
r_sch_prog_end_isr_handler = 0x40001d78;
|
||||
r_sch_plan_conflict_check = 0x40001d7c;
|
||||
r_rwble_isr_hw_fixed = 0x40001d80;
|
||||
r_bt_bb_recorrect_is_dead = 0x40001d84;
|
||||
r_bt_bb_restart_hw_recorrect = 0x40001d88;
|
||||
r_ke_task_handler_pre = 0x40001da0;
|
||||
r_ke_task_handler_end = 0x40001da4;
|
||||
r_lld_scan_frm_skip_isr_eco = 0x40001db0;
|
||||
r_lld_ext_scan_dynamic_pti_reset = 0x40001db4;
|
||||
r_llc_rem_phy_upd_proc_continue_eco = 0x40001db8;
|
||||
r_llm_get_preferred_phys = 0x40001dbc;
|
||||
r_lld_hw_cca_isr_eco = 0x40001dc0;
|
||||
r_lld_sw_cca_isr_eco = 0x40001dc4;
|
||||
r_lld_cca_chan_prn_e = 0x40001dc8;
|
||||
r_lld_cca_chan_prn_s = 0x40001dcc;
|
||||
r_lld_cca_chan_sel_remap = 0x40001dd0;
|
||||
r_lld_cca_chan_sel_1 = 0x40001dd4;
|
||||
r_lld_cca_chan_sel_2 = 0x40001dd8;
|
||||
r_lld_cca_set_thresh = 0x40001ddc;
|
||||
r_lld_cca_con_start = 0x40001de0;
|
||||
r_lld_cca_con_end = 0x40001de4;
|
||||
r_lld_cca_chm_restore = 0x40001de8;
|
||||
r_lld_cca_chan_unused_check = 0x40001dec;
|
||||
r_lld_cca_chm_update_check = 0x40001df0;
|
||||
r_lld_cca_busy_mode_handle = 0x40001df4;
|
||||
r_lld_cca_lbt_handle = 0x40001df8;
|
||||
r_lld_cca_scst_timeout_check = 0x40001dfc;
|
||||
r_lld_cca_chan_avl_timeout_check = 0x40001e00;
|
||||
|
||||
r_lld_con_start_hook = 0x40001ca8;
|
||||
|
||||
/* ble Functions eco */
|
||||
r_bt_bb_isr = 0x40000b9c;
|
||||
r_bt_rf_coex_conn_phy_coded_data_time_limit_en_get = 0x40000ba8;
|
||||
r_bt_rtp_get_txpwr_idx_by_act = 0x40000c00;
|
||||
r_btdm_task_post = 0x40000c14;
|
||||
r_btdm_task_post_from_isr = 0x40000c18;
|
||||
r_btdm_task_recycle = 0x40000c1c;
|
||||
r_hci_register_vendor_desc_tab = 0x40000d9c;
|
||||
r_ke_task_schedule = 0x40000e80;
|
||||
r_llc_hci_command_handler = 0x40000ef0;
|
||||
r_llc_loc_con_upd_proc_continue = 0x40000f60;
|
||||
r_llc_loc_phy_upd_proc_continue = 0x40000f78;
|
||||
r_llc_rem_con_upd_proc_continue = 0x40000fb4;
|
||||
r_lld_con_sched = 0x40001118;
|
||||
r_lld_con_stop = 0x40001124;
|
||||
r_lld_llcp_rx_ind_handler = 0x400011b0;
|
||||
r_lld_per_adv_sched = 0x400011f8;
|
||||
r_lld_scan_process_pkt_rx_adv_rep = 0x40001284;
|
||||
r_register_esp_vendor_cmd_handler = 0x40001400;
|
||||
r_rf_txpwr_cs_get = 0x40001428;
|
||||
r_rf_txpwr_dbm_get = 0x4000142c;
|
||||
r_sch_arb_event_start_isr = 0x400014f8;
|
||||
r_sch_plan_set = 0x40001534;
|
||||
r_sch_prog_end_isr = 0x40001538;
|
||||
r_lld_adv_ext_chain_scannable_construct = 0x40001b58;
|
||||
|
||||
r_lld_scan_process_pkt_rx = 0x40001280;
|
||||
r_llm_le_features_get = 0x400013b0;
|
||||
|
||||
/* ble functions rename */
|
||||
r_lld_init_start_hack = 0x400011a4;
|
||||
|
||||
/* ble functions disable */
|
||||
/*
|
||||
r_lld_adv_frm_isr_eco = 0x40001d00;
|
||||
r_lld_res_list_clear = 0x40004638;
|
||||
r_lld_res_list_rem = 0x40004680;
|
||||
r_lld_adv_start_hook = 0x40001c80;
|
||||
r_lld_con_evt_start_cbk_eco = 0x40001d1c;
|
||||
r_lld_con_tx_prog_new_packet = 0x40001b74;
|
||||
r_lld_adv_ext_chain_none_construct = 0x40001b50;
|
||||
r_llc_llcp_send_eco = 0x40001cf4;
|
||||
r_llc_llcp_channel_map_ind_ack = 0x40001d68;
|
||||
r_rwble_isr = 0x40001464;
|
||||
r_lld_scan_start_eco = 0x40001d24;
|
||||
r_lld_scan_try_sched_eco = 0x40001dac;
|
||||
r_lld_scan_start_hook = 0x40001c74;
|
||||
r_lld_init_start_hook = 0x40001cb8;
|
||||
r_lld_scan_evt_start_cbk_eco = 0x40001d20;
|
||||
r_ke_task_handler_get_overwrite = 0x40001da8;
|
||||
*/
|
||||
|
||||
|
||||
/***************************************
|
||||
Group eco7_phy
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
rom2_pll_cap_mem_update = 0x40001e04;
|
||||
rom2_phy_i2c_enter_critical = 0x40001e08;
|
||||
rom2_phy_i2c_exit_critical = 0x40001e0c;
|
||||
rom2_rfpll_cap_correct = 0x40001e10;
|
||||
rom2_write_pll_cap = 0x40001e14;
|
||||
rom2_read_pll_cap = 0x40001e18;
|
||||
rom2_tester_wifi_cali = 0x40001e1c;
|
||||
rom2_wait_hw_freq_busy = 0x40001e20;
|
||||
rom2_rfpll_cap_track = 0x40001e24;
|
||||
rom2_ulp_code_track = 0x40001e28;
|
||||
rom2_ulp_ext_code_set = 0x40001e2c;
|
||||
rom2_phy_set_tsens_power = 0x40001e30;
|
||||
rom2_phy_get_tsens_value = 0x40001e34;
|
||||
rom_mac_tx_chan_offset = 0x40001e38;
|
||||
rom_rx_gain_force = 0x40001e3c;
|
1932
esp-hal/ld/esp32c3/rom/esp32c3.rom.ld
Normal file
1932
esp-hal/ld/esp32c3/rom/esp32c3.rom.ld
Normal file
File diff suppressed because it is too large
Load Diff
105
esp-hal/ld/esp32c3/rom/esp32c3.rom.libgcc.ld
Normal file
105
esp-hal/ld/esp32c3/rom/esp32c3.rom.libgcc.ld
Normal file
@ -0,0 +1,105 @@
|
||||
/* ROM function interface esp32c3.rom.libgcc.ld for esp32c3
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32c3.yml md5sum 93b28a9e1fe42d212018eb4336849208
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group libgcc
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
__absvdi2 = 0x40000764;
|
||||
__absvsi2 = 0x40000768;
|
||||
__adddf3 = 0x4000076c;
|
||||
__addsf3 = 0x40000770;
|
||||
__addvdi3 = 0x40000774;
|
||||
__addvsi3 = 0x40000778;
|
||||
__ashldi3 = 0x4000077c;
|
||||
__ashrdi3 = 0x40000780;
|
||||
__bswapdi2 = 0x40000784;
|
||||
__bswapsi2 = 0x40000788;
|
||||
__clear_cache = 0x4000078c;
|
||||
__clrsbdi2 = 0x40000790;
|
||||
__clrsbsi2 = 0x40000794;
|
||||
__clzdi2 = 0x40000798;
|
||||
__clzsi2 = 0x4000079c;
|
||||
__cmpdi2 = 0x400007a0;
|
||||
__ctzdi2 = 0x400007a4;
|
||||
__ctzsi2 = 0x400007a8;
|
||||
__divdc3 = 0x400007ac;
|
||||
__divdf3 = 0x400007b0;
|
||||
__divdi3 = 0x400007b4;
|
||||
__divsc3 = 0x400007b8;
|
||||
__divsf3 = 0x400007bc;
|
||||
__divsi3 = 0x400007c0;
|
||||
__eqdf2 = 0x400007c4;
|
||||
__eqsf2 = 0x400007c8;
|
||||
__extendsfdf2 = 0x400007cc;
|
||||
__ffsdi2 = 0x400007d0;
|
||||
__ffssi2 = 0x400007d4;
|
||||
__fixdfdi = 0x400007d8;
|
||||
__fixdfsi = 0x400007dc;
|
||||
__fixsfdi = 0x400007e0;
|
||||
__fixsfsi = 0x400007e4;
|
||||
__fixunsdfsi = 0x400007e8;
|
||||
__fixunssfdi = 0x400007ec;
|
||||
__fixunssfsi = 0x400007f0;
|
||||
__floatdidf = 0x400007f4;
|
||||
__floatdisf = 0x400007f8;
|
||||
__floatsidf = 0x400007fc;
|
||||
__floatsisf = 0x40000800;
|
||||
__floatundidf = 0x40000804;
|
||||
__floatundisf = 0x40000808;
|
||||
__floatunsidf = 0x4000080c;
|
||||
__floatunsisf = 0x40000810;
|
||||
__gcc_bcmp = 0x40000814;
|
||||
__gedf2 = 0x40000818;
|
||||
__gesf2 = 0x4000081c;
|
||||
__gtdf2 = 0x40000820;
|
||||
__gtsf2 = 0x40000824;
|
||||
__ledf2 = 0x40000828;
|
||||
__lesf2 = 0x4000082c;
|
||||
__lshrdi3 = 0x40000830;
|
||||
__ltdf2 = 0x40000834;
|
||||
__ltsf2 = 0x40000838;
|
||||
__moddi3 = 0x4000083c;
|
||||
__modsi3 = 0x40000840;
|
||||
__muldc3 = 0x40000844;
|
||||
__muldf3 = 0x40000848;
|
||||
__muldi3 = 0x4000084c;
|
||||
__mulsc3 = 0x40000850;
|
||||
__mulsf3 = 0x40000854;
|
||||
__mulsi3 = 0x40000858;
|
||||
__mulvdi3 = 0x4000085c;
|
||||
__mulvsi3 = 0x40000860;
|
||||
__nedf2 = 0x40000864;
|
||||
__negdf2 = 0x40000868;
|
||||
__negdi2 = 0x4000086c;
|
||||
__negsf2 = 0x40000870;
|
||||
__negvdi2 = 0x40000874;
|
||||
__negvsi2 = 0x40000878;
|
||||
__nesf2 = 0x4000087c;
|
||||
__paritysi2 = 0x40000880;
|
||||
__popcountdi2 = 0x40000884;
|
||||
__popcountsi2 = 0x40000888;
|
||||
__powidf2 = 0x4000088c;
|
||||
__powisf2 = 0x40000890;
|
||||
__subdf3 = 0x40000894;
|
||||
__subsf3 = 0x40000898;
|
||||
__subvdi3 = 0x4000089c;
|
||||
__subvsi3 = 0x400008a0;
|
||||
__truncdfsf2 = 0x400008a4;
|
||||
__ucmpdi2 = 0x400008a8;
|
||||
__udivdi3 = 0x400008ac;
|
||||
__udivmoddi4 = 0x400008b0;
|
||||
__udivsi3 = 0x400008b4;
|
||||
__udiv_w_sdiv = 0x400008b8;
|
||||
__umoddi3 = 0x400008bc;
|
||||
__umodsi3 = 0x400008c0;
|
||||
__unorddf2 = 0x400008c4;
|
||||
__unordsf2 = 0x400008c8;
|
8
esp-hal/ld/esp32c3/rom/esp32c3.rom.version.ld
Normal file
8
esp-hal/ld/esp32c3/rom/esp32c3.rom.version.ld
Normal file
@ -0,0 +1,8 @@
|
||||
/* ROM version variables for esp32c3
|
||||
*
|
||||
* These addresses should be compatible with any ROM version for this chip.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
_rom_chip_id = 0x40000010;
|
||||
_rom_eco_version = 0x40000014;
|
@ -1,27 +1,13 @@
|
||||
ets_printf = 0x40000028;
|
||||
PROVIDE(esp_rom_printf = ets_printf);
|
||||
PROVIDE(cache_invalidate_icache_all = 0x4000064c);
|
||||
PROVIDE(cache_suspend_icache = 0x40000698);
|
||||
PROVIDE(cache_resume_icache = 0x4000069c);
|
||||
PROVIDE(ets_delay_us = 0x40000040);
|
||||
PROVIDE(ets_update_cpu_frequency_rom = 0x40000048);
|
||||
PROVIDE(rtc_get_reset_reason = 0x40000018);
|
||||
ets_update_cpu_frequency = 0x40000048;
|
||||
PROVIDE(software_reset = 0x40000090);
|
||||
PROVIDE(software_reset_cpu = 0x40000094);
|
||||
INCLUDE "rom/esp32c6.rom.api.ld"
|
||||
INCLUDE "rom/esp32c6.rom.coexist.ld"
|
||||
INCLUDE "rom/esp32c6.rom.heap.ld"
|
||||
INCLUDE "rom/esp32c6.rom.ld"
|
||||
INCLUDE "rom/esp32c6.rom.libgcc.ld"
|
||||
INCLUDE "rom/esp32c6.rom.net80211.ld"
|
||||
INCLUDE "rom/esp32c6.rom.phy.ld"
|
||||
INCLUDE "rom/esp32c6.rom.pp.ld"
|
||||
INCLUDE "rom/esp32c6.rom.rvfp.ld"
|
||||
INCLUDE "rom/esp32c6.rom.spiflash.ld"
|
||||
INCLUDE "rom/esp32c6.rom.version.ld"
|
||||
|
||||
PROVIDE(esp_rom_crc32_be = 0x40000764);
|
||||
PROVIDE(esp_rom_crc16_be = 0x40000768);
|
||||
PROVIDE(esp_rom_crc8_be = 0x4000076c);
|
||||
PROVIDE(esp_rom_crc32_le = 0x40000758);
|
||||
PROVIDE(esp_rom_crc16_le = 0x4000075c);
|
||||
PROVIDE(esp_rom_crc8_le = 0x40000760);
|
||||
|
||||
PROVIDE(esp_rom_md5_init = 0x4000074c);
|
||||
PROVIDE(esp_rom_md5_update = 0x40000750);
|
||||
PROVIDE(esp_rom_md5_final = 0x40000754);
|
||||
|
||||
memset = 0x400004a8;
|
||||
memcpy = 0x400004ac;
|
||||
memmove = 0x400004b0;
|
||||
memcmp = 0x400004b4;
|
||||
INCLUDE "rom/additional.ld"
|
||||
|
10
esp-hal/ld/esp32c6/rom/additional.ld
Normal file
10
esp-hal/ld/esp32c6/rom/additional.ld
Normal file
@ -0,0 +1,10 @@
|
||||
memset = 0x400004a8;
|
||||
memcpy = 0x400004ac;
|
||||
memmove = 0x400004b0;
|
||||
memcmp = 0x400004b4;
|
||||
|
||||
strncmp = 0x400004c4;
|
||||
strncpy = 0x400004bc;
|
||||
strcpy = 0x400004b8;
|
||||
|
||||
abs = 0x40000578;
|
65
esp-hal/ld/esp32c6/rom/esp32c6.rom.api.ld
Normal file
65
esp-hal/ld/esp32c6/rom/esp32c6.rom.api.ld
Normal file
@ -0,0 +1,65 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/** ROM APIs
|
||||
*/
|
||||
|
||||
PROVIDE ( esp_rom_crc32_le = crc32_le );
|
||||
PROVIDE ( esp_rom_crc16_le = crc16_le );
|
||||
PROVIDE ( esp_rom_crc8_le = crc8_le );
|
||||
PROVIDE ( esp_rom_crc32_be = crc32_be );
|
||||
PROVIDE ( esp_rom_crc16_be = crc16_be );
|
||||
PROVIDE ( esp_rom_crc8_be = crc8_be );
|
||||
|
||||
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
|
||||
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
|
||||
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
|
||||
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
|
||||
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
|
||||
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
|
||||
|
||||
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
|
||||
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
|
||||
|
||||
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char2 );
|
||||
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
|
||||
|
||||
PROVIDE ( esp_rom_output_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_output_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_output_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_output_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_output_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_output_putc = ets_write_char_uart );
|
||||
|
||||
PROVIDE ( esp_rom_md5_init = MD5Init );
|
||||
PROVIDE ( esp_rom_md5_update = MD5Update );
|
||||
PROVIDE ( esp_rom_md5_final = MD5Final );
|
||||
|
||||
PROVIDE ( esp_rom_software_reset_system = software_reset );
|
||||
PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
|
||||
|
||||
PROVIDE ( esp_rom_printf = ets_printf );
|
||||
PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
|
||||
PROVIDE ( esp_rom_delay_us = ets_delay_us );
|
||||
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
|
||||
PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
|
||||
PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
|
||||
PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
|
||||
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
|
||||
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable );
|
||||
PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
|
||||
PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
|
||||
PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
|
||||
PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
|
47
esp-hal/ld/esp32c6/rom/esp32c6.rom.coexist.ld
Normal file
47
esp-hal/ld/esp32c6/rom/esp32c6.rom.coexist.ld
Normal file
@ -0,0 +1,47 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32c6.rom.coexist.ld for esp32c6
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group rom_coexist
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
esp_coex_rom_version_get = 0x40000afc;
|
||||
coex_bt_release = 0x40000b00;
|
||||
coex_bt_request = 0x40000b04;
|
||||
coex_core_ble_conn_dyn_prio_get = 0x40000b08;
|
||||
/*coex_core_event_duration_get = 0x40000b0c;*/
|
||||
coex_core_pti_get = 0x40000b10;
|
||||
coex_core_release = 0x40000b14;
|
||||
coex_core_request = 0x40000b18;
|
||||
coex_core_status_get = 0x40000b1c;
|
||||
/*coex_core_timer_idx_get = 0x40000b20;*/
|
||||
coex_event_duration_get = 0x40000b24;
|
||||
coex_hw_timer_disable = 0x40000b28;
|
||||
coex_hw_timer_enable = 0x40000b2c;
|
||||
coex_hw_timer_set = 0x40000b30;
|
||||
coex_schm_interval_set = 0x40000b34;
|
||||
coex_schm_lock = 0x40000b38;
|
||||
coex_schm_unlock = 0x40000b3c;
|
||||
coex_status_get = 0x40000b40;
|
||||
coex_wifi_release = 0x40000b44;
|
||||
esp_coex_ble_conn_dynamic_prio_get = 0x40000b48;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
coex_env_ptr = 0x4087ffc4;
|
||||
coex_pti_tab_ptr = 0x4087ffc0;
|
||||
coex_schm_env_ptr = 0x4087ffbc;
|
||||
coexist_funcs = 0x4087ffb8;
|
||||
g_coa_funcs_p = 0x4087ffb4;
|
||||
g_coex_param_ptr = 0x4087ffb0;
|
80
esp-hal/ld/esp32c6/rom/esp32c6.rom.heap.ld
Normal file
80
esp-hal/ld/esp32c6/rom/esp32c6.rom.heap.ld
Normal file
@ -0,0 +1,80 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32c6.rom.heap.ld for esp32c6
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group heap
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
tlsf_create = 0x400003fc;
|
||||
tlsf_create_with_pool = 0x40000400;
|
||||
tlsf_get_pool = 0x40000404;
|
||||
tlsf_add_pool = 0x40000408;
|
||||
tlsf_remove_pool = 0x4000040c;
|
||||
tlsf_malloc = 0x40000410;
|
||||
tlsf_memalign = 0x40000414;
|
||||
tlsf_memalign_offs = 0x40000418;
|
||||
tlsf_realloc = 0x4000041c;
|
||||
tlsf_free = 0x40000420;
|
||||
tlsf_block_size = 0x40000424;
|
||||
tlsf_size = 0x40000428;
|
||||
tlsf_align_size = 0x4000042c;
|
||||
tlsf_block_size_min = 0x40000430;
|
||||
tlsf_block_size_max = 0x40000434;
|
||||
tlsf_pool_overhead = 0x40000438;
|
||||
tlsf_alloc_overhead = 0x4000043c;
|
||||
tlsf_walk_pool = 0x40000440;
|
||||
tlsf_check = 0x40000444;
|
||||
tlsf_poison_fill_pfunc_set = 0x4000044c;
|
||||
tlsf_poison_check_pfunc_set = 0x40000450;
|
||||
multi_heap_get_block_address_impl = 0x40000454;
|
||||
multi_heap_get_allocated_size_impl = 0x40000458;
|
||||
multi_heap_register_impl = 0x4000045c;
|
||||
multi_heap_set_lock = 0x40000460;
|
||||
multi_heap_mutex_init = 0x40000464;
|
||||
multi_heap_internal_lock = 0x40000468;
|
||||
multi_heap_internal_unlock = 0x4000046c;
|
||||
multi_heap_get_first_block = 0x40000470;
|
||||
multi_heap_get_next_block = 0x40000474;
|
||||
multi_heap_is_free = 0x40000478;
|
||||
multi_heap_malloc_impl = 0x4000047c;
|
||||
multi_heap_free_impl = 0x40000480;
|
||||
multi_heap_realloc_impl = 0x40000484;
|
||||
multi_heap_aligned_alloc_impl_offs = 0x40000488;
|
||||
multi_heap_aligned_alloc_impl = 0x4000048c;
|
||||
multi_heap_check = 0x40000490;
|
||||
multi_heap_dump = 0x40000494;
|
||||
multi_heap_free_size_impl = 0x40000498;
|
||||
multi_heap_minimum_free_size_impl = 0x4000049c;
|
||||
multi_heap_get_info_impl = 0x400004a0;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
heap_tlsf_table_ptr = 0x4087ffd8;
|
||||
|
||||
PROVIDE (multi_heap_malloc = multi_heap_malloc_impl);
|
||||
PROVIDE (multi_heap_free = multi_heap_free_impl);
|
||||
PROVIDE (multi_heap_realloc = multi_heap_realloc_impl);
|
||||
PROVIDE (multi_heap_get_allocated_size = multi_heap_get_allocated_size_impl);
|
||||
PROVIDE (multi_heap_register = multi_heap_register_impl);
|
||||
PROVIDE (multi_heap_get_info = multi_heap_get_info_impl);
|
||||
PROVIDE (multi_heap_free_size = multi_heap_free_size_impl);
|
||||
PROVIDE (multi_heap_minimum_free_size = multi_heap_minimum_free_size_impl);
|
||||
PROVIDE (multi_heap_get_block_address = multi_heap_get_block_address_impl);
|
||||
PROVIDE (multi_heap_aligned_alloc = multi_heap_aligned_alloc_impl);
|
||||
PROVIDE (multi_heap_aligned_free = multi_heap_aligned_free_impl);
|
||||
PROVIDE (multi_heap_check = multi_heap_check);
|
||||
PROVIDE (multi_heap_set_lock = multi_heap_set_lock);
|
||||
PROVIDE (multi_heap_os_funcs_init = multi_heap_mutex_init);
|
||||
PROVIDE (multi_heap_internal_lock = multi_heap_internal_lock);
|
||||
PROVIDE (multi_heap_internal_unlock = multi_heap_internal_unlock);
|
439
esp-hal/ld/esp32c6/rom/esp32c6.rom.ld
Normal file
439
esp-hal/ld/esp32c6/rom/esp32c6.rom.ld
Normal file
@ -0,0 +1,439 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32c6.rom.ld for esp32c6
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group common
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
rtc_get_reset_reason = 0x40000018;
|
||||
analog_super_wdt_reset_happened = 0x4000001c;
|
||||
rtc_get_wakeup_cause = 0x40000020;
|
||||
rtc_unhold_all_pads = 0x40000024;
|
||||
ets_printf = 0x40000028;
|
||||
ets_install_putc1 = 0x4000002c;
|
||||
ets_install_putc2 = 0x40000030;
|
||||
ets_install_uart_printf = 0x40000034;
|
||||
ets_install_usb_printf = 0x40000038;
|
||||
ets_get_printf_channel = 0x4000003c;
|
||||
ets_delay_us = 0x40000040;
|
||||
ets_get_cpu_frequency = 0x40000044;
|
||||
ets_update_cpu_frequency = 0x40000048;
|
||||
ets_install_lock = 0x4000004c;
|
||||
UartRxString = 0x40000050;
|
||||
UartGetCmdLn = 0x40000054;
|
||||
uart_tx_one_char = 0x40000058;
|
||||
uart_tx_one_char2 = 0x4000005c;
|
||||
uart_rx_one_char = 0x40000060;
|
||||
uart_rx_one_char_block = 0x40000064;
|
||||
uart_rx_intr_handler = 0x40000068;
|
||||
uart_rx_readbuff = 0x4000006c;
|
||||
uartAttach = 0x40000070;
|
||||
uart_tx_flush = 0x40000074;
|
||||
uart_tx_wait_idle = 0x40000078;
|
||||
uart_div_modify = 0x4000007c;
|
||||
ets_write_char_uart = 0x40000080;
|
||||
uart_tx_switch = 0x40000084;
|
||||
roundup2 = 0x40000088;
|
||||
multofup = 0x4000008c;
|
||||
software_reset = 0x40000090;
|
||||
software_reset_cpu = 0x40000094;
|
||||
ets_clk_assist_debug_clock_enable = 0x40000098;
|
||||
clear_super_wdt_reset_flag = 0x4000009c;
|
||||
disable_default_watchdog = 0x400000a0;
|
||||
esp_rom_set_rtc_wake_addr = 0x400000a4;
|
||||
esp_rom_get_rtc_wake_addr = 0x400000a8;
|
||||
send_packet = 0x400000ac;
|
||||
recv_packet = 0x400000b0;
|
||||
GetUartDevice = 0x400000b4;
|
||||
UartDwnLdProc = 0x400000b8;
|
||||
GetSecurityInfoProc = 0x400000bc;
|
||||
Uart_Init = 0x400000c0;
|
||||
ets_set_user_start = 0x400000c4;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
ets_rom_layout_p = 0x4004fffc;
|
||||
ets_ops_table_ptr = 0x4087fff8;
|
||||
g_saved_pc = 0x4087fffc;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group miniz
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
mz_adler32 = 0x400000c8;
|
||||
mz_free = 0x400000cc;
|
||||
tdefl_compress = 0x400000d0;
|
||||
tdefl_compress_buffer = 0x400000d4;
|
||||
tdefl_compress_mem_to_heap = 0x400000d8;
|
||||
tdefl_compress_mem_to_mem = 0x400000dc;
|
||||
tdefl_compress_mem_to_output = 0x400000e0;
|
||||
tdefl_get_adler32 = 0x400000e4;
|
||||
tdefl_get_prev_return_status = 0x400000e8;
|
||||
tdefl_init = 0x400000ec;
|
||||
tdefl_write_image_to_png_file_in_memory = 0x400000f0;
|
||||
tdefl_write_image_to_png_file_in_memory_ex = 0x400000f4;
|
||||
tinfl_decompress = 0x400000f8;
|
||||
tinfl_decompress_mem_to_callback = 0x400000fc;
|
||||
tinfl_decompress_mem_to_heap = 0x40000100;
|
||||
tinfl_decompress_mem_to_mem = 0x40000104;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group tjpgd
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
jd_prepare = 0x40000108;
|
||||
jd_decomp = 0x4000010c;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group spiflash_legacy
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
esp_rom_spiflash_wait_idle = 0x40000110;
|
||||
esp_rom_spiflash_write_encrypted = 0x40000114;
|
||||
esp_rom_spiflash_write_encrypted_dest = 0x40000118;
|
||||
esp_rom_spiflash_write_encrypted_enable = 0x4000011c;
|
||||
esp_rom_spiflash_write_encrypted_disable = 0x40000120;
|
||||
esp_rom_spiflash_erase_chip = 0x40000124;
|
||||
_esp_rom_spiflash_erase_sector = 0x40000128;
|
||||
_esp_rom_spiflash_erase_block = 0x4000012c;
|
||||
_esp_rom_spiflash_write = 0x40000130;
|
||||
_esp_rom_spiflash_read = 0x40000134;
|
||||
_esp_rom_spiflash_unlock = 0x40000138;
|
||||
_SPIEraseArea = 0x4000013c;
|
||||
_SPI_write_enable = 0x40000140;
|
||||
esp_rom_spiflash_erase_sector = 0x40000144;
|
||||
esp_rom_spiflash_erase_block = 0x40000148;
|
||||
esp_rom_spiflash_write = 0x4000014c;
|
||||
esp_rom_spiflash_read = 0x40000150;
|
||||
esp_rom_spiflash_unlock = 0x40000154;
|
||||
SPIEraseArea = 0x40000158;
|
||||
SPI_write_enable = 0x4000015c;
|
||||
esp_rom_spiflash_config_param = 0x40000160;
|
||||
esp_rom_spiflash_read_user_cmd = 0x40000164;
|
||||
esp_rom_spiflash_select_qio_pins = 0x40000168;
|
||||
esp_rom_spi_flash_auto_sus_res = 0x4000016c;
|
||||
esp_rom_spi_flash_send_resume = 0x40000170;
|
||||
esp_rom_spi_flash_update_id = 0x40000174;
|
||||
esp_rom_spiflash_config_clk = 0x40000178;
|
||||
esp_rom_spiflash_config_readmode = 0x4000017c;
|
||||
esp_rom_spiflash_read_status = 0x40000180;
|
||||
esp_rom_spiflash_read_statushigh = 0x40000184;
|
||||
esp_rom_spiflash_write_status = 0x40000188;
|
||||
spi_cache_mode_switch = 0x4000018c;
|
||||
spi_common_set_dummy_output = 0x40000190;
|
||||
spi_common_set_flash_cs_timing = 0x40000194;
|
||||
esp_rom_spi_set_address_bit_len = 0x40000198;
|
||||
SPILock = 0x4000019c;
|
||||
SPIMasterReadModeCnfig = 0x400001a0;
|
||||
SPI_Common_Command = 0x400001a4;
|
||||
SPI_WakeUp = 0x400001a8;
|
||||
SPI_block_erase = 0x400001ac;
|
||||
SPI_chip_erase = 0x400001b0;
|
||||
SPI_init = 0x400001b4;
|
||||
SPI_page_program = 0x400001b8;
|
||||
SPI_read_data = 0x400001bc;
|
||||
SPI_sector_erase = 0x400001c0;
|
||||
SelectSpiFunction = 0x400001c4;
|
||||
SetSpiDrvs = 0x400001c8;
|
||||
Wait_SPI_Idle = 0x400001cc;
|
||||
spi_dummy_len_fix = 0x400001d0;
|
||||
Disable_QMode = 0x400001d4;
|
||||
Enable_QMode = 0x400001d8;
|
||||
spi_flash_attach = 0x400001dc;
|
||||
spi_flash_get_chip_size = 0x400001e0;
|
||||
spi_flash_guard_set = 0x400001e4;
|
||||
spi_flash_guard_get = 0x400001e8;
|
||||
spi_flash_read_encrypted = 0x400001ec;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
rom_spiflash_legacy_funcs = 0x4087fff0;
|
||||
rom_spiflash_legacy_data = 0x4087ffec;
|
||||
g_flash_guard_ops = 0x4087fff4;
|
||||
|
||||
/* Note: esp_rom_spiflash_write_disable was moved from esp32c6.rom.spiflash.ld */
|
||||
esp_rom_spiflash_write_disable = 0x40000278;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group cache
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
Cache_Get_ICache_Line_Size = 0x40000628;
|
||||
Cache_Get_Mode = 0x4000062c;
|
||||
Cache_Address_Through_Cache = 0x40000630;
|
||||
ROM_Boot_Cache_Init = 0x40000634;
|
||||
MMU_Set_Page_Mode = 0x40000638;
|
||||
MMU_Get_Page_Mode = 0x4000063c;
|
||||
Cache_Invalidate_ICache_Items = 0x40000640;
|
||||
Cache_Op_Addr = 0x40000644;
|
||||
Cache_Invalidate_Addr = 0x40000648;
|
||||
Cache_Invalidate_ICache_All = 0x4000064c;
|
||||
Cache_Mask_All = 0x40000650;
|
||||
Cache_UnMask_Dram0 = 0x40000654;
|
||||
Cache_Suspend_ICache_Autoload = 0x40000658;
|
||||
Cache_Resume_ICache_Autoload = 0x4000065c;
|
||||
Cache_Start_ICache_Preload = 0x40000660;
|
||||
Cache_ICache_Preload_Done = 0x40000664;
|
||||
Cache_End_ICache_Preload = 0x40000668;
|
||||
Cache_Config_ICache_Autoload = 0x4000066c;
|
||||
Cache_Enable_ICache_Autoload = 0x40000670;
|
||||
Cache_Disable_ICache_Autoload = 0x40000674;
|
||||
Cache_Enable_ICache_PreLock = 0x40000678;
|
||||
Cache_Disable_ICache_PreLock = 0x4000067c;
|
||||
Cache_Lock_ICache_Items = 0x40000680;
|
||||
Cache_Unlock_ICache_Items = 0x40000684;
|
||||
Cache_Lock_Addr = 0x40000688;
|
||||
Cache_Unlock_Addr = 0x4000068c;
|
||||
Cache_Disable_ICache = 0x40000690;
|
||||
Cache_Enable_ICache = 0x40000694;
|
||||
Cache_Suspend_ICache = 0x40000698;
|
||||
Cache_Resume_ICache = 0x4000069c;
|
||||
Cache_Freeze_ICache_Enable = 0x400006a0;
|
||||
Cache_Freeze_ICache_Disable = 0x400006a4;
|
||||
Cache_Set_IDROM_MMU_Size = 0x400006a8;
|
||||
Cache_Get_IROM_MMU_End = 0x400006ac;
|
||||
Cache_Get_DROM_MMU_End = 0x400006b0;
|
||||
Cache_MMU_Init = 0x400006b4;
|
||||
Cache_MSPI_MMU_Set = 0x400006b8;
|
||||
Cache_Travel_Tag_Memory = 0x400006bc;
|
||||
Cache_Get_Virtual_Addr = 0x400006c0;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
rom_cache_op_cb = 0x4087ffcc;
|
||||
rom_cache_internal_table_ptr = 0x4087ffc8;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group clock
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
ets_clk_get_xtal_freq = 0x400006c4;
|
||||
ets_clk_get_cpu_freq = 0x400006c8;
|
||||
ets_clk_apb_wait_ready = 0x400006cc;
|
||||
ets_clk_mspi_apb_wait_ready = 0x400006d0;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group gpio
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
gpio_input_get = 0x400006d4;
|
||||
gpio_matrix_in = 0x400006d8;
|
||||
gpio_matrix_out = 0x400006dc;
|
||||
gpio_output_disable = 0x400006e0;
|
||||
gpio_output_enable = 0x400006e4;
|
||||
gpio_output_set = 0x400006e8;
|
||||
gpio_pad_hold = 0x400006ec;
|
||||
gpio_pad_input_disable = 0x400006f0;
|
||||
gpio_pad_input_enable = 0x400006f4;
|
||||
gpio_pad_pulldown = 0x400006f8;
|
||||
gpio_pad_pullup = 0x400006fc;
|
||||
gpio_pad_select_gpio = 0x40000700;
|
||||
gpio_pad_set_drv = 0x40000704;
|
||||
gpio_pad_unhold = 0x40000708;
|
||||
gpio_pin_wakeup_disable = 0x4000070c;
|
||||
gpio_pin_wakeup_enable = 0x40000710;
|
||||
gpio_bypass_matrix_in = 0x40000714;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group interrupts
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
esprv_intc_int_set_priority = 0x40000718;
|
||||
esprv_intc_int_set_threshold = 0x4000071c;
|
||||
esprv_intc_int_enable = 0x40000720;
|
||||
esprv_intc_int_disable = 0x40000724;
|
||||
esprv_intc_int_set_type = 0x40000728;
|
||||
PROVIDE( intr_handler_set = 0x4000072c );
|
||||
intr_matrix_set = 0x40000730;
|
||||
ets_intr_lock = 0x40000734;
|
||||
ets_intr_unlock = 0x40000738;
|
||||
ets_isr_attach = 0x4000073c;
|
||||
ets_isr_mask = 0x40000740;
|
||||
ets_isr_unmask = 0x40000744;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group crypto
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
md5_vector = 0x40000748;
|
||||
MD5Init = 0x4000074c;
|
||||
MD5Update = 0x40000750;
|
||||
MD5Final = 0x40000754;
|
||||
crc32_le = 0x40000758;
|
||||
crc16_le = 0x4000075c;
|
||||
crc8_le = 0x40000760;
|
||||
crc32_be = 0x40000764;
|
||||
crc16_be = 0x40000768;
|
||||
crc8_be = 0x4000076c;
|
||||
esp_crc8 = 0x40000770;
|
||||
ets_sha_enable = 0x40000774;
|
||||
ets_sha_disable = 0x40000778;
|
||||
ets_sha_get_state = 0x4000077c;
|
||||
ets_sha_init = 0x40000780;
|
||||
ets_sha_process = 0x40000784;
|
||||
ets_sha_starts = 0x40000788;
|
||||
ets_sha_update = 0x4000078c;
|
||||
ets_sha_finish = 0x40000790;
|
||||
ets_sha_clone = 0x40000794;
|
||||
ets_hmac_enable = 0x40000798;
|
||||
ets_hmac_disable = 0x4000079c;
|
||||
ets_hmac_calculate_message = 0x400007a0;
|
||||
ets_hmac_calculate_downstream = 0x400007a4;
|
||||
ets_hmac_invalidate_downstream = 0x400007a8;
|
||||
ets_jtag_enable_temporarily = 0x400007ac;
|
||||
ets_aes_enable = 0x400007b0;
|
||||
ets_aes_disable = 0x400007b4;
|
||||
ets_aes_setkey = 0x400007b8;
|
||||
ets_aes_block = 0x400007bc;
|
||||
ets_aes_setkey_dec = 0x400007c0;
|
||||
ets_aes_setkey_enc = 0x400007c4;
|
||||
ets_bigint_enable = 0x400007c8;
|
||||
ets_bigint_disable = 0x400007cc;
|
||||
ets_bigint_multiply = 0x400007d0;
|
||||
ets_bigint_modmult = 0x400007d4;
|
||||
ets_bigint_modexp = 0x400007d8;
|
||||
ets_bigint_wait_finish = 0x400007dc;
|
||||
ets_bigint_getz = 0x400007e0;
|
||||
ets_ds_enable = 0x400007e4;
|
||||
ets_ds_disable = 0x400007e8;
|
||||
ets_ds_start_sign = 0x400007ec;
|
||||
ets_ds_is_busy = 0x400007f0;
|
||||
ets_ds_finish_sign = 0x400007f4;
|
||||
ets_ds_encrypt_params = 0x400007f8;
|
||||
ets_mgf1_sha256 = 0x400007fc;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
crc32_le_table_ptr = 0x4004fff8;
|
||||
crc16_le_table_ptr = 0x4004fff4;
|
||||
crc8_le_table_ptr = 0x4004fff0;
|
||||
crc32_be_table_ptr = 0x4004ffec;
|
||||
crc16_be_table_ptr = 0x4004ffe8;
|
||||
crc8_be_table_ptr = 0x4004ffe4;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group efuse
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
ets_efuse_read = 0x40000800;
|
||||
ets_efuse_program = 0x40000804;
|
||||
ets_efuse_clear_program_registers = 0x40000808;
|
||||
ets_efuse_write_key = 0x4000080c;
|
||||
ets_efuse_get_read_register_address = 0x40000810;
|
||||
ets_efuse_get_key_purpose = 0x40000814;
|
||||
ets_efuse_key_block_unused = 0x40000818;
|
||||
ets_efuse_find_unused_key_block = 0x4000081c;
|
||||
ets_efuse_rs_calculate = 0x40000820;
|
||||
ets_efuse_count_unused_key_blocks = 0x40000824;
|
||||
ets_efuse_secure_boot_enabled = 0x40000828;
|
||||
ets_efuse_secure_boot_aggressive_revoke_enabled = 0x4000082c;
|
||||
ets_efuse_cache_encryption_enabled = 0x40000830;
|
||||
ets_efuse_download_modes_disabled = 0x40000834;
|
||||
ets_efuse_find_purpose = 0x40000838;
|
||||
ets_efuse_force_send_resume = 0x4000083c;
|
||||
ets_efuse_get_flash_delay_us = 0x40000840;
|
||||
ets_efuse_get_mac = 0x40000844;
|
||||
ets_efuse_get_uart_print_control = 0x40000848;
|
||||
ets_efuse_direct_boot_mode_disabled = 0x4000084c;
|
||||
ets_efuse_security_download_modes_enabled = 0x40000850;
|
||||
ets_efuse_set_timing = 0x40000854;
|
||||
ets_efuse_jtag_disabled = 0x40000858;
|
||||
ets_efuse_usb_print_is_disabled = 0x4000085c;
|
||||
ets_efuse_usb_download_mode_disabled = 0x40000860;
|
||||
ets_efuse_usb_device_disabled = 0x40000864;
|
||||
ets_efuse_secure_boot_fast_wake_enabled = 0x40000868;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group secureboot
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
ets_emsa_pss_verify = 0x4000086c;
|
||||
ets_rsa_pss_verify = 0x40000870;
|
||||
ets_secure_boot_verify_bootloader_with_keys = 0x40000874;
|
||||
ets_secure_boot_verify_signature = 0x40000878;
|
||||
ets_secure_boot_read_key_digests = 0x4000087c;
|
||||
ets_secure_boot_revoke_public_key_digest = 0x40000880;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group usb_device_uart
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
usb_serial_device_rx_one_char = 0x40000a80;
|
||||
usb_serial_device_rx_one_char_block = 0x40000a84;
|
||||
usb_serial_device_tx_flush = 0x40000a88;
|
||||
usb_serial_device_tx_one_char = 0x40000a8c;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group lldesc
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
lldesc_build_chain = 0x40000a90;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group sip
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
sip_after_tx_complete = 0x40000a94;
|
||||
sip_alloc_to_host_evt = 0x40000a98;
|
||||
sip_download_begin = 0x40000a9c;
|
||||
sip_get_ptr = 0x40000aa0;
|
||||
sip_get_state = 0x40000aa4;
|
||||
sip_init_attach = 0x40000aa8;
|
||||
sip_install_rx_ctrl_cb = 0x40000aac;
|
||||
sip_install_rx_data_cb = 0x40000ab0;
|
||||
sip_is_active = 0x40000ab4;
|
||||
sip_post_init = 0x40000ab8;
|
||||
sip_reclaim_from_host_cmd = 0x40000abc;
|
||||
sip_reclaim_tx_data_pkt = 0x40000ac0;
|
||||
sip_send = 0x40000ac4;
|
||||
sip_to_host_chain_append = 0x40000ac8;
|
||||
sip_to_host_evt_send_done = 0x40000acc;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group slc
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
slc_add_credits = 0x40000ad0;
|
||||
slc_enable = 0x40000ad4;
|
||||
slc_from_host_chain_fetch = 0x40000ad8;
|
||||
slc_from_host_chain_recycle = 0x40000adc;
|
||||
slc_has_pkt_to_host = 0x40000ae0;
|
||||
slc_init_attach = 0x40000ae4;
|
||||
slc_init_credit = 0x40000ae8;
|
||||
slc_reattach = 0x40000aec;
|
||||
slc_send_to_host_chain = 0x40000af0;
|
||||
slc_set_host_io_max_window = 0x40000af4;
|
||||
slc_to_host_chain_recycle = 0x40000af8;
|
112
esp-hal/ld/esp32c6/rom/esp32c6.rom.libgcc.ld
Normal file
112
esp-hal/ld/esp32c6/rom/esp32c6.rom.libgcc.ld
Normal file
@ -0,0 +1,112 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32c6.rom.libgcc.ld for esp32c6
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group libgcc
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
__absvdi2 = 0x40000884;
|
||||
__absvsi2 = 0x40000888;
|
||||
__adddf3 = 0x4000088c;
|
||||
__addsf3 = 0x40000890;
|
||||
__addvdi3 = 0x40000894;
|
||||
__addvsi3 = 0x40000898;
|
||||
__ashldi3 = 0x4000089c;
|
||||
__ashrdi3 = 0x400008a0;
|
||||
__bswapdi2 = 0x400008a4;
|
||||
__bswapsi2 = 0x400008a8;
|
||||
__clear_cache = 0x400008ac;
|
||||
__clrsbdi2 = 0x400008b0;
|
||||
__clrsbsi2 = 0x400008b4;
|
||||
__clzdi2 = 0x400008b8;
|
||||
__clzsi2 = 0x400008bc;
|
||||
__cmpdi2 = 0x400008c0;
|
||||
__ctzdi2 = 0x400008c4;
|
||||
__ctzsi2 = 0x400008c8;
|
||||
__divdc3 = 0x400008cc;
|
||||
__divdf3 = 0x400008d0;
|
||||
__divdi3 = 0x400008d4;
|
||||
__divsc3 = 0x400008d8;
|
||||
__divsf3 = 0x400008dc;
|
||||
__divsi3 = 0x400008e0;
|
||||
__eqdf2 = 0x400008e4;
|
||||
__eqsf2 = 0x400008e8;
|
||||
__extendsfdf2 = 0x400008ec;
|
||||
__ffsdi2 = 0x400008f0;
|
||||
__ffssi2 = 0x400008f4;
|
||||
__fixdfdi = 0x400008f8;
|
||||
__fixdfsi = 0x400008fc;
|
||||
__fixsfdi = 0x40000900;
|
||||
__fixsfsi = 0x40000904;
|
||||
__fixunsdfsi = 0x40000908;
|
||||
__fixunssfdi = 0x4000090c;
|
||||
__fixunssfsi = 0x40000910;
|
||||
__floatdidf = 0x40000914;
|
||||
__floatdisf = 0x40000918;
|
||||
__floatsidf = 0x4000091c;
|
||||
__floatsisf = 0x40000920;
|
||||
__floatundidf = 0x40000924;
|
||||
__floatundisf = 0x40000928;
|
||||
__floatunsidf = 0x4000092c;
|
||||
__floatunsisf = 0x40000930;
|
||||
__gcc_bcmp = 0x40000934;
|
||||
__gedf2 = 0x40000938;
|
||||
__gesf2 = 0x4000093c;
|
||||
__gtdf2 = 0x40000940;
|
||||
__gtsf2 = 0x40000944;
|
||||
__ledf2 = 0x40000948;
|
||||
__lesf2 = 0x4000094c;
|
||||
__lshrdi3 = 0x40000950;
|
||||
__ltdf2 = 0x40000954;
|
||||
__ltsf2 = 0x40000958;
|
||||
__moddi3 = 0x4000095c;
|
||||
__modsi3 = 0x40000960;
|
||||
__muldc3 = 0x40000964;
|
||||
__muldf3 = 0x40000968;
|
||||
__muldi3 = 0x4000096c;
|
||||
__mulsc3 = 0x40000970;
|
||||
__mulsf3 = 0x40000974;
|
||||
__mulsi3 = 0x40000978;
|
||||
__mulvdi3 = 0x4000097c;
|
||||
__mulvsi3 = 0x40000980;
|
||||
__nedf2 = 0x40000984;
|
||||
__negdf2 = 0x40000988;
|
||||
__negdi2 = 0x4000098c;
|
||||
__negsf2 = 0x40000990;
|
||||
__negvdi2 = 0x40000994;
|
||||
__negvsi2 = 0x40000998;
|
||||
__nesf2 = 0x4000099c;
|
||||
__paritysi2 = 0x400009a0;
|
||||
__popcountdi2 = 0x400009a4;
|
||||
__popcountsi2 = 0x400009a8;
|
||||
__powidf2 = 0x400009ac;
|
||||
__powisf2 = 0x400009b0;
|
||||
__subdf3 = 0x400009b4;
|
||||
__subsf3 = 0x400009b8;
|
||||
__subvdi3 = 0x400009bc;
|
||||
__subvsi3 = 0x400009c0;
|
||||
__truncdfsf2 = 0x400009c4;
|
||||
__ucmpdi2 = 0x400009c8;
|
||||
__udivdi3 = 0x400009cc;
|
||||
__udivmoddi4 = 0x400009d0;
|
||||
__udivsi3 = 0x400009d4;
|
||||
__udiv_w_sdiv = 0x400009d8;
|
||||
__umoddi3 = 0x400009dc;
|
||||
__umodsi3 = 0x400009e0;
|
||||
__unorddf2 = 0x400009e4;
|
||||
__unordsf2 = 0x400009e8;
|
||||
__extenddftf2 = 0x400009ec;
|
||||
__trunctfdf2 = 0x400009f0;
|
67
esp-hal/ld/esp32c6/rom/esp32c6.rom.net80211.ld
Normal file
67
esp-hal/ld/esp32c6/rom/esp32c6.rom.net80211.ld
Normal file
@ -0,0 +1,67 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32c6.rom.net80211.ld for esp32c6
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group rom_net80211
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
esp_net80211_rom_version_get = 0x40000b4c;
|
||||
ampdu_dispatch = 0x40000b50;
|
||||
ampdu_dispatch_all = 0x40000b54;
|
||||
ampdu_dispatch_as_many_as_possible = 0x40000b58;
|
||||
ampdu_dispatch_movement = 0x40000b5c;
|
||||
ampdu_dispatch_upto = 0x40000b60;
|
||||
chm_is_at_home_channel = 0x40000b64;
|
||||
cnx_node_is_existing = 0x40000b68;
|
||||
cnx_node_search = 0x40000b6c;
|
||||
ic_ebuf_recycle_rx = 0x40000b70;
|
||||
ic_ebuf_recycle_tx = 0x40000b74;
|
||||
ic_reset_rx_ba = 0x40000b78;
|
||||
ieee80211_align_eb = 0x40000b7c;
|
||||
/*ieee80211_ampdu_reorder = 0x40000b80;*/
|
||||
ieee80211_ampdu_start_age_timer = 0x40000b84;
|
||||
/*ieee80211_encap_esfbuf = 0x40000b88;*/
|
||||
ieee80211_is_tx_allowed = 0x40000b8c;
|
||||
ieee80211_output_pending_eb = 0x40000b90;
|
||||
/*ieee80211_output_process = 0x40000b94;*/
|
||||
//ieee80211_set_tx_desc = 0x40000b98;
|
||||
//sta_input = 0x40000b9c;
|
||||
wifi_get_macaddr = 0x40000ba0;
|
||||
wifi_rf_phy_disable = 0x40000ba4;
|
||||
wifi_rf_phy_enable = 0x40000ba8;
|
||||
ic_ebuf_alloc = 0x40000bac;
|
||||
/*ieee80211_classify = 0x40000bb0;*/
|
||||
ieee80211_copy_eb_header = 0x40000bb4;
|
||||
ieee80211_recycle_cache_eb = 0x40000bb8;
|
||||
ieee80211_search_node = 0x40000bbc;
|
||||
ieee80211_crypto_encap = 0x40000bc0;
|
||||
/* ieee80211_crypto_decap = 0x40000bc4; */
|
||||
ieee80211_decap = 0x40000bc8;
|
||||
wifi_is_started = 0x40000bcc;
|
||||
ieee80211_gettid = 0x40000bd0;
|
||||
//ieee80211_encap_esfbuf_htc = 0x40000bd4;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
net80211_funcs = 0x4087ffac;
|
||||
g_scan = 0x4087ffa8;
|
||||
g_chm = 0x4087ffa4;
|
||||
g_ic_ptr = 0x4087ffa0;
|
||||
g_hmac_cnt_ptr = 0x4087ff9c;
|
||||
g_tx_cacheq_ptr = 0x4087ff98;
|
||||
s_netstack_free = 0x4087ff94;
|
||||
mesh_rxcb = 0x4087ff90;
|
||||
sta_rxcb = 0x4087ff8c;
|
||||
g_itwt_fid = 0x4087ff88;
|
||||
esp_test_tx_addba_request = 0x4087ff84;
|
245
esp-hal/ld/esp32c6/rom/esp32c6.rom.phy.ld
Normal file
245
esp-hal/ld/esp32c6/rom/esp32c6.rom.phy.ld
Normal file
@ -0,0 +1,245 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32c6.rom.phy.ld for esp32c6
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group rom_phy
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
phy_param_addr = 0x40001104;
|
||||
phy_get_romfuncs = 0x40001108;
|
||||
chip761_phyrom_version = 0x4000110c;
|
||||
chip761_phyrom_version_num = 0x40001110;
|
||||
get_rc_dout = 0x40001114;
|
||||
rc_cal = 0x40001118;
|
||||
rom_enter_critical_phy = 0x4000111c;
|
||||
rom_exit_critical_phy = 0x40001120;
|
||||
rom_set_chan_cal_interp = 0x40001124;
|
||||
rom_loopback_mode_en = 0x40001128;
|
||||
rom_bb_bss_cbw40 = 0x4000112c;
|
||||
abs_temp = 0x40001130;
|
||||
get_data_sat = 0x40001134;
|
||||
phy_byte_to_word = 0x40001138;
|
||||
set_chan_reg = 0x4000113c;
|
||||
i2c_master_reset = 0x40001140;
|
||||
rom_set_chan_freq_sw_start = 0x40001144;
|
||||
freq_module_resetn = 0x40001148;
|
||||
freq_chan_en_sw = 0x4000114c;
|
||||
write_chan_freq = 0x40001150;
|
||||
get_freq_mem_param = 0x40001154;
|
||||
get_freq_mem_addr = 0x40001158;
|
||||
bt_txpwr_freq = 0x4000115c;
|
||||
wr_rf_freq_mem = 0x40001160;
|
||||
read_rf_freq_mem = 0x40001164;
|
||||
freq_i2c_mem_write = 0x40001168;
|
||||
freq_num_get_data = 0x4000116c;
|
||||
freq_i2c_num_addr = 0x40001170;
|
||||
freq_i2c_write_set = 0x40001174;
|
||||
pll_dac_mem_update = 0x40001178;
|
||||
pll_cap_mem_update = 0x4000117c;
|
||||
get_rf_freq_cap = 0x40001180;
|
||||
get_rf_freq_init = 0x40001184;
|
||||
phy_en_hw_set_freq = 0x40001188;
|
||||
phy_dis_hw_set_freq = 0x4000118c;
|
||||
rom_pwdet_sar2_init = 0x40001190;
|
||||
rom_en_pwdet = 0x40001194;
|
||||
rom_get_sar_sig_ref = 0x40001198;
|
||||
rom_pwdet_tone_start = 0x4000119c;
|
||||
rom_pwdet_wait_idle = 0x400011a0;
|
||||
rom_read_sar_dout = 0x400011a4;
|
||||
get_tone_sar_dout = 0x400011a8;
|
||||
get_fm_sar_dout = 0x400011ac;
|
||||
txtone_linear_pwr = 0x400011b0;
|
||||
linear_to_db = 0x400011b4;
|
||||
get_power_db = 0x400011b8;
|
||||
meas_tone_pwr_db = 0x400011bc;
|
||||
pkdet_vol_start = 0x400011c0;
|
||||
read_sar2_code = 0x400011c4;
|
||||
get_sar2_vol = 0x400011c8;
|
||||
get_pll_vol = 0x400011cc;
|
||||
tx_pwctrl_bg_init = 0x400011d0;
|
||||
phy_pwdet_always_en = 0x400011d4;
|
||||
phy_pwdet_onetime_en = 0x400011d8;
|
||||
esp_tx_state_out_rom = 0x400011dc;
|
||||
ant_dft_cfg_rom = 0x400011e0;
|
||||
ant_wifitx_cfg_rom = 0x400011e4;
|
||||
ant_wifirx_cfg_rom = 0x400011e8;
|
||||
ant_bttx_cfg_rom = 0x400011ec;
|
||||
ant_btrx_cfg_rom = 0x400011f0;
|
||||
phy_chan_dump_cfg_rom = 0x400011f4;
|
||||
phy_enable_low_rate = 0x400011f8;
|
||||
phy_disable_low_rate = 0x400011fc;
|
||||
phy_is_low_rate_enabled = 0x40001200;
|
||||
phy_dig_reg_backup_rom = 0x40001204;
|
||||
phy_chan_filt_set_rom = 0x40001208;
|
||||
phy_rx11blr_cfg = 0x4000120c;
|
||||
set_cca_rom = 0x40001210;
|
||||
set_rx_sense_rom = 0x40001214;
|
||||
rx_gain_force_rom = 0x40001218;
|
||||
rom_rfpll_set_freq = 0x4000121c;
|
||||
mhz2ieee = 0x40001220;
|
||||
chan_to_freq = 0x40001224;
|
||||
restart_cal = 0x40001228;
|
||||
write_rfpll_sdm = 0x4000122c;
|
||||
wait_rfpll_cal_end = 0x40001230;
|
||||
set_rf_freq_offset = 0x40001234;
|
||||
set_rfpll_freq = 0x40001238;
|
||||
set_channel_rfpll_freq = 0x4000123c;
|
||||
rfpll_cap_correct = 0x40001240;
|
||||
rfpll_cap_init_cal = 0x40001244;
|
||||
write_pll_cap = 0x40001248;
|
||||
read_pll_cap = 0x4000124c;
|
||||
chip_v7_set_chan_ana = 0x40001250;
|
||||
freq_set_reg = 0x40001254;
|
||||
gen_rx_gain_table = 0x40001258;
|
||||
bt_txdc_cal = 0x4000125c;
|
||||
bt_txiq_cal = 0x40001260;
|
||||
txiq_cal_init = 0x40001264;
|
||||
txdc_cal_init = 0x40001268;
|
||||
txdc_cal = 0x4000126c;
|
||||
txiq_get_mis_pwr = 0x40001270;
|
||||
txiq_cover = 0x40001274;
|
||||
rfcal_txiq = 0x40001278;
|
||||
get_power_atten = 0x4000127c;
|
||||
pwdet_ref_code = 0x40001280;
|
||||
pwdet_code_cal = 0x40001284;
|
||||
rfcal_txcap = 0x40001288;
|
||||
tx_cap_init = 0x4000128c;
|
||||
rfcal_pwrctrl = 0x40001290;
|
||||
tx_pwctrl_init_cal = 0x40001294;
|
||||
tx_pwctrl_init = 0x40001298;
|
||||
bt_tx_pwctrl_init = 0x4000129c;
|
||||
rom_i2c_enter_critical = 0x400012a0;
|
||||
rom_i2c_exit_critical = 0x400012a4;
|
||||
rom_get_i2c_read_mask = 0x400012a8;
|
||||
rom_get_i2c_mst0_mask = 0x400012ac;
|
||||
rom_get_i2c_hostid = 0x400012b0;
|
||||
rom_chip_i2c_readReg_org = 0x400012b4;
|
||||
rom_chip_i2c_readReg = 0x400012b8;
|
||||
rom_chip_i2c_writeReg = 0x400012c0;
|
||||
rom_set_txcap_reg = 0x400012d0;
|
||||
i2c_paral_set_mst0 = 0x400012d4;
|
||||
i2c_paral_set_read = 0x400012d8;
|
||||
i2c_paral_read = 0x400012dc;
|
||||
i2c_paral_write = 0x400012e0;
|
||||
i2c_paral_write_num = 0x400012e4;
|
||||
i2c_paral_write_mask = 0x400012e8;
|
||||
i2c_sar2_init_code = 0x400012ec;
|
||||
rom_pbus_force_mode = 0x400012f0;
|
||||
rom_pbus_rd_addr = 0x400012f4;
|
||||
rom_pbus_rd_shift = 0x400012f8;
|
||||
rom_pbus_force_test = 0x400012fc;
|
||||
rom_pbus_rd = 0x40001300;
|
||||
rom_pbus_set_rxgain = 0x40001304;
|
||||
rom_pbus_xpd_rx_off = 0x40001308;
|
||||
rom_pbus_xpd_rx_on = 0x4000130c;
|
||||
rom_pbus_xpd_tx_off = 0x40001310;
|
||||
rom_pbus_xpd_tx_on = 0x40001314;
|
||||
rom_set_loopback_gain = 0x40001318;
|
||||
rom_txcal_debuge_mode = 0x4000131c;
|
||||
pbus_debugmode = 0x40001320;
|
||||
pbus_workmode = 0x40001324;
|
||||
pbus_set_dco = 0x40001328;
|
||||
txcal_work_mode = 0x4000132c;
|
||||
rom_start_tx_tone_step = 0x40001330;
|
||||
rom_stop_tx_tone = 0x40001334;
|
||||
disable_agc = 0x40001338;
|
||||
enable_agc = 0x4000133c;
|
||||
phy_disable_cca = 0x40001340;
|
||||
phy_enable_cca = 0x40001344;
|
||||
write_gain_mem = 0x40001348;
|
||||
bb_bss_cbw40_dig = 0x4000134c;
|
||||
cbw2040_cfg = 0x40001350;
|
||||
mac_tx_chan_offset = 0x40001354;
|
||||
tx_paon_set = 0x40001358;
|
||||
pwdet_reg_init = 0x4000135c;
|
||||
i2cmst_reg_init = 0x40001360;
|
||||
bt_gain_offset = 0x40001364;
|
||||
fe_reg_init = 0x40001368;
|
||||
mac_enable_bb = 0x4000136c;
|
||||
bb_wdg_cfg = 0x40001370;
|
||||
fe_txrx_reset = 0x40001374;
|
||||
set_rx_comp = 0x40001378;
|
||||
agc_reg_init = 0x4000137c;
|
||||
bb_reg_init = 0x40001380;
|
||||
open_i2c_xpd = 0x40001384;
|
||||
txiq_set_reg = 0x40001388;
|
||||
rxiq_set_reg = 0x4000138c;
|
||||
set_txclk_en = 0x40001390;
|
||||
set_rxclk_en = 0x40001394;
|
||||
bb_wdg_test_en = 0x40001398;
|
||||
noise_floor_auto_set = 0x4000139c;
|
||||
read_hw_noisefloor = 0x400013a0;
|
||||
iq_corr_enable = 0x400013a4;
|
||||
wifi_agc_sat_gain = 0x400013a8;
|
||||
phy_bbpll_cal = 0x400013ac;
|
||||
phy_ant_init = 0x400013b0;
|
||||
phy_set_bbfreq_init = 0x400013b4;
|
||||
wifi_fbw_sel = 0x400013b8;
|
||||
bt_filter_reg = 0x400013bc;
|
||||
phy_rx_sense_set = 0x400013c0;
|
||||
tx_state_set = 0x400013c4;
|
||||
phy_close_pa = 0x400013c8;
|
||||
phy_freq_correct = 0x400013cc;
|
||||
set_pbus_reg = 0x400013d0;
|
||||
wifi_rifs_mode_en = 0x400013d4;
|
||||
nrx_freq_set = 0x400013d8;
|
||||
fe_adc_on = 0x400013dc;
|
||||
phy_force_pwr_index = 0x400013e0;
|
||||
rom_iq_est_enable = 0x400013e4;
|
||||
rom_iq_est_disable = 0x400013e8;
|
||||
rom_bb_gain_index = 0x400013ec;
|
||||
rom_rfrx_gain_index = 0x400013f0;
|
||||
dc_iq_est = 0x400013f4;
|
||||
set_cal_rxdc = 0x400013f8;
|
||||
rxiq_get_mis = 0x400013fc;
|
||||
rxiq_cover_mg_mp = 0x40001400;
|
||||
rfcal_rxiq = 0x40001404;
|
||||
get_rfcal_rxiq_data = 0x40001408;
|
||||
get_dco_comp = 0x4000140c;
|
||||
pbus_rx_dco_cal = 0x40001410;
|
||||
rxdc_est_min = 0x40001414;
|
||||
pbus_rx_dco_cal_1step = 0x40001418;
|
||||
set_lb_txiq = 0x4000141c;
|
||||
set_rx_gain_cal_iq = 0x40001420;
|
||||
set_rx_gain_cal_dc = 0x40001424;
|
||||
spur_reg_write_one_tone = 0x40001428;
|
||||
spur_cal = 0x4000142c;
|
||||
spur_coef_cfg = 0x40001430;
|
||||
tsens_power_up = 0x40001434;
|
||||
tsens_read_init = 0x40001438;
|
||||
code_to_temp = 0x4000143c;
|
||||
tsens_index_to_dac = 0x40001440;
|
||||
tsens_index_to_offset = 0x40001444;
|
||||
tsens_dac_cal = 0x40001448;
|
||||
tsens_code_read = 0x4000144c;
|
||||
tsens_temp_read = 0x40001450;
|
||||
temp_to_power = 0x40001454;
|
||||
get_temp_init = 0x40001458;
|
||||
txbbgain_to_index = 0x4000145c;
|
||||
index_to_txbbgain = 0x40001460;
|
||||
bt_index_to_bb = 0x40001464;
|
||||
bt_bb_to_index = 0x40001468;
|
||||
bt_get_tx_gain = 0x4000146c;
|
||||
dig_gain_check = 0x40001470;
|
||||
wifi_get_tx_gain = 0x40001474;
|
||||
wifi_11g_rate_chg = 0x40001478;
|
||||
bt_chan_pwr_interp = 0x4000147c;
|
||||
get_rate_fcc_index = 0x40001480;
|
||||
get_chan_target_power = 0x40001484;
|
||||
get_tx_gain_value = 0x40001488;
|
||||
wifi_get_target_power = 0x4000148c;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
phy_param_rom = 0x4087fce8;
|
459
esp-hal/ld/esp32c6/rom/esp32c6.rom.pp.ld
Normal file
459
esp-hal/ld/esp32c6/rom/esp32c6.rom.pp.ld
Normal file
@ -0,0 +1,459 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32c6.rom.pp.ld for esp32c6
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group rom_pp
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
esp_pp_rom_version_get = 0x40000bd8;
|
||||
ppCalTxopRTSThreshold = 0x40000bdc;
|
||||
RC_GetBlockAckTime = 0x40000be0;
|
||||
ebuf_list_remove = 0x40000be4;
|
||||
//esf_buf_alloc = 0x40000be8;
|
||||
//esf_buf_alloc_dynamic = 0x40000bec;
|
||||
//esf_buf_recycle = 0x40000bf0;
|
||||
GetAccess = 0x40000bf4;
|
||||
hal_mac_is_low_rate_enabled = 0x40000bf8;
|
||||
hal_mac_tx_get_blockack = 0x40000bfc;
|
||||
//hal_mac_tx_set_ppdu = 0x40000c00;
|
||||
ic_get_trc = 0x40000c04;
|
||||
//ic_mac_deinit = 0x40000c08;
|
||||
ic_mac_init = 0x40000c0c;
|
||||
ic_interface_enabled = 0x40000c10;
|
||||
is_lmac_idle = 0x40000c14;
|
||||
/*lmacAdjustTimestamp = 0x40000c18;*/
|
||||
lmacDiscardAgedMSDU = 0x40000c1c;
|
||||
/*lmacDiscardMSDU = 0x40000c20;*/
|
||||
/*lmacEndFrameExchangeSequence = 0x40000c24;*/
|
||||
lmacIsIdle = 0x40000c28;
|
||||
lmacIsLongFrame = 0x40000c2c;
|
||||
/*lmacMSDUAged = 0x40000c30;*/
|
||||
lmacPostTxComplete = 0x40000c34;
|
||||
lmacProcessAllTxTimeout = 0x40000c38;
|
||||
lmacProcessCollisions = 0x40000c3c;
|
||||
//lmacProcessRxSucData = 0x40000c40;
|
||||
lmacReachLongLimit = 0x40000c44;
|
||||
lmacReachShortLimit = 0x40000c48;
|
||||
lmacRecycleMPDU = 0x40000c4c;
|
||||
lmacRxDone = 0x40000c50;
|
||||
//lmacSetTxFrame = 0x40000c54;
|
||||
//lmacTxDone = 0x40000c58;
|
||||
//lmacTxFrame = 0x40000c5c;
|
||||
mac_tx_set_duration = 0x40000c60;
|
||||
//mac_tx_set_plcp0 = 0x40000c64;
|
||||
//mac_tx_set_plcp1 = 0x40000c68;
|
||||
mac_tx_set_plcp2 = 0x40000c6c;
|
||||
/* pm_check_state = 0x40000c70; */
|
||||
/* pm_disable_dream_timer = 0x40000c74; */
|
||||
pm_disable_sleep_delay_timer = 0x40000c78;
|
||||
/*pm_dream = 0x40000c7c;*/
|
||||
pm_mac_wakeup = 0x40000c80;
|
||||
pm_mac_sleep = 0x40000c84;
|
||||
//pm_enable_active_timer = 0x40000c88;
|
||||
pm_enable_sleep_delay_timer = 0x40000c8c;
|
||||
pm_local_tsf_process = 0x40000c90;
|
||||
//pm_set_beacon_filter = 0x40000c94;
|
||||
pm_is_in_wifi_slice_threshold = 0x40000c98;
|
||||
pm_is_waked = 0x40000c9c;
|
||||
//pm_keep_alive = 0x40000ca0;
|
||||
/* pm_on_beacon_rx = 0x40000ca4; */
|
||||
pm_on_data_rx = 0x40000ca8;
|
||||
//pm_on_tbtt = 0x40000cac;
|
||||
/* pm_parse_beacon = 0x40000cb0; */
|
||||
//pm_process_tim = 0x40000cb4;
|
||||
//pm_rx_beacon_process = 0x40000cb8;
|
||||
/* pm_rx_data_process = 0x40000cbc; */
|
||||
//pm_sleep = 0x40000cc0;
|
||||
pm_sleep_for = 0x40000cc4;
|
||||
//pm_tbtt_process = 0x40000cc8;
|
||||
ppAMPDU2Normal = 0x40000ccc;
|
||||
/* ppAssembleAMPDU = 0x40000cd0; */
|
||||
ppCalFrameTimes = 0x40000cd4;
|
||||
ppCalSubFrameLength = 0x40000cd8;
|
||||
//ppCalTxAMPDULength = 0x40000cdc;
|
||||
ppCheckTxAMPDUlength = 0x40000ce0;
|
||||
ppDequeueRxq_Locked = 0x40000ce4;
|
||||
ppDequeueTxQ = 0x40000ce8;
|
||||
ppEmptyDelimiterLength = 0x40000cec;
|
||||
ppEnqueueRxq = 0x40000cf0;
|
||||
ppEnqueueTxDone = 0x40000cf4;
|
||||
ppGetTxframe = 0x40000cf8;
|
||||
//ppMapTxQueue = 0x40000cfc;
|
||||
//ppProcTxSecFrame = 0x40000d00;
|
||||
ppProcessRxPktHdr = 0x40000d04;
|
||||
//ppProcessTxQ = 0x40000d08;
|
||||
ppRecordBarRRC = 0x40000d0c;
|
||||
ppRecycleAmpdu = 0x40000d10;
|
||||
ppRecycleRxPkt = 0x40000d14;
|
||||
//ppResortTxAMPDU = 0x40000d18;
|
||||
ppResumeTxAMPDU = 0x40000d1c;
|
||||
/*ppRxFragmentProc = 0x40000d20;*/
|
||||
//ppRxPkt = 0x40000d24;
|
||||
ppRxProtoProc = 0x40000d28;
|
||||
ppSearchTxQueue = 0x40000d2c;
|
||||
ppSearchTxframe = 0x40000d30;
|
||||
ppSelectNextQueue = 0x40000d34;
|
||||
ppSubFromAMPDU = 0x40000d38;
|
||||
//ppTask = 0x40000d3c;
|
||||
//ppTxPkt = 0x40000d40;
|
||||
ppTxProtoProc = 0x40000d44;
|
||||
ppTxqUpdateBitmap = 0x40000d48;
|
||||
/*pp_coex_tx_request = 0x40000d4c;*/
|
||||
pp_hdrsize = 0x40000d50;
|
||||
pp_post = 0x40000d54;
|
||||
pp_process_hmac_waiting_txq = 0x40000d58;
|
||||
rcGetAmpduSched = 0x40000d5c;
|
||||
rcUpdateRxDone = 0x40000d60;
|
||||
rc_get_trc = 0x40000d64;
|
||||
rc_get_trc_by_index = 0x40000d68;
|
||||
rcAmpduLowerRate = 0x40000d6c;
|
||||
rcampduuprate = 0x40000d70;
|
||||
rcClearCurAMPDUSched = 0x40000d74;
|
||||
rcClearCurSched = 0x40000d78;
|
||||
rcClearCurStat = 0x40000d7c;
|
||||
/*rcGetSched = 0x40000d80;*/
|
||||
rcLowerSched = 0x40000d84;
|
||||
rcSetTxAmpduLimit = 0x40000d88;
|
||||
rcTxUpdatePer = 0x40000d8c;
|
||||
rcUpdateAckSnr = 0x40000d90;
|
||||
/*rcUpdateRate = 0x40000d94;*/
|
||||
rcUpdateTxDone = 0x40000d98;
|
||||
rcUpdateTxDoneAmpdu2 = 0x40000d9c;
|
||||
rcUpSched = 0x40000da0;
|
||||
rssi_margin = 0x40000da4;
|
||||
rx11NRate2AMPDULimit = 0x40000da8;
|
||||
TRC_AMPDU_PER_DOWN_THRESHOLD = 0x40000dac;
|
||||
TRC_AMPDU_PER_UP_THRESHOLD = 0x40000db0;
|
||||
trc_calc_duration = 0x40000db4;
|
||||
trc_isTxAmpduOperational = 0x40000db8;
|
||||
trc_onAmpduOp = 0x40000dbc;
|
||||
TRC_PER_IS_GOOD = 0x40000dc0;
|
||||
trc_SetTxAmpduState = 0x40000dc4;
|
||||
trc_tid_isTxAmpduOperational = 0x40000dc8;
|
||||
trcAmpduSetState = 0x40000dcc;
|
||||
//wDevCheckBlockError = 0x40000dd0;
|
||||
/*wDev_AppendRxBlocks = 0x40000dd4;*/
|
||||
wDev_DiscardFrame = 0x40000dd8;
|
||||
wDev_GetNoiseFloor = 0x40000ddc;
|
||||
wDev_IndicateAmpdu = 0x40000de0;
|
||||
//wDev_IndicateFrame = 0x40000de4;
|
||||
wdev_mac_reg_load = 0x40000de8;
|
||||
wdev_mac_reg_store = 0x40000dec;
|
||||
wdev_mac_special_reg_load = 0x40000df0;
|
||||
wdev_mac_special_reg_store = 0x40000df4;
|
||||
wdev_mac_wakeup = 0x40000df8;
|
||||
wdev_mac_sleep = 0x40000dfc;
|
||||
hal_mac_is_dma_enable = 0x40000e00;
|
||||
//wDev_ProcessFiq = 0x40000e04;
|
||||
//wDev_ProcessRxSucData = 0x40000e08;
|
||||
//wdevProcessRxSucDataAll = 0x40000e0c;
|
||||
wdev_csi_len_align = 0x40000e10;
|
||||
ppDequeueTxDone_Locked = 0x40000e14;
|
||||
//ppProcTxDone = 0x40000e18;
|
||||
//pm_tx_data_done_process = 0x40000e1c;
|
||||
config_is_cache_tx_buf_enabled = 0x40000e20;
|
||||
//ppMapWaitTxq = 0x40000e24;
|
||||
ppProcessWaitingQueue = 0x40000e28;
|
||||
ppDisableQueue = 0x40000e2c;
|
||||
pm_allow_tx = 0x40000e30;
|
||||
//wdev_is_data_in_rxlist = 0x40000e34;
|
||||
ppProcTxCallback = 0x40000e38;
|
||||
//mac_tx_set_hesig = 0x40000e3c;
|
||||
ppCalPreFecPaddingFactor = 0x40000e40;
|
||||
//mac_tx_set_tb = 0x40000e44;
|
||||
//mac_tx_set_mplen = 0x40000e48;
|
||||
hal_get_tsf_timer = 0x40000e4c;
|
||||
ppTxPktForceWaked = 0x40000e50;
|
||||
lmacProcessLongFrameSuccess = 0x40000e54;
|
||||
lmacProcessShortFrameSuccess = 0x40000e58;
|
||||
//lmacDiscardFrameExchangeSequence = 0x40000e5c;
|
||||
lmacProcessTBSuccess = 0x40000e60;
|
||||
/*lmacProcessTxSuccess = 0x40000e64;*/
|
||||
lmacProcessAckTimeout = 0x40000e68;
|
||||
//lmacProcessTxComplete = 0x40000e6c;
|
||||
//ppRemoveHTC = 0x40000e70;
|
||||
get_estimated_batime = 0x40000e74;
|
||||
is_use_muedca = 0x40000e78;
|
||||
//hal_mac_tx_clr_mplen = 0x40000e7c;
|
||||
//hal_mac_get_txq_state = 0x40000e80;
|
||||
hal_mac_clr_txq_state = 0x40000e84;
|
||||
hal_mac_get_txq_complete = 0x40000e88;
|
||||
ht_get_min_subframe_len = 0x40000e8c;
|
||||
rx11ACRate2AMPDULimit = 0x40000e90;
|
||||
pwr_hal_clear_intr_status = 0x40000e94;
|
||||
pwr_hal_clear_mac_modem_beacon_miss_intr_filter = 0x40000e98;
|
||||
pwr_hal_clear_mac_modem_rx_beacon_info = 0x40000e9c;
|
||||
pwr_hal_clear_mac_modem_rx_beacon_miss_counter = 0x40000ea0;
|
||||
pwr_hal_clear_mac_modem_rx_beacon_sleep_counter = 0x40000ea4;
|
||||
pwr_hal_clear_mac_modem_state_wakeup_protect_signal = 0x40000ea8;
|
||||
pwr_hal_get_intr_raw_signal = 0x40000eac;
|
||||
pwr_hal_get_intr_status = 0x40000eb0;
|
||||
pwr_hal_get_mac_modem_beacon_miss_limit_exceeded_status = 0x40000eb4;
|
||||
pwr_hal_get_mac_modem_rx_beacon_location_state = 0x40000eb8;
|
||||
pwr_hal_get_mac_modem_rx_beacon_valid_state = 0x40000ebc;
|
||||
pwr_hal_get_mac_modem_state_sleep_limit_exceeded_status = 0x40000ec0;
|
||||
pwr_hal_set_beacon_filter_abort_disable = 0x40000ec4;
|
||||
pwr_hal_set_beacon_filter_abort_enable = 0x40000ec8;
|
||||
pwr_hal_set_beacon_filter_abort_length = 0x40000ecc;
|
||||
//pwr_hal_set_beacon_filter_broadcast_wakeup_disable = 0x40000ed0;
|
||||
//pwr_hal_set_beacon_filter_broadcast_wakeup_enable = 0x40000ed4;
|
||||
pwr_hal_set_beacon_filter_disable = 0x40000ed8;
|
||||
pwr_hal_set_beacon_filter_enable = 0x40000edc;
|
||||
pwr_hal_set_beacon_filter_force_dump_disable = 0x40000ee0;
|
||||
pwr_hal_set_beacon_filter_force_dump_enable = 0x40000ee4;
|
||||
pwr_hal_set_beacon_filter_force_dump_limit = 0x40000ee8;
|
||||
pwr_hal_set_beacon_filter_force_sync_disable = 0x40000eec;
|
||||
pwr_hal_set_beacon_filter_force_sync_enable = 0x40000ef0;
|
||||
pwr_hal_set_beacon_filter_force_sync_limit = 0x40000ef4;
|
||||
pwr_hal_set_beacon_filter_frame_crc_state = 0x40000ef8;
|
||||
pwr_hal_set_beacon_filter_soc_wakeup_and_intr_disable = 0x40000efc;
|
||||
pwr_hal_set_beacon_filter_soc_wakeup_and_intr_enable = 0x40000f00;
|
||||
pwr_hal_set_beacon_filter_unicast_wakeup_disable = 0x40000f04;
|
||||
pwr_hal_set_beacon_filter_unicast_wakeup_enable = 0x40000f08;
|
||||
pwr_hal_set_lpclk_cycle_time = 0x40000f0c;
|
||||
pwr_hal_set_lpclk_sync_disable = 0x40000f10;
|
||||
pwr_hal_set_lpclk_sync_enable = 0x40000f14;
|
||||
pwr_hal_set_mac_modem_beacon_miss_intr_disable = 0x40000f18;
|
||||
pwr_hal_set_mac_modem_beacon_miss_intr_enable = 0x40000f1c;
|
||||
pwr_hal_set_mac_modem_beacon_miss_limit = 0x40000f20;
|
||||
pwr_hal_set_mac_modem_beacon_miss_limit_exceeded_wakeup_disable = 0x40000f24;
|
||||
pwr_hal_set_mac_modem_beacon_miss_limit_exceeded_wakeup_enable = 0x40000f28;
|
||||
pwr_hal_set_mac_modem_beacon_miss_timeout = 0x40000f2c;
|
||||
pwr_hal_set_mac_modem_state_sleep_limit = 0x40000f30;
|
||||
pwr_hal_set_mac_modem_state_sleep_limit_exceeded_wakeup_disable = 0x40000f34;
|
||||
pwr_hal_set_mac_modem_state_sleep_limit_exceeded_wakeup_enable = 0x40000f38;
|
||||
pwr_hal_set_mac_modem_state_wakeup_protect_disable = 0x40000f3c;
|
||||
pwr_hal_set_mac_modem_state_wakeup_protect_early_time = 0x40000f40;
|
||||
pwr_hal_set_mac_modem_state_wakeup_protect_enable = 0x40000f44;
|
||||
pwr_hal_set_mac_modem_tbtt_auto_period_disable = 0x40000f48;
|
||||
pwr_hal_set_mac_modem_tbtt_auto_period_enable = 0x40000f4c;
|
||||
pwr_hal_set_mac_modem_tbtt_auto_period_interval = 0x40000f50;
|
||||
pwr_hal_set_modem_state_interface = 0x40000f54;
|
||||
hal_tsf_clear_soc_wakeup_request = 0x40000f58;
|
||||
tsf_hal_clear_mac_modem_rf_power_state = 0x40000f5c;
|
||||
tsf_hal_clear_soc_wakeup_request = 0x40000f60;
|
||||
tsf_hal_get_counter_value = 0x40000f64;
|
||||
tsf_hal_get_mac_modem_rf_power_state = 0x40000f68;
|
||||
tsf_hal_get_tbtt_interval = 0x40000f6c;
|
||||
tsf_hal_get_time = 0x40000f70;
|
||||
tsf_hal_get_timer_target = 0x40000f74;
|
||||
tsf_hal_is_tsf_enabled = 0x40000f78;
|
||||
tsf_hal_map_tbtt_target_to_rx_frame = 0x40000f7c;
|
||||
tsf_hal_map_tsf_to_bssid = 0x40000f80;
|
||||
tsf_hal_set_counter_value = 0x40000f84;
|
||||
tsf_hal_set_modem_wakeup_early_time = 0x40000f88;
|
||||
tsf_hal_set_rx_beacon_abort_tsf_time_deviation_sync_disable = 0x40000f8c;
|
||||
tsf_hal_set_rx_beacon_abort_tsf_time_deviation_sync_enable = 0x40000f90;
|
||||
tsf_hal_set_rx_beacon_fail_tsf_time_deviation_sync_disable = 0x40000f94;
|
||||
tsf_hal_set_rx_beacon_fail_tsf_time_deviation_sync_enable = 0x40000f98;
|
||||
tsf_hal_set_rx_beacon_success_tsf_time_deviation_sync_disable = 0x40000f9c;
|
||||
tsf_hal_set_rx_beacon_success_tsf_time_deviation_sync_enable = 0x40000fa0;
|
||||
tsf_hal_set_tbtt_disable = 0x40000fa4;
|
||||
tsf_hal_set_tbtt_early_time = 0x40000fa8;
|
||||
tsf_hal_set_tbtt_enable = 0x40000fac;
|
||||
tsf_hal_set_tbtt_interval = 0x40000fb0;
|
||||
tsf_hal_set_tbtt_intr_disable = 0x40000fb4;
|
||||
tsf_hal_set_tbtt_intr_enable = 0x40000fb8;
|
||||
tsf_hal_set_tbtt_modem_wakeup_disable = 0x40000fbc;
|
||||
tsf_hal_set_tbtt_modem_wakeup_enable = 0x40000fc0;
|
||||
tsf_hal_set_tbtt_rf_ctrl_disable = 0x40000fc4;
|
||||
tsf_hal_set_tbtt_rf_ctrl_enable = 0x40000fc8;
|
||||
tsf_hal_set_tbtt_rf_ctrl_wait_cycles = 0x40000fcc;
|
||||
tsf_hal_set_tbtt_soc_wakeup_disable = 0x40000fd0;
|
||||
tsf_hal_set_tbtt_soc_wakeup_enable = 0x40000fd4;
|
||||
/*tsf_hal_set_tbtt_start_time = 0x40000fd8;*/
|
||||
tsf_hal_set_time = 0x40000fdc;
|
||||
tsf_hal_set_timer_disable = 0x40000fe0;
|
||||
tsf_hal_set_timer_enable = 0x40000fe4;
|
||||
tsf_hal_set_timer_intr_disable = 0x40000fe8;
|
||||
tsf_hal_set_timer_intr_enable = 0x40000fec;
|
||||
tsf_hal_set_timer_modem_wakeup_disable = 0x40000ff0;
|
||||
tsf_hal_set_timer_modem_wakeup_enable = 0x40000ff4;
|
||||
tsf_hal_set_timer_rf_ctrl_disable = 0x40000ff8;
|
||||
tsf_hal_set_timer_rf_ctrl_enable = 0x40000ffc;
|
||||
tsf_hal_set_timer_rf_ctrl_wait_cycles = 0x40001000;
|
||||
tsf_hal_set_timer_soc_wakeup_disable = 0x40001004;
|
||||
tsf_hal_set_timer_soc_wakeup_enable = 0x40001008;
|
||||
tsf_hal_set_timer_target = 0x4000100c;
|
||||
tsf_hal_set_tsf_disable = 0x40001010;
|
||||
tsf_hal_set_tsf_enable = 0x40001014;
|
||||
tsf_hal_set_tsf_time_deviation = 0x40001018;
|
||||
tsf_hal_set_tsf_time_deviation_sync_disable = 0x4000101c;
|
||||
tsf_hal_set_tsf_time_deviation_sync_enable = 0x40001020;
|
||||
tsf_hal_unmap_tbtt_target_to_rx_frame = 0x40001024;
|
||||
//ppSelectTxFormat = 0x40001028;
|
||||
//ppCertSetRate = 0x4000102c;
|
||||
//ppHEAMPDU2Normal = 0x40001030;
|
||||
//ppCalTxHEAMPDULength = 0x40001034;
|
||||
//ppCalTxHESMPDULength = 0x40001038;
|
||||
rcGetRate = 0x4000103c;
|
||||
rcGetDCMMaxRate = 0x40001040;
|
||||
//rcGetSMPDURate = 0x40001044;
|
||||
ppDirectRecycleAmpdu = 0x40001048;
|
||||
//ppCheckTxHEAMPDUlength = 0x4000104c;
|
||||
//rx11AXRate2AMPDULimit = 0x40001050;
|
||||
//ppRegressAmpdu = 0x40001054;
|
||||
//ppCalDeliNum = 0x40001058;
|
||||
ppAdd2AMPDUTail = 0x4000105c;
|
||||
esp_test_disable_tx_statistics = 0x40001060;
|
||||
esp_test_enable_tx_statistics = 0x40001064;
|
||||
esp_test_clr_tx_statistics = 0x40001068;
|
||||
esp_test_get_tx_statistics = 0x4000106c;
|
||||
esp_test_clr_tx_tb_statistics = 0x40001070;
|
||||
esp_test_get_tx_tb_statistics = 0x40001074;
|
||||
test_tx_fail_statistics = 0x40001078;
|
||||
//test_tx_succ_statistics = 0x4000107c;
|
||||
//esp_test_tx_process_complete = 0x40001080;
|
||||
//esp_test_tx_process_txq_state = 0x40001084;
|
||||
esp_test_tx_enab_statistics = 0x40001088;
|
||||
esp_test_tx_tb_complete = 0x4000108c;
|
||||
esp_test_tx_count_retry = 0x40001090;
|
||||
esp_test_tx_count_collision = 0x40001094;
|
||||
esp_test_tx_count_timeout = 0x40001098;
|
||||
hal_enable_tx_statistics = 0x4000109c;
|
||||
test_rx_process_complete_noeb = 0x400010a0;
|
||||
test_rx_process_complete_retry = 0x400010a4;
|
||||
esp_test_rx_process_complete = 0x400010a8;
|
||||
esp_test_clr_rx_statistics = 0x400010ac;
|
||||
esp_test_get_rx_statistics = 0x400010b0;
|
||||
test_free_rx_statistics = 0x400010b4;
|
||||
esp_test_set_rx_error_occurs = 0x400010b8;
|
||||
esp_test_get_rx_error_occurs = 0x400010bc;
|
||||
esp_test_clr_rx_error_occurs = 0x400010c0;
|
||||
esp_test_disable_rx_statistics = 0x400010c4;
|
||||
esp_test_enable_rx_statistics = 0x400010c8;
|
||||
hal_enable_rx_statistics = 0x400010cc;
|
||||
get_user_num = 0x400010d0;
|
||||
mumimo_spatial_cfg_get_nsts = 0x400010d4;
|
||||
mumimo_spatial_cfg_get_nsts_tot = 0x400010d8;
|
||||
test_mumimo_get_heltf_num = 0x400010dc;
|
||||
test_mimo_update_user_info = 0x400010e0;
|
||||
test_parse_rx_mu_mimo = 0x400010e4;
|
||||
test_nonmimo_update_user_info = 0x400010e8;
|
||||
test_parse_rx_mu_nonmimo = 0x400010ec;
|
||||
esp_test_rx_parse_mu = 0x400010f0;
|
||||
esp_test_get_rx_mu_statistics = 0x400010f4;
|
||||
esp_test_clr_rx_mu_statistics = 0x400010f8;
|
||||
esp_test_enable_rx_mu_statistics = 0x400010fc;
|
||||
esp_test_disable_rx_mu_statistics = 0x40001100;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
our_instances_ptr = 0x4004ffe0;
|
||||
pTxRx = 0x4087ff80;
|
||||
lmacConfMib_ptr = 0x4087ff7c;
|
||||
our_wait_eb = 0x4087ff78;
|
||||
our_tx_eb = 0x4087ff74;
|
||||
pp_wdev_funcs = 0x4087ff70;
|
||||
g_osi_funcs_p = 0x4087ff6c;
|
||||
wDevCtrl_ptr = 0x4087ff68;
|
||||
g_wdev_last_desc_reset_ptr = 0x4004ffdc;
|
||||
wDevMacSleep_ptr = 0x4087ff64;
|
||||
g_lmac_cnt_ptr = 0x4087ff60;
|
||||
our_controls_ptr = 0x4004ffd8;
|
||||
pp_sig_cnt_ptr = 0x4087ff5c;
|
||||
g_eb_list_desc_ptr = 0x4087ff58;
|
||||
s_fragment_ptr = 0x4087ff54;
|
||||
if_ctrl_ptr = 0x4087ff50;
|
||||
g_intr_lock_mux = 0x4087ff4c;
|
||||
g_wifi_global_lock = 0x4087ff48;
|
||||
s_wifi_queue = 0x4087ff44;
|
||||
pp_task_hdl = 0x4087ff40;
|
||||
s_pp_task_create_sem = 0x4087ff3c;
|
||||
s_pp_task_del_sem = 0x4087ff38;
|
||||
g_wifi_menuconfig_ptr = 0x4087ff34;
|
||||
xphyQueue = 0x4087ff30;
|
||||
ap_no_lr_ptr = 0x4087ff2c;
|
||||
rc11BSchedTbl_ptr = 0x4087ff28;
|
||||
rc11NSchedTbl_ptr = 0x4087ff24;
|
||||
rcLoRaSchedTbl_ptr = 0x4087ff20;
|
||||
BasicOFDMSched_ptr = 0x4087ff1c;
|
||||
trc_ctl_ptr = 0x4087ff18;
|
||||
g_pm_cnt_ptr = 0x4087ff14;
|
||||
g_pm_ptr = 0x4087ff10;
|
||||
g_pm_cfg_ptr = 0x4087ff0c;
|
||||
g_esp_mesh_quick_funcs_ptr = 0x4087ff08;
|
||||
g_txop_queue_status_ptr = 0x4087ff04;
|
||||
g_mac_sleep_en_ptr = 0x4087ff00;
|
||||
g_mesh_is_root_ptr = 0x4087fefc;
|
||||
g_mesh_topology_ptr = 0x4087fef8;
|
||||
g_mesh_init_ps_type_ptr = 0x4087fef4;
|
||||
g_mesh_is_started_ptr = 0x4087fef0;
|
||||
g_config_func = 0x4087feec;
|
||||
g_net80211_tx_func = 0x4087fee8;
|
||||
g_timer_func = 0x4087fee4;
|
||||
s_michael_mic_failure_cb = 0x4087fee0;
|
||||
wifi_sta_rx_probe_req = 0x4087fedc;
|
||||
g_tx_done_cb_func = 0x4087fed8;
|
||||
g_per_conn_trc = 0x4087fe8c;
|
||||
s_encap_amsdu_func = 0x4087fe88;
|
||||
rx_beacon_count = 0x4087fe84;
|
||||
rx_beacon_sw_parse = 0x4087fe80;
|
||||
rx_beacon_hw_parse = 0x4087fe7c;
|
||||
rx_beacon_tim_count = 0x4087fe78;
|
||||
rx_beacon_tim_udata = 0x4087fe74;
|
||||
rx_beacon_tim_udata_bitmap = 0x4087fe70;
|
||||
rx_beacon_tim_bdata = 0x4087fe6c;
|
||||
rx_beacon_tim_bdata_bitmapctl = 0x4087fe68;
|
||||
rx_beacon_tim_bdata_bitmap_trans = 0x4087fe64;
|
||||
rx_beacon_tim_bdata_bitmap_mbssid_self = 0x4087fe60;
|
||||
rx_beacon_tim_bdata_bitmap_mbssid_other = 0x4087fe5c;
|
||||
rx_beacon_dtim_tim = 0x4087fe58;
|
||||
rx_beacon_dtim_tim_mcast = 0x4087fe54;
|
||||
amdpu_delay_time_ms = 0x4087fd08;
|
||||
ampdu_delay_packet = 0x4087fd04;
|
||||
ampdu_delay = 0x4087fe51;
|
||||
first_ampdu = 0x4087fe50;
|
||||
s_ht_ampdu_density_us = 0x4087fd02;
|
||||
s_ht_ampdu_density = 0x4087fd01;
|
||||
s_running_phy_type = 0x4087fd00;
|
||||
complete_ena_tb_seqno = 0x4087fe4c;
|
||||
complete_ena_tb_final = 0x4087fe48;
|
||||
complete_ena_tb_count = 0x4087fe44;
|
||||
s_itwt_state = 0x4087fe40;
|
||||
g_dbg_interp_tsf = 0x4087fe3c;
|
||||
g_dbg_interp_tsf_end = 0x4087fe38;
|
||||
g_dbg_closrf_tsf = 0x4087fe34;
|
||||
g_dbg_closrf_idx = 0x4087fe30;
|
||||
g_dbg_closrf_blk = 0x4087fe2c;
|
||||
s_he_min_len_bytes = 0x4087fdf0;
|
||||
s_he_dcm_min_len_bytes = 0x4087fdd0;
|
||||
s_mplen_low_bitmap = 0x4087fdc0;
|
||||
s_mplen_high_bitmap = 0x4087fdb0;
|
||||
s_mplen_vi_bitmap = 0x4087fdac;
|
||||
s_mplen_bk_bitmap = 0x4087fda8;
|
||||
esp_wifi_cert_tx_mcs = 0x4087fcfc;
|
||||
esp_wifi_cert_tx_bcc = 0x4087fcf8;
|
||||
//esp_wifi_cert_tx_ltf = 0x4087fcf4;
|
||||
//esp_wifi_cert_tx_gi = 0x4087fcf0;
|
||||
esp_wifi_cert_tx_nss = 0x4087fcec;
|
||||
esp_test_tx_statistics_aci_bitmap = 0x4087fda4;
|
||||
esp_test_tx_statistics = 0x4087fd94;
|
||||
esp_test_tx_tb_statistics = 0x4087fd84;
|
||||
esp_test_tx_fail_statistics = 0x4087fd24;
|
||||
esp_test_rx_statistics = 0x4087fd1c;
|
||||
esp_test_rx_mu_statistics = 0x4087fd18;
|
||||
esp_test_mu_print_ru_allocation = 0x4087fd14;
|
||||
sigb_ru_allocation_user_num = 0x4004ffc8;
|
||||
sigb_common_ru_allocation = 0x4004ff38;
|
||||
mu_mimo_special_cfg_user_num_2 = 0x4004fee8;
|
||||
mu_mimo_special_cfg_user_num_3 = 0x4004fe80;
|
||||
mu_mimo_special_cfg_user_num_4 = 0x4004fe28;
|
||||
mu_mimo_special_cfg_user_num_5 = 0x4004fdf0;
|
||||
mu_mimo_special_cfg_user_num_6 = 0x4004fdd0;
|
||||
mu_mimo_special_cfg_user_num_7 = 0x4004fdc0;
|
||||
mu_mimo_special_cfg_user_num_8 = 0x4004fdb8;
|
||||
esp_test_rx_error_occurs = 0x4087fd10;
|
||||
g_pp_tx_pkt_num = 0x4087fd0c;
|
||||
he_max_apep_length = 0x4004fd40;
|
118
esp-hal/ld/esp32c6/rom/esp32c6.rom.rvfp.ld
Normal file
118
esp-hal/ld/esp32c6/rom/esp32c6.rom.rvfp.ld
Normal file
@ -0,0 +1,118 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32c6.rom.rvfp.ld for esp32c6
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group rvfplib
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
__adddf3 = 0x400009f4;
|
||||
__addsf3 = 0x400009f8;
|
||||
__eqdf2 = 0x400009fc;
|
||||
__eqsf2 = 0x40000a00;
|
||||
__extendsfdf2 = 0x40000a04;
|
||||
__fixdfdi = 0x40000a08;
|
||||
__fixdfsi = 0x40000a0c;
|
||||
__fixsfdi = 0x40000a10;
|
||||
__fixsfsi = 0x40000a14;
|
||||
__fixunsdfsi = 0x40000a18;
|
||||
__fixunssfdi = 0x40000a1c;
|
||||
__fixunssfsi = 0x40000a20;
|
||||
__floatdidf = 0x40000a24;
|
||||
__floatdisf = 0x40000a28;
|
||||
__floatsidf = 0x40000a2c;
|
||||
__floatsisf = 0x40000a30;
|
||||
__floatundidf = 0x40000a34;
|
||||
__floatundisf = 0x40000a38;
|
||||
__floatunsidf = 0x40000a3c;
|
||||
__floatunsisf = 0x40000a40;
|
||||
__gedf2 = 0x40000a44;
|
||||
__gesf2 = 0x40000a48;
|
||||
__gtdf2 = 0x40000a4c;
|
||||
__gtsf2 = 0x40000a50;
|
||||
__ledf2 = 0x40000a54;
|
||||
__lesf2 = 0x40000a58;
|
||||
__ltdf2 = 0x40000a5c;
|
||||
__ltsf2 = 0x40000a60;
|
||||
__muldf3 = 0x40000a64;
|
||||
__mulsf3 = 0x40000a68;
|
||||
__nedf2 = 0x40000a6c;
|
||||
__nesf2 = 0x40000a70;
|
||||
__subdf3 = 0x40000a74;
|
||||
__subsf3 = 0x40000a78;
|
||||
__truncdfsf2 = 0x40000a7c;
|
||||
|
||||
/***************************************
|
||||
Group libgcc
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
__absvdi2 = 0x40000884;
|
||||
__absvsi2 = 0x40000888;
|
||||
__addvdi3 = 0x40000894;
|
||||
__addvsi3 = 0x40000898;
|
||||
__ashldi3 = 0x4000089c;
|
||||
__ashrdi3 = 0x400008a0;
|
||||
__bswapdi2 = 0x400008a4;
|
||||
__bswapsi2 = 0x400008a8;
|
||||
__clear_cache = 0x400008ac;
|
||||
__clrsbdi2 = 0x400008b0;
|
||||
__clrsbsi2 = 0x400008b4;
|
||||
__clzdi2 = 0x400008b8;
|
||||
__clzsi2 = 0x400008bc;
|
||||
__cmpdi2 = 0x400008c0;
|
||||
__ctzdi2 = 0x400008c4;
|
||||
__ctzsi2 = 0x400008c8;
|
||||
__divdc3 = 0x400008cc;
|
||||
__divdf3 = 0x400008d0;
|
||||
__divdi3 = 0x400008d4;
|
||||
__divsc3 = 0x400008d8;
|
||||
__divsf3 = 0x400008dc;
|
||||
__divsi3 = 0x400008e0;
|
||||
__ffsdi2 = 0x400008f0;
|
||||
__ffssi2 = 0x400008f4;
|
||||
__gcc_bcmp = 0x40000934;
|
||||
__lshrdi3 = 0x40000950;
|
||||
__moddi3 = 0x4000095c;
|
||||
__modsi3 = 0x40000960;
|
||||
__muldc3 = 0x40000964;
|
||||
__muldi3 = 0x4000096c;
|
||||
__mulsc3 = 0x40000970;
|
||||
__mulsi3 = 0x40000978;
|
||||
__mulvdi3 = 0x4000097c;
|
||||
__mulvsi3 = 0x40000980;
|
||||
__negdf2 = 0x40000988;
|
||||
__negdi2 = 0x4000098c;
|
||||
__negsf2 = 0x40000990;
|
||||
__negvdi2 = 0x40000994;
|
||||
__negvsi2 = 0x40000998;
|
||||
__paritysi2 = 0x400009a0;
|
||||
__popcountdi2 = 0x400009a4;
|
||||
__popcountsi2 = 0x400009a8;
|
||||
__powidf2 = 0x400009ac;
|
||||
__powisf2 = 0x400009b0;
|
||||
__subvdi3 = 0x400009bc;
|
||||
__subvsi3 = 0x400009c0;
|
||||
__ucmpdi2 = 0x400009c8;
|
||||
__udivdi3 = 0x400009cc;
|
||||
__udivmoddi4 = 0x400009d0;
|
||||
__udivsi3 = 0x400009d4;
|
||||
__udiv_w_sdiv = 0x400009d8;
|
||||
__umoddi3 = 0x400009dc;
|
||||
__umodsi3 = 0x400009e0;
|
||||
__unorddf2 = 0x400009e4;
|
||||
__unordsf2 = 0x400009e8;
|
||||
__extenddftf2 = 0x400009ec;
|
||||
__trunctfdf2 = 0x400009f0;
|
165
esp-hal/ld/esp32c6/rom/esp32c6.rom.spiflash.ld
Normal file
165
esp-hal/ld/esp32c6/rom/esp32c6.rom.spiflash.ld
Normal file
@ -0,0 +1,165 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32c6.rom.spiflash.ld for esp32c6
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32c6/interface-esp32c6.yml md5sum 06c13e133e0743d09b87aba30d3e213b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group spi_flash_cache
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
spi_flash_disable_cache = 0x400001f0;
|
||||
spi_flash_restore_cache = 0x400001f4;
|
||||
spi_flash_cache_enabled = 0x400001f8;
|
||||
esp_enable_cache_flash_wrap = 0x40000200;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group spi_flash_mmap
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
spi_flash_mmap_os_func_set = 0x40000204;
|
||||
spi_flash_mmap_page_num_init = 0x40000208;
|
||||
spi_flash_mmap = 0x4000020c;
|
||||
spi_flash_mmap_pages = 0x40000210;
|
||||
spi_flash_munmap = 0x40000214;
|
||||
spi_flash_mmap_dump = 0x40000218;
|
||||
spi_flash_check_and_flush_cache = 0x4000021c;
|
||||
spi_flash_mmap_get_free_pages = 0x40000220;
|
||||
spi_flash_cache2phys = 0x40000224;
|
||||
spi_flash_phys2cache = 0x40000228;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group esp_flash
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
esp_flash_chip_driver_initialized = 0x4000022c;
|
||||
esp_flash_read_id = 0x40000230;
|
||||
esp_flash_get_size = 0x40000234;
|
||||
esp_flash_erase_chip = 0x40000238;
|
||||
esp_flash_erase_region = 0x4000023c;
|
||||
esp_flash_get_chip_write_protect = 0x40000240;
|
||||
esp_flash_set_chip_write_protect = 0x40000244;
|
||||
esp_flash_get_protectable_regions = 0x40000248;
|
||||
esp_flash_get_protected_region = 0x4000024c;
|
||||
esp_flash_set_protected_region = 0x40000250;
|
||||
esp_flash_read = 0x40000254;
|
||||
esp_flash_write = 0x40000258;
|
||||
esp_flash_write_encrypted = 0x4000025c;
|
||||
esp_flash_read_encrypted = 0x40000260;
|
||||
esp_flash_get_io_mode = 0x40000264;
|
||||
esp_flash_set_io_mode = 0x40000268;
|
||||
spi_flash_boot_attach = 0x4000026c;
|
||||
esp_flash_read_chip_id = 0x40000270;
|
||||
detect_spi_flash_chip = 0x40000274;
|
||||
/* esp_rom_spiflash_write_disable = 0x40000278; */
|
||||
esp_flash_suspend_cmd_init = 0x4000027c;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
esp_flash_default_chip = 0x4087ffe8;
|
||||
esp_flash_api_funcs = 0x4087ffe4;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group spi_flash_chips
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
spi_flash_chip_generic_probe = 0x40000280;
|
||||
spi_flash_chip_generic_detect_size = 0x40000284;
|
||||
spi_flash_chip_generic_write = 0x40000288;
|
||||
spi_flash_chip_generic_write_encrypted = 0x4000028c;
|
||||
spi_flash_chip_generic_set_write_protect = 0x40000290;
|
||||
spi_flash_common_write_status_16b_wrsr = 0x40000294;
|
||||
spi_flash_chip_generic_reset = 0x40000298;
|
||||
spi_flash_chip_generic_erase_chip = 0x4000029c;
|
||||
spi_flash_chip_generic_erase_sector = 0x400002a0;
|
||||
spi_flash_chip_generic_erase_block = 0x400002a4;
|
||||
spi_flash_chip_generic_page_program = 0x400002a8;
|
||||
spi_flash_chip_generic_get_write_protect = 0x400002ac;
|
||||
spi_flash_common_read_status_16b_rdsr_rdsr2 = 0x400002b0;
|
||||
spi_flash_chip_generic_read_reg = 0x400002b4;
|
||||
spi_flash_chip_generic_yield = 0x400002b8;
|
||||
spi_flash_generic_wait_host_idle = 0x400002bc;
|
||||
spi_flash_chip_generic_wait_idle = 0x400002c0;
|
||||
spi_flash_chip_generic_config_host_io_mode = 0x400002c4;
|
||||
spi_flash_chip_generic_read = 0x400002c8;
|
||||
spi_flash_common_read_status_8b_rdsr2 = 0x400002cc;
|
||||
spi_flash_chip_generic_get_io_mode = 0x400002d0;
|
||||
spi_flash_common_read_status_8b_rdsr = 0x400002d4;
|
||||
spi_flash_common_write_status_8b_wrsr = 0x400002d8;
|
||||
spi_flash_common_write_status_8b_wrsr2 = 0x400002dc;
|
||||
spi_flash_common_set_io_mode = 0x400002e0;
|
||||
spi_flash_chip_generic_set_io_mode = 0x400002e4;
|
||||
spi_flash_chip_generic_read_unique_id = 0x400002e8;
|
||||
spi_flash_chip_generic_get_caps = 0x400002ec;
|
||||
spi_flash_chip_generic_suspend_cmd_conf = 0x400002f0;
|
||||
spi_flash_chip_gd_get_io_mode = 0x400002f4;
|
||||
spi_flash_chip_gd_probe = 0x400002f8;
|
||||
spi_flash_chip_gd_set_io_mode = 0x400002fc;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
spi_flash_chip_generic_config_data = 0x4087ffe0;
|
||||
spi_flash_encryption = 0x4087ffdc;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group memspi_host
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
memspi_host_read_id_hs = 0x40000300;
|
||||
memspi_host_read_status_hs = 0x40000304;
|
||||
memspi_host_flush_cache = 0x40000308;
|
||||
memspi_host_erase_chip = 0x4000030c;
|
||||
memspi_host_erase_sector = 0x40000310;
|
||||
memspi_host_erase_block = 0x40000314;
|
||||
memspi_host_program_page = 0x40000318;
|
||||
memspi_host_read = 0x4000031c;
|
||||
memspi_host_set_write_protect = 0x40000320;
|
||||
memspi_host_set_max_read_len = 0x40000324;
|
||||
memspi_host_read_data_slicer = 0x40000328;
|
||||
memspi_host_write_data_slicer = 0x4000032c;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group hal_spiflash
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
spi_flash_hal_poll_cmd_done = 0x40000330;
|
||||
spi_flash_hal_device_config = 0x40000334;
|
||||
spi_flash_hal_configure_host_io_mode = 0x40000338;
|
||||
spi_flash_hal_common_command = 0x4000033c;
|
||||
spi_flash_hal_read = 0x40000340;
|
||||
spi_flash_hal_erase_chip = 0x40000344;
|
||||
spi_flash_hal_erase_sector = 0x40000348;
|
||||
spi_flash_hal_erase_block = 0x4000034c;
|
||||
spi_flash_hal_program_page = 0x40000350;
|
||||
spi_flash_hal_set_write_protect = 0x40000354;
|
||||
spi_flash_hal_host_idle = 0x40000358;
|
||||
spi_flash_hal_check_status = 0x4000035c;
|
||||
spi_flash_hal_setup_read_suspend = 0x40000360;
|
||||
spi_flash_hal_setup_auto_suspend_mode = 0x40000364;
|
||||
spi_flash_hal_setup_auto_resume_mode = 0x40000368;
|
||||
spi_flash_hal_disable_auto_suspend_mode = 0x4000036c;
|
||||
spi_flash_hal_disable_auto_resume_mode = 0x40000370;
|
||||
spi_flash_hal_resume = 0x40000374;
|
||||
spi_flash_hal_suspend = 0x40000378;
|
||||
spi_flash_encryption_hal_enable = 0x4000037c;
|
||||
spi_flash_encryption_hal_disable = 0x40000380;
|
||||
spi_flash_encryption_hal_prepare = 0x40000384;
|
||||
spi_flash_encryption_hal_done = 0x40000388;
|
||||
spi_flash_encryption_hal_destroy = 0x4000038c;
|
||||
spi_flash_encryption_hal_check = 0x40000390;
|
13
esp-hal/ld/esp32c6/rom/esp32c6.rom.version.ld
Normal file
13
esp-hal/ld/esp32c6/rom/esp32c6.rom.version.ld
Normal file
@ -0,0 +1,13 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM version variables for esp32c6
|
||||
*
|
||||
* These addresses should be compatible with any ROM version for this chip.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
_rom_chip_id = 0x40000010;
|
||||
_rom_eco_version = 0x40000014;
|
@ -1,27 +1,8 @@
|
||||
ets_printf = 0x40000028;
|
||||
PROVIDE(esp_rom_printf = ets_printf);
|
||||
PROVIDE(cache_invalidate_icache_all = 0x40000620);
|
||||
PROVIDE(cache_suspend_icache = 0x4000066c);
|
||||
PROVIDE(cache_resume_icache = 0x40000670);
|
||||
PROVIDE(ets_delay_us = 0x40000040);
|
||||
PROVIDE(ets_update_cpu_frequency_rom = 0x40000048);
|
||||
PROVIDE(rtc_get_reset_reason = 0x40000018);
|
||||
ets_update_cpu_frequency = 0x40000048;
|
||||
PROVIDE(software_reset = 0x40000090);
|
||||
PROVIDE(software_reset_cpu = 0x40000094);
|
||||
INCLUDE "rom/esp32h2.rom.api.ld"
|
||||
INCLUDE "rom/esp32h2.rom.heap.ld"
|
||||
INCLUDE "rom/esp32h2.rom.ld"
|
||||
INCLUDE "rom/esp32h2.rom.libgcc.ld"
|
||||
INCLUDE "rom/esp32h2.rom.spiflash.ld"
|
||||
INCLUDE "rom/esp32h2.rom.version.ld"
|
||||
|
||||
PROVIDE(esp_rom_crc32_be = 0x40000730);
|
||||
PROVIDE(esp_rom_crc16_be = 0x40000734);
|
||||
PROVIDE(esp_rom_crc8_be = 0x40000738);
|
||||
PROVIDE(esp_rom_crc32_le = 0x40000724);
|
||||
PROVIDE(esp_rom_crc16_le = 0x40000728);
|
||||
PROVIDE(esp_rom_crc8_le = 0x4000072c);
|
||||
|
||||
PROVIDE(esp_rom_md5_init = 0x40000718);
|
||||
PROVIDE(esp_rom_md5_update = 0x4000071c);
|
||||
PROVIDE(esp_rom_md5_final = 0x40000720);
|
||||
|
||||
memset = 0x400004a0;
|
||||
memcpy = 0x400004a4;
|
||||
memmove = 0x400004a8;
|
||||
memcmp = 0x400004ac;
|
||||
INCLUDE "rom/additional.ld"
|
||||
|
10
esp-hal/ld/esp32h2/rom/additional.ld
Normal file
10
esp-hal/ld/esp32h2/rom/additional.ld
Normal file
@ -0,0 +1,10 @@
|
||||
memset = 0x400004a0;
|
||||
memcpy = 0x400004a4;
|
||||
memmove = 0x400004a8;
|
||||
memcmp = 0x400004ac;
|
||||
|
||||
strncmp = 0x400004bc;
|
||||
strncpy = 0x400004b4;
|
||||
strcpy = 0x400004b0;
|
||||
|
||||
abs = 0x40000570;
|
65
esp-hal/ld/esp32h2/rom/esp32h2.rom.api.ld
Normal file
65
esp-hal/ld/esp32h2/rom/esp32h2.rom.api.ld
Normal file
@ -0,0 +1,65 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/** ROM APIs
|
||||
*/
|
||||
|
||||
PROVIDE ( esp_rom_crc32_le = crc32_le );
|
||||
PROVIDE ( esp_rom_crc16_le = crc16_le );
|
||||
PROVIDE ( esp_rom_crc8_le = crc8_le );
|
||||
PROVIDE ( esp_rom_crc32_be = crc32_be );
|
||||
PROVIDE ( esp_rom_crc16_be = crc16_be );
|
||||
PROVIDE ( esp_rom_crc8_be = crc8_be );
|
||||
|
||||
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
|
||||
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
|
||||
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
|
||||
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
|
||||
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
|
||||
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
|
||||
|
||||
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
|
||||
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
|
||||
|
||||
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char2 );
|
||||
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
|
||||
|
||||
PROVIDE ( esp_rom_output_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_output_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_output_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_output_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_output_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_output_putc = ets_write_char_uart );
|
||||
|
||||
PROVIDE ( esp_rom_md5_init = MD5Init );
|
||||
PROVIDE ( esp_rom_md5_update = MD5Update );
|
||||
PROVIDE ( esp_rom_md5_final = MD5Final );
|
||||
|
||||
PROVIDE ( esp_rom_software_reset_system = software_reset );
|
||||
PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
|
||||
|
||||
PROVIDE ( esp_rom_printf = ets_printf );
|
||||
PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
|
||||
PROVIDE ( esp_rom_delay_us = ets_delay_us );
|
||||
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
|
||||
PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
|
||||
PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
|
||||
PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
|
||||
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
|
||||
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable );
|
||||
PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
|
||||
PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
|
||||
PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
|
||||
PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
|
80
esp-hal/ld/esp32h2/rom/esp32h2.rom.heap.ld
Normal file
80
esp-hal/ld/esp32h2/rom/esp32h2.rom.heap.ld
Normal file
@ -0,0 +1,80 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32h2.rom.heap.ld for esp32h2
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32h2/interface-esp32h2.yml md5sum c0ad4e113e5b29bb9d799f10f03edbc1
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group heap
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
tlsf_create = 0x400003f4;
|
||||
tlsf_create_with_pool = 0x400003f8;
|
||||
tlsf_get_pool = 0x400003fc;
|
||||
tlsf_add_pool = 0x40000400;
|
||||
tlsf_remove_pool = 0x40000404;
|
||||
tlsf_malloc = 0x40000408;
|
||||
tlsf_memalign = 0x4000040c;
|
||||
tlsf_memalign_offs = 0x40000410;
|
||||
tlsf_realloc = 0x40000414;
|
||||
tlsf_free = 0x40000418;
|
||||
tlsf_block_size = 0x4000041c;
|
||||
tlsf_size = 0x40000420;
|
||||
tlsf_align_size = 0x40000424;
|
||||
tlsf_block_size_min = 0x40000428;
|
||||
tlsf_block_size_max = 0x4000042c;
|
||||
tlsf_pool_overhead = 0x40000430;
|
||||
tlsf_alloc_overhead = 0x40000434;
|
||||
tlsf_walk_pool = 0x40000438;
|
||||
tlsf_check = 0x4000043c;
|
||||
tlsf_poison_fill_pfunc_set = 0x40000444;
|
||||
tlsf_poison_check_pfunc_set = 0x40000448;
|
||||
multi_heap_get_block_address_impl = 0x4000044c;
|
||||
multi_heap_get_allocated_size_impl = 0x40000450;
|
||||
multi_heap_register_impl = 0x40000454;
|
||||
multi_heap_set_lock = 0x40000458;
|
||||
multi_heap_os_funcs_init = 0x4000045c;
|
||||
multi_heap_internal_lock = 0x40000460;
|
||||
multi_heap_internal_unlock = 0x40000464;
|
||||
multi_heap_get_first_block = 0x40000468;
|
||||
multi_heap_get_next_block = 0x4000046c;
|
||||
multi_heap_is_free = 0x40000470;
|
||||
multi_heap_malloc_impl = 0x40000474;
|
||||
multi_heap_free_impl = 0x40000478;
|
||||
multi_heap_realloc_impl = 0x4000047c;
|
||||
multi_heap_aligned_alloc_impl_offs = 0x40000480;
|
||||
multi_heap_aligned_alloc_impl = 0x40000484;
|
||||
multi_heap_check = 0x40000488;
|
||||
multi_heap_dump = 0x4000048c;
|
||||
multi_heap_free_size_impl = 0x40000490;
|
||||
multi_heap_minimum_free_size_impl = 0x40000494;
|
||||
multi_heap_get_info_impl = 0x40000498;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
heap_tlsf_table_ptr = 0x4084ffd8;
|
||||
|
||||
PROVIDE (multi_heap_malloc = multi_heap_malloc_impl);
|
||||
PROVIDE (multi_heap_free = multi_heap_free_impl);
|
||||
PROVIDE (multi_heap_realloc = multi_heap_realloc_impl);
|
||||
PROVIDE (multi_heap_get_allocated_size = multi_heap_get_allocated_size_impl);
|
||||
PROVIDE (multi_heap_register = multi_heap_register_impl);
|
||||
PROVIDE (multi_heap_get_info = multi_heap_get_info_impl);
|
||||
PROVIDE (multi_heap_free_size = multi_heap_free_size_impl);
|
||||
PROVIDE (multi_heap_minimum_free_size = multi_heap_minimum_free_size_impl);
|
||||
PROVIDE (multi_heap_get_block_address = multi_heap_get_block_address_impl);
|
||||
PROVIDE (multi_heap_aligned_alloc = multi_heap_aligned_alloc_impl);
|
||||
PROVIDE (multi_heap_aligned_free = multi_heap_aligned_free_impl);
|
||||
PROVIDE (multi_heap_check = multi_heap_check);
|
||||
PROVIDE (multi_heap_set_lock = multi_heap_set_lock);
|
||||
PROVIDE (multi_heap_os_funcs_init = multi_heap_mutex_init);
|
||||
PROVIDE (multi_heap_internal_lock = multi_heap_internal_lock);
|
||||
PROVIDE (multi_heap_internal_unlock = multi_heap_internal_unlock);
|
379
esp-hal/ld/esp32h2/rom/esp32h2.rom.ld
Normal file
379
esp-hal/ld/esp32h2/rom/esp32h2.rom.ld
Normal file
@ -0,0 +1,379 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32h2.rom.ld for esp32h2
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32h2/interface-esp32h2.yml md5sum c0ad4e113e5b29bb9d799f10f03edbc1
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group common
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
rtc_get_reset_reason = 0x40000018;
|
||||
analog_super_wdt_reset_happened = 0x4000001c;
|
||||
rtc_get_wakeup_cause = 0x40000020;
|
||||
rtc_unhold_all_pads = 0x40000024;
|
||||
ets_printf = 0x40000028;
|
||||
ets_install_putc1 = 0x4000002c;
|
||||
ets_install_putc2 = 0x40000030;
|
||||
ets_install_uart_printf = 0x40000034;
|
||||
ets_install_usb_printf = 0x40000038;
|
||||
ets_get_printf_channel = 0x4000003c;
|
||||
ets_delay_us = 0x40000040;
|
||||
ets_get_cpu_frequency = 0x40000044;
|
||||
ets_update_cpu_frequency = 0x40000048;
|
||||
ets_install_lock = 0x4000004c;
|
||||
UartRxString = 0x40000050;
|
||||
UartGetCmdLn = 0x40000054;
|
||||
uart_tx_one_char = 0x40000058;
|
||||
uart_tx_one_char2 = 0x4000005c;
|
||||
uart_rx_one_char = 0x40000060;
|
||||
uart_rx_one_char_block = 0x40000064;
|
||||
uart_rx_intr_handler = 0x40000068;
|
||||
uart_rx_readbuff = 0x4000006c;
|
||||
uartAttach = 0x40000070;
|
||||
uart_tx_flush = 0x40000074;
|
||||
uart_tx_wait_idle = 0x40000078;
|
||||
uart_div_modify = 0x4000007c;
|
||||
ets_write_char_uart = 0x40000080;
|
||||
uart_tx_switch = 0x40000084;
|
||||
roundup2 = 0x40000088;
|
||||
multofup = 0x4000008c;
|
||||
software_reset = 0x40000090;
|
||||
software_reset_cpu = 0x40000094;
|
||||
ets_clk_assist_debug_clock_enable = 0x40000098;
|
||||
clear_super_wdt_reset_flag = 0x4000009c;
|
||||
disable_default_watchdog = 0x400000a0;
|
||||
esp_rom_set_rtc_wake_addr = 0x400000a4;
|
||||
esp_rom_get_rtc_wake_addr = 0x400000a8;
|
||||
send_packet = 0x400000ac;
|
||||
recv_packet = 0x400000b0;
|
||||
GetUartDevice = 0x400000b4;
|
||||
UartDwnLdProc = 0x400000b8;
|
||||
GetSecurityInfoProc = 0x400000bc;
|
||||
Uart_Init = 0x400000c0;
|
||||
ets_set_user_start = 0x400000c4;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
ets_rom_layout_p = 0x4001fffc;
|
||||
ets_ops_table_ptr = 0x4084fff8;
|
||||
g_saved_pc = 0x4084fffc;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group miniz
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
mz_adler32 = 0x400000c8;
|
||||
mz_free = 0x400000cc;
|
||||
tdefl_compress = 0x400000d0;
|
||||
tdefl_compress_buffer = 0x400000d4;
|
||||
tdefl_compress_mem_to_heap = 0x400000d8;
|
||||
tdefl_compress_mem_to_mem = 0x400000dc;
|
||||
tdefl_compress_mem_to_output = 0x400000e0;
|
||||
tdefl_get_adler32 = 0x400000e4;
|
||||
tdefl_get_prev_return_status = 0x400000e8;
|
||||
tdefl_init = 0x400000ec;
|
||||
tdefl_write_image_to_png_file_in_memory = 0x400000f0;
|
||||
tdefl_write_image_to_png_file_in_memory_ex = 0x400000f4;
|
||||
tinfl_decompress = 0x400000f8;
|
||||
tinfl_decompress_mem_to_callback = 0x400000fc;
|
||||
tinfl_decompress_mem_to_heap = 0x40000100;
|
||||
tinfl_decompress_mem_to_mem = 0x40000104;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group spiflash_legacy
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
esp_rom_spiflash_wait_idle = 0x40000108;
|
||||
esp_rom_spiflash_write_encrypted = 0x4000010c;
|
||||
esp_rom_spiflash_write_encrypted_dest = 0x40000110;
|
||||
esp_rom_spiflash_write_encrypted_enable = 0x40000114;
|
||||
esp_rom_spiflash_write_encrypted_disable = 0x40000118;
|
||||
esp_rom_spiflash_erase_chip = 0x4000011c;
|
||||
_esp_rom_spiflash_erase_sector = 0x40000120;
|
||||
_esp_rom_spiflash_erase_block = 0x40000124;
|
||||
_esp_rom_spiflash_write = 0x40000128;
|
||||
_esp_rom_spiflash_read = 0x4000012c;
|
||||
_esp_rom_spiflash_unlock = 0x40000130;
|
||||
_SPIEraseArea = 0x40000134;
|
||||
_SPI_write_enable = 0x40000138;
|
||||
esp_rom_spiflash_erase_sector = 0x4000013c;
|
||||
esp_rom_spiflash_erase_block = 0x40000140;
|
||||
esp_rom_spiflash_write = 0x40000144;
|
||||
esp_rom_spiflash_read = 0x40000148;
|
||||
esp_rom_spiflash_unlock = 0x4000014c;
|
||||
SPIEraseArea = 0x40000150;
|
||||
SPI_write_enable = 0x40000154;
|
||||
esp_rom_spiflash_config_param = 0x40000158;
|
||||
esp_rom_spiflash_read_user_cmd = 0x4000015c;
|
||||
esp_rom_spiflash_select_qio_pins = 0x40000160;
|
||||
esp_rom_spi_flash_auto_sus_res = 0x40000164;
|
||||
esp_rom_spi_flash_send_resume = 0x40000168;
|
||||
esp_rom_spi_flash_update_id = 0x4000016c;
|
||||
esp_rom_spiflash_config_clk = 0x40000170;
|
||||
esp_rom_spiflash_config_readmode = 0x40000174;
|
||||
esp_rom_spiflash_read_status = 0x40000178;
|
||||
esp_rom_spiflash_read_statushigh = 0x4000017c;
|
||||
esp_rom_spiflash_write_status = 0x40000180;
|
||||
spi_cache_mode_switch = 0x40000184;
|
||||
spi_common_set_dummy_output = 0x40000188;
|
||||
spi_common_set_flash_cs_timing = 0x4000018c;
|
||||
esp_rom_spi_set_address_bit_len = 0x40000190;
|
||||
SPILock = 0x40000194;
|
||||
SPIMasterReadModeCnfig = 0x40000198;
|
||||
SPI_Common_Command = 0x4000019c;
|
||||
SPI_WakeUp = 0x400001a0;
|
||||
SPI_block_erase = 0x400001a4;
|
||||
SPI_chip_erase = 0x400001a8;
|
||||
SPI_init = 0x400001ac;
|
||||
SPI_page_program = 0x400001b0;
|
||||
SPI_read_data = 0x400001b4;
|
||||
SPI_sector_erase = 0x400001b8;
|
||||
SelectSpiFunction = 0x400001bc;
|
||||
SetSpiDrvs = 0x400001c0;
|
||||
Wait_SPI_Idle = 0x400001c4;
|
||||
spi_dummy_len_fix = 0x400001c8;
|
||||
Disable_QMode = 0x400001cc;
|
||||
Enable_QMode = 0x400001d0;
|
||||
spi_flash_attach = 0x400001d4;
|
||||
spi_flash_get_chip_size = 0x400001d8;
|
||||
spi_flash_guard_set = 0x400001dc;
|
||||
spi_flash_guard_get = 0x400001e0;
|
||||
spi_flash_read_encrypted = 0x400001e4;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
rom_spiflash_legacy_funcs = 0x4084fff0;
|
||||
rom_spiflash_legacy_data = 0x4084ffec;
|
||||
g_flash_guard_ops = 0x4084fff4;
|
||||
|
||||
/* Note: esp_rom_spiflash_write_disable was moved from esp32c6.rom.spiflash.ld */
|
||||
esp_rom_spiflash_write_disable = 0x40000270;
|
||||
|
||||
/***************************************
|
||||
Group cache
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
Cache_Get_ICache_Line_Size = 0x400005fc;
|
||||
Cache_Get_Mode = 0x40000600;
|
||||
Cache_Address_Through_Cache = 0x40000604;
|
||||
ROM_Boot_Cache_Init = 0x40000608;
|
||||
MMU_Set_Page_Mode = 0x4000060c;
|
||||
MMU_Get_Page_Mode = 0x40000610;
|
||||
Cache_Invalidate_ICache_Items = 0x40000614;
|
||||
Cache_Op_Addr = 0x40000618;
|
||||
Cache_Invalidate_Addr = 0x4000061c;
|
||||
Cache_Invalidate_ICache_All = 0x40000620;
|
||||
Cache_Mask_All = 0x40000624;
|
||||
Cache_UnMask_Dram0 = 0x40000628;
|
||||
Cache_Suspend_ICache_Autoload = 0x4000062c;
|
||||
Cache_Resume_ICache_Autoload = 0x40000630;
|
||||
Cache_Start_ICache_Preload = 0x40000634;
|
||||
Cache_ICache_Preload_Done = 0x40000638;
|
||||
Cache_End_ICache_Preload = 0x4000063c;
|
||||
Cache_Config_ICache_Autoload = 0x40000640;
|
||||
Cache_Enable_ICache_Autoload = 0x40000644;
|
||||
Cache_Disable_ICache_Autoload = 0x40000648;
|
||||
Cache_Enable_ICache_PreLock = 0x4000064c;
|
||||
Cache_Disable_ICache_PreLock = 0x40000650;
|
||||
Cache_Lock_ICache_Items = 0x40000654;
|
||||
Cache_Unlock_ICache_Items = 0x40000658;
|
||||
Cache_Lock_Addr = 0x4000065c;
|
||||
Cache_Unlock_Addr = 0x40000660;
|
||||
Cache_Disable_ICache = 0x40000664;
|
||||
Cache_Enable_ICache = 0x40000668;
|
||||
Cache_Suspend_ICache = 0x4000066c;
|
||||
Cache_Resume_ICache = 0x40000670;
|
||||
Cache_Freeze_ICache_Enable = 0x40000674;
|
||||
Cache_Freeze_ICache_Disable = 0x40000678;
|
||||
Cache_Set_IDROM_MMU_Size = 0x4000067c;
|
||||
Cache_Get_IROM_MMU_End = 0x40000680;
|
||||
Cache_Get_DROM_MMU_End = 0x40000684;
|
||||
Cache_MMU_Init = 0x40000688;
|
||||
Cache_MSPI_MMU_Set = 0x4000068c;
|
||||
Cache_Travel_Tag_Memory = 0x40000690;
|
||||
Cache_Get_Virtual_Addr = 0x40000694;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
rom_cache_op_cb = 0x4084ffcc;
|
||||
rom_cache_internal_table_ptr = 0x4084ffc8;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group clock
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
ets_clk_get_xtal_freq = 0x40000698;
|
||||
ets_clk_get_cpu_freq = 0x4000069c;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group gpio
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
gpio_input_get = 0x400006a0;
|
||||
gpio_matrix_in = 0x400006a4;
|
||||
gpio_matrix_out = 0x400006a8;
|
||||
gpio_output_disable = 0x400006ac;
|
||||
gpio_output_enable = 0x400006b0;
|
||||
gpio_output_set = 0x400006b4;
|
||||
gpio_pad_hold = 0x400006b8;
|
||||
gpio_pad_input_disable = 0x400006bc;
|
||||
gpio_pad_input_enable = 0x400006c0;
|
||||
gpio_pad_pulldown = 0x400006c4;
|
||||
gpio_pad_pullup = 0x400006c8;
|
||||
gpio_pad_select_gpio = 0x400006cc;
|
||||
gpio_pad_set_drv = 0x400006d0;
|
||||
gpio_pad_unhold = 0x400006d4;
|
||||
gpio_pin_wakeup_disable = 0x400006d8;
|
||||
gpio_pin_wakeup_enable = 0x400006dc;
|
||||
gpio_bypass_matrix_in = 0x400006e0;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group interrupts
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
esprv_intc_int_set_priority = 0x400006e4;
|
||||
esprv_intc_int_set_threshold = 0x400006e8;
|
||||
esprv_intc_int_enable = 0x400006ec;
|
||||
esprv_intc_int_disable = 0x400006f0;
|
||||
esprv_intc_int_set_type = 0x400006f4;
|
||||
PROVIDE( intr_handler_set = 0x400006f8 );
|
||||
intr_matrix_set = 0x400006fc;
|
||||
ets_intr_lock = 0x40000700;
|
||||
ets_intr_unlock = 0x40000704;
|
||||
ets_isr_attach = 0x40000708;
|
||||
ets_isr_mask = 0x4000070c;
|
||||
ets_isr_unmask = 0x40000710;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group crypto
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
md5_vector = 0x40000714;
|
||||
MD5Init = 0x40000718;
|
||||
MD5Update = 0x4000071c;
|
||||
MD5Final = 0x40000720;
|
||||
crc32_le = 0x40000724;
|
||||
crc16_le = 0x40000728;
|
||||
crc8_le = 0x4000072c;
|
||||
crc32_be = 0x40000730;
|
||||
crc16_be = 0x40000734;
|
||||
crc8_be = 0x40000738;
|
||||
esp_crc8 = 0x4000073c;
|
||||
ets_sha_enable = 0x40000740;
|
||||
ets_sha_disable = 0x40000744;
|
||||
ets_sha_get_state = 0x40000748;
|
||||
ets_sha_init = 0x4000074c;
|
||||
ets_sha_process = 0x40000750;
|
||||
ets_sha_starts = 0x40000754;
|
||||
ets_sha_update = 0x40000758;
|
||||
ets_sha_finish = 0x4000075c;
|
||||
ets_sha_clone = 0x40000760;
|
||||
ets_hmac_enable = 0x40000764;
|
||||
ets_hmac_disable = 0x40000768;
|
||||
ets_hmac_calculate_message = 0x4000076c;
|
||||
ets_hmac_calculate_downstream = 0x40000770;
|
||||
ets_hmac_invalidate_downstream = 0x40000774;
|
||||
ets_jtag_enable_temporarily = 0x40000778;
|
||||
ets_aes_enable = 0x4000077c;
|
||||
ets_aes_disable = 0x40000780;
|
||||
ets_aes_setkey = 0x40000784;
|
||||
ets_aes_block = 0x40000788;
|
||||
ets_aes_setkey_dec = 0x4000078c;
|
||||
ets_aes_setkey_enc = 0x40000790;
|
||||
ets_bigint_enable = 0x40000794;
|
||||
ets_bigint_disable = 0x40000798;
|
||||
ets_bigint_multiply = 0x4000079c;
|
||||
ets_bigint_modmult = 0x400007a0;
|
||||
ets_bigint_modexp = 0x400007a4;
|
||||
ets_bigint_wait_finish = 0x400007a8;
|
||||
ets_bigint_getz = 0x400007ac;
|
||||
ets_ds_enable = 0x400007b0;
|
||||
ets_ds_disable = 0x400007b4;
|
||||
ets_ds_start_sign = 0x400007b8;
|
||||
ets_ds_is_busy = 0x400007bc;
|
||||
ets_ds_finish_sign = 0x400007c0;
|
||||
ets_ds_encrypt_params = 0x400007c4;
|
||||
ets_mgf1_sha256 = 0x400007c8;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
crc32_le_table_ptr = 0x4001fff8;
|
||||
crc16_le_table_ptr = 0x4001fff4;
|
||||
crc8_le_table_ptr = 0x4001fff0;
|
||||
crc32_be_table_ptr = 0x4001ffec;
|
||||
crc16_be_table_ptr = 0x4001ffe8;
|
||||
crc8_be_table_ptr = 0x4001ffe4;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group efuse
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
ets_efuse_read = 0x400007cc;
|
||||
ets_efuse_program = 0x400007d0;
|
||||
ets_efuse_clear_program_registers = 0x400007d4;
|
||||
ets_efuse_write_key = 0x400007d8;
|
||||
ets_efuse_get_read_register_address = 0x400007dc;
|
||||
ets_efuse_get_key_purpose = 0x400007e0;
|
||||
ets_efuse_key_block_unused = 0x400007e4;
|
||||
ets_efuse_find_unused_key_block = 0x400007e8;
|
||||
ets_efuse_rs_calculate = 0x400007ec;
|
||||
ets_efuse_count_unused_key_blocks = 0x400007f0;
|
||||
ets_efuse_secure_boot_enabled = 0x400007f4;
|
||||
ets_efuse_secure_boot_aggressive_revoke_enabled = 0x400007f8;
|
||||
ets_efuse_cache_encryption_enabled = 0x400007fc;
|
||||
ets_efuse_download_modes_disabled = 0x40000800;
|
||||
ets_efuse_find_purpose = 0x40000804;
|
||||
ets_efuse_force_send_resume = 0x40000808;
|
||||
ets_efuse_get_flash_delay_us = 0x4000080c;
|
||||
ets_efuse_get_mac = 0x40000810;
|
||||
ets_efuse_get_uart_print_control = 0x40000814;
|
||||
ets_efuse_direct_boot_mode_disabled = 0x40000818;
|
||||
ets_efuse_security_download_modes_enabled = 0x4000081c;
|
||||
ets_efuse_jtag_disabled = 0x40000820;
|
||||
ets_efuse_usb_print_is_disabled = 0x40000824;
|
||||
ets_efuse_usb_download_mode_disabled = 0x40000828;
|
||||
ets_efuse_usb_device_disabled = 0x4000082c;
|
||||
ets_efuse_secure_boot_fast_wake_enabled = 0x40000830;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group secureboot
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
ets_emsa_pss_verify = 0x40000834;
|
||||
ets_rsa_pss_verify = 0x40000838;
|
||||
ets_ecdsa_verify = 0x4000083c;
|
||||
ets_secure_boot_verify_bootloader_with_keys = 0x40000840;
|
||||
ets_secure_boot_verify_signature = 0x40000844;
|
||||
ets_secure_boot_read_key_digests = 0x40000848;
|
||||
ets_secure_boot_revoke_public_key_digest = 0x4000084c;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group usb_device_uart
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
usb_serial_device_rx_one_char = 0x400009c0;
|
||||
usb_serial_device_rx_one_char_block = 0x400009c4;
|
||||
usb_serial_device_tx_flush = 0x400009c8;
|
||||
usb_serial_device_tx_one_char = 0x400009cc;
|
112
esp-hal/ld/esp32h2/rom/esp32h2.rom.libgcc.ld
Normal file
112
esp-hal/ld/esp32h2/rom/esp32h2.rom.libgcc.ld
Normal file
@ -0,0 +1,112 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32h2.rom.libgcc.ld for esp32h2
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32h2/interface-esp32h2.yml md5sum c0ad4e113e5b29bb9d799f10f03edbc1
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group libgcc
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
__absvdi2 = 0x40000850;
|
||||
__absvsi2 = 0x40000854;
|
||||
__adddf3 = 0x40000858;
|
||||
__addsf3 = 0x4000085c;
|
||||
__addvdi3 = 0x40000860;
|
||||
__addvsi3 = 0x40000864;
|
||||
__ashldi3 = 0x40000868;
|
||||
__ashrdi3 = 0x4000086c;
|
||||
__bswapdi2 = 0x40000870;
|
||||
__bswapsi2 = 0x40000874;
|
||||
__clear_cache = 0x40000878;
|
||||
__clrsbdi2 = 0x4000087c;
|
||||
__clrsbsi2 = 0x40000880;
|
||||
__clzdi2 = 0x40000884;
|
||||
__clzsi2 = 0x40000888;
|
||||
__cmpdi2 = 0x4000088c;
|
||||
__ctzdi2 = 0x40000890;
|
||||
__ctzsi2 = 0x40000894;
|
||||
__divdc3 = 0x40000898;
|
||||
__divdf3 = 0x4000089c;
|
||||
__divdi3 = 0x400008a0;
|
||||
__divsc3 = 0x400008a4;
|
||||
__divsf3 = 0x400008a8;
|
||||
__divsi3 = 0x400008ac;
|
||||
__eqdf2 = 0x400008b0;
|
||||
__eqsf2 = 0x400008b4;
|
||||
__extendsfdf2 = 0x400008b8;
|
||||
__ffsdi2 = 0x400008bc;
|
||||
__ffssi2 = 0x400008c0;
|
||||
__fixdfdi = 0x400008c4;
|
||||
__fixdfsi = 0x400008c8;
|
||||
__fixsfdi = 0x400008cc;
|
||||
__fixsfsi = 0x400008d0;
|
||||
__fixunsdfsi = 0x400008d4;
|
||||
__fixunssfdi = 0x400008d8;
|
||||
__fixunssfsi = 0x400008dc;
|
||||
__floatdidf = 0x400008e0;
|
||||
__floatdisf = 0x400008e4;
|
||||
__floatsidf = 0x400008e8;
|
||||
__floatsisf = 0x400008ec;
|
||||
__floatundidf = 0x400008f0;
|
||||
__floatundisf = 0x400008f4;
|
||||
__floatunsidf = 0x400008f8;
|
||||
__floatunsisf = 0x400008fc;
|
||||
__gcc_bcmp = 0x40000900;
|
||||
__gedf2 = 0x40000904;
|
||||
__gesf2 = 0x40000908;
|
||||
__gtdf2 = 0x4000090c;
|
||||
__gtsf2 = 0x40000910;
|
||||
__ledf2 = 0x40000914;
|
||||
__lesf2 = 0x40000918;
|
||||
__lshrdi3 = 0x4000091c;
|
||||
__ltdf2 = 0x40000920;
|
||||
__ltsf2 = 0x40000924;
|
||||
__moddi3 = 0x40000928;
|
||||
__modsi3 = 0x4000092c;
|
||||
__muldc3 = 0x40000930;
|
||||
__muldf3 = 0x40000934;
|
||||
__muldi3 = 0x40000938;
|
||||
__mulsc3 = 0x4000093c;
|
||||
__mulsf3 = 0x40000940;
|
||||
__mulsi3 = 0x40000944;
|
||||
__mulvdi3 = 0x40000948;
|
||||
__mulvsi3 = 0x4000094c;
|
||||
__nedf2 = 0x40000950;
|
||||
__negdf2 = 0x40000954;
|
||||
__negdi2 = 0x40000958;
|
||||
__negsf2 = 0x4000095c;
|
||||
__negvdi2 = 0x40000960;
|
||||
__negvsi2 = 0x40000964;
|
||||
__nesf2 = 0x40000968;
|
||||
__paritysi2 = 0x4000096c;
|
||||
__popcountdi2 = 0x40000970;
|
||||
__popcountsi2 = 0x40000974;
|
||||
__powidf2 = 0x40000978;
|
||||
__powisf2 = 0x4000097c;
|
||||
__subdf3 = 0x40000980;
|
||||
__subsf3 = 0x40000984;
|
||||
__subvdi3 = 0x40000988;
|
||||
__subvsi3 = 0x4000098c;
|
||||
__truncdfsf2 = 0x40000990;
|
||||
__ucmpdi2 = 0x40000994;
|
||||
__udivdi3 = 0x40000998;
|
||||
__udivmoddi4 = 0x4000099c;
|
||||
__udivsi3 = 0x400009a0;
|
||||
__udiv_w_sdiv = 0x400009a4;
|
||||
__umoddi3 = 0x400009a8;
|
||||
__umodsi3 = 0x400009ac;
|
||||
__unorddf2 = 0x400009b0;
|
||||
__unordsf2 = 0x400009b4;
|
||||
__extenddftf2 = 0x400009b8;
|
||||
__trunctfdf2 = 0x400009bc;
|
164
esp-hal/ld/esp32h2/rom/esp32h2.rom.spiflash.ld
Normal file
164
esp-hal/ld/esp32h2/rom/esp32h2.rom.spiflash.ld
Normal file
@ -0,0 +1,164 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM function interface esp32h2.rom.spiflash.ld for esp32h2
|
||||
*
|
||||
*
|
||||
* Generated from ./target/esp32h2/interface-esp32h2.yml md5sum c0ad4e113e5b29bb9d799f10f03edbc1
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group spi_flash_cache
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
spi_flash_disable_cache = 0x400001e8;
|
||||
spi_flash_restore_cache = 0x400001ec;
|
||||
spi_flash_cache_enabled = 0x400001f0;
|
||||
esp_enable_cache_flash_wrap = 0x400001f8;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group spi_flash_mmap
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
spi_flash_mmap_os_func_set = 0x400001fc;
|
||||
spi_flash_mmap_page_num_init = 0x40000200;
|
||||
spi_flash_mmap = 0x40000204;
|
||||
spi_flash_mmap_pages = 0x40000208;
|
||||
spi_flash_munmap = 0x4000020c;
|
||||
spi_flash_mmap_dump = 0x40000210;
|
||||
spi_flash_check_and_flush_cache = 0x40000214;
|
||||
spi_flash_mmap_get_free_pages = 0x40000218;
|
||||
spi_flash_cache2phys = 0x4000021c;
|
||||
spi_flash_phys2cache = 0x40000220;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group esp_flash
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
esp_flash_chip_driver_initialized = 0x40000224;
|
||||
esp_flash_read_id = 0x40000228;
|
||||
esp_flash_get_size = 0x4000022c;
|
||||
esp_flash_erase_chip = 0x40000230;
|
||||
esp_flash_erase_region = 0x40000234;
|
||||
esp_flash_get_chip_write_protect = 0x40000238;
|
||||
esp_flash_set_chip_write_protect = 0x4000023c;
|
||||
esp_flash_get_protectable_regions = 0x40000240;
|
||||
esp_flash_get_protected_region = 0x40000244;
|
||||
esp_flash_set_protected_region = 0x40000248;
|
||||
esp_flash_read = 0x4000024c;
|
||||
esp_flash_write = 0x40000250;
|
||||
esp_flash_write_encrypted = 0x40000254;
|
||||
esp_flash_read_encrypted = 0x40000258;
|
||||
esp_flash_get_io_mode = 0x4000025c;
|
||||
esp_flash_set_io_mode = 0x40000260;
|
||||
spi_flash_boot_attach = 0x40000264;
|
||||
esp_flash_read_chip_id = 0x40000268;
|
||||
detect_spi_flash_chip = 0x4000026c;
|
||||
esp_flash_suspend_cmd_init = 0x40000274;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
esp_flash_default_chip = 0x4084ffe8;
|
||||
esp_flash_api_funcs = 0x4084ffe4;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group spi_flash_chips
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
spi_flash_chip_generic_probe = 0x40000278;
|
||||
spi_flash_chip_generic_detect_size = 0x4000027c;
|
||||
spi_flash_chip_generic_write = 0x40000280;
|
||||
spi_flash_chip_generic_write_encrypted = 0x40000284;
|
||||
spi_flash_chip_generic_set_write_protect = 0x40000288;
|
||||
spi_flash_common_write_status_16b_wrsr = 0x4000028c;
|
||||
spi_flash_chip_generic_reset = 0x40000290;
|
||||
spi_flash_chip_generic_erase_chip = 0x40000294;
|
||||
spi_flash_chip_generic_erase_sector = 0x40000298;
|
||||
spi_flash_chip_generic_erase_block = 0x4000029c;
|
||||
spi_flash_chip_generic_page_program = 0x400002a0;
|
||||
spi_flash_chip_generic_get_write_protect = 0x400002a4;
|
||||
spi_flash_common_read_status_16b_rdsr_rdsr2 = 0x400002a8;
|
||||
spi_flash_chip_generic_read_reg = 0x400002ac;
|
||||
spi_flash_chip_generic_yield = 0x400002b0;
|
||||
spi_flash_generic_wait_host_idle = 0x400002b4;
|
||||
spi_flash_chip_generic_wait_idle = 0x400002b8;
|
||||
spi_flash_chip_generic_config_host_io_mode = 0x400002bc;
|
||||
spi_flash_chip_generic_read = 0x400002c0;
|
||||
spi_flash_common_read_status_8b_rdsr2 = 0x400002c4;
|
||||
spi_flash_chip_generic_get_io_mode = 0x400002c8;
|
||||
spi_flash_common_read_status_8b_rdsr = 0x400002cc;
|
||||
spi_flash_common_write_status_8b_wrsr = 0x400002d0;
|
||||
spi_flash_common_write_status_8b_wrsr2 = 0x400002d4;
|
||||
spi_flash_common_set_io_mode = 0x400002d8;
|
||||
spi_flash_chip_generic_set_io_mode = 0x400002dc;
|
||||
spi_flash_chip_generic_read_unique_id = 0x400002e0;
|
||||
spi_flash_chip_generic_get_caps = 0x400002e4;
|
||||
spi_flash_chip_generic_suspend_cmd_conf = 0x400002e8;
|
||||
spi_flash_chip_gd_get_io_mode = 0x400002ec;
|
||||
spi_flash_chip_gd_probe = 0x400002f0;
|
||||
spi_flash_chip_gd_set_io_mode = 0x400002f4;
|
||||
/* Data (.data, .bss, .rodata) */
|
||||
spi_flash_chip_generic_config_data = 0x4084ffe0;
|
||||
spi_flash_encryption = 0x4084ffdc;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group memspi_host
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
memspi_host_read_id_hs = 0x400002f8;
|
||||
memspi_host_read_status_hs = 0x400002fc;
|
||||
memspi_host_flush_cache = 0x40000300;
|
||||
memspi_host_erase_chip = 0x40000304;
|
||||
memspi_host_erase_sector = 0x40000308;
|
||||
memspi_host_erase_block = 0x4000030c;
|
||||
memspi_host_program_page = 0x40000310;
|
||||
memspi_host_read = 0x40000314;
|
||||
memspi_host_set_write_protect = 0x40000318;
|
||||
memspi_host_set_max_read_len = 0x4000031c;
|
||||
memspi_host_read_data_slicer = 0x40000320;
|
||||
memspi_host_write_data_slicer = 0x40000324;
|
||||
|
||||
|
||||
/***************************************
|
||||
Group hal_spiflash
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
spi_flash_hal_poll_cmd_done = 0x40000328;
|
||||
spi_flash_hal_device_config = 0x4000032c;
|
||||
spi_flash_hal_configure_host_io_mode = 0x40000330;
|
||||
spi_flash_hal_common_command = 0x40000334;
|
||||
spi_flash_hal_read = 0x40000338;
|
||||
spi_flash_hal_erase_chip = 0x4000033c;
|
||||
spi_flash_hal_erase_sector = 0x40000340;
|
||||
spi_flash_hal_erase_block = 0x40000344;
|
||||
spi_flash_hal_program_page = 0x40000348;
|
||||
spi_flash_hal_set_write_protect = 0x4000034c;
|
||||
spi_flash_hal_host_idle = 0x40000350;
|
||||
spi_flash_hal_check_status = 0x40000354;
|
||||
spi_flash_hal_setup_read_suspend = 0x40000358;
|
||||
spi_flash_hal_setup_auto_suspend_mode = 0x4000035c;
|
||||
spi_flash_hal_setup_auto_resume_mode = 0x40000360;
|
||||
spi_flash_hal_disable_auto_suspend_mode = 0x40000364;
|
||||
spi_flash_hal_disable_auto_resume_mode = 0x40000368;
|
||||
spi_flash_hal_resume = 0x4000036c;
|
||||
spi_flash_hal_suspend = 0x40000370;
|
||||
spi_flash_encryption_hal_enable = 0x40000374;
|
||||
spi_flash_encryption_hal_disable = 0x40000378;
|
||||
spi_flash_encryption_hal_prepare = 0x4000037c;
|
||||
spi_flash_encryption_hal_done = 0x40000380;
|
||||
spi_flash_encryption_hal_destroy = 0x40000384;
|
||||
spi_flash_encryption_hal_check = 0x40000388;
|
13
esp-hal/ld/esp32h2/rom/esp32h2.rom.version.ld
Normal file
13
esp-hal/ld/esp32h2/rom/esp32h2.rom.version.ld
Normal file
@ -0,0 +1,13 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2022 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/* ROM version variables for esp32h2
|
||||
*
|
||||
* These addresses should be compatible with any ROM version for this chip.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
_rom_chip_id = 0x40000010;
|
||||
_rom_eco_version = 0x40000014;
|
@ -1,34 +1,6 @@
|
||||
PROVIDE(ets_delay_us = 0x4000d888);
|
||||
PROVIDE(ets_update_cpu_frequency_rom = 0x4000d8a4);
|
||||
PROVIDE(rom_i2c_writeReg = 0x4000a9a8);
|
||||
PROVIDE(rom_i2c_writeReg_Mask = 0x4000aa00);
|
||||
PROVIDE(rtc_get_reset_reason = 0x4000ff58);
|
||||
PROVIDE(software_reset = 0x40010068);
|
||||
PROVIDE(software_reset_cpu = 0x40010080);
|
||||
INCLUDE "rom/esp32s2.rom.api.ld"
|
||||
INCLUDE "rom/esp32s2.rom.ld"
|
||||
INCLUDE "rom/esp32s2.rom.libgcc.ld"
|
||||
INCLUDE "rom/esp32s2.rom.spiflash_legacy.ld"
|
||||
|
||||
PROVIDE ( cache_dbus_mmu_set = 0x40018eb0 );
|
||||
PROVIDE ( Cache_Allocate_SRAM = 0x40018d6c );
|
||||
PROVIDE ( Cache_Invalidate_DCache_All = 0x4001842c );
|
||||
PROVIDE ( Cache_Set_DCache_Mode = 0x40018074 );
|
||||
PROVIDE ( ets_efuse_get_spiconfig = 0x4000e4a0 );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad );
|
||||
PROVIDE ( ets_efuse_get_wp_pad = 0x4000e444 );
|
||||
PROVIDE ( esp_rom_spiflash_select_qio_pins = SelectSpiQIO );
|
||||
PROVIDE ( SelectSpiQIO = 0x40015b88 );
|
||||
PROVIDE ( esp_rom_spi_set_op_mode = 0x400179e8 );
|
||||
PROVIDE ( esp_rom_spi_cmd_start = 0x40017ba8 );
|
||||
PROVIDE ( esp_rom_spi_cmd_config = 0x40017c58 );
|
||||
|
||||
PROVIDE(esp_rom_crc32_le = 0x400119dc);
|
||||
PROVIDE(esp_rom_crc16_le = 0x40011a10);
|
||||
PROVIDE(esp_rom_crc8_le = 0x40011a4c);
|
||||
|
||||
PROVIDE(esp_rom_md5_final = 0x4000530c);
|
||||
PROVIDE(esp_rom_md5_init = 0x4000526c);
|
||||
PROVIDE(esp_rom_md5_update = 0x4000528c);
|
||||
|
||||
memcmp = 0x4001ab40;
|
||||
memcpy = 0x4001aba8;
|
||||
memmove = 0x4001acb0;
|
||||
memset = 0x4001ad3c;
|
||||
INCLUDE "rom/additional.ld"
|
||||
|
12
esp-hal/ld/esp32s2/rom/additional.ld
Normal file
12
esp-hal/ld/esp32s2/rom/additional.ld
Normal file
@ -0,0 +1,12 @@
|
||||
memcmp = 0x4001ab40;
|
||||
memcpy = 0x4001aba8;
|
||||
memmove = 0x4001acb0;
|
||||
memset = 0x4001ad3c;
|
||||
|
||||
strcpy = 0x40007cfc;
|
||||
strncpy = 0x40007f20;
|
||||
strncmp = 0x4001ae64;
|
||||
|
||||
bzero = 0x400078c8;
|
||||
|
||||
PROVIDE ( cache_dbus_mmu_set = 0x40018eb0 );
|
65
esp-hal/ld/esp32s2/rom/esp32s2.rom.api.ld
Normal file
65
esp-hal/ld/esp32s2/rom/esp32s2.rom.api.ld
Normal file
@ -0,0 +1,65 @@
|
||||
/**
|
||||
* ROM APIs
|
||||
*/
|
||||
|
||||
PROVIDE ( esp_rom_crc32_le = crc32_le );
|
||||
PROVIDE ( esp_rom_crc16_le = crc16_le );
|
||||
PROVIDE ( esp_rom_crc8_le = crc8_le );
|
||||
|
||||
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
|
||||
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
|
||||
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
|
||||
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
|
||||
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
|
||||
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
|
||||
|
||||
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad );
|
||||
PROVIDE ( esp_rom_efuse_get_opiconfig = ets_efuse_get_opiconfig );
|
||||
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
|
||||
|
||||
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_uart_usb_acm_init = Uart_Init_USB );
|
||||
PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
|
||||
PROVIDE ( esp_rom_uart_switch_buffer = uart_buff_switch );
|
||||
|
||||
PROVIDE ( esp_rom_output_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_output_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_output_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_output_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_output_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_output_usb_acm_init = Uart_Init_USB );
|
||||
PROVIDE ( esp_rom_output_putc = ets_write_char_uart );
|
||||
PROVIDE ( esp_rom_output_switch_buffer = uart_buff_switch );
|
||||
|
||||
/* wpa_supplicant re-implements the MD5 functions: MD5Init, MD5Update, MD5Final */
|
||||
/* so here we directly assign the symbols with the ROM API address */
|
||||
PROVIDE ( esp_rom_md5_init = 0x4000526c );
|
||||
PROVIDE ( esp_rom_md5_update = 0x4000528c );
|
||||
PROVIDE ( esp_rom_md5_final = 0x4000530c );
|
||||
|
||||
PROVIDE ( esp_rom_software_reset_system = software_reset );
|
||||
PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
|
||||
|
||||
PROVIDE ( esp_rom_printf = ets_printf );
|
||||
PROVIDE ( esp_rom_delay_us = ets_delay_us );
|
||||
PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
|
||||
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
|
||||
PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
|
||||
PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
|
||||
PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
|
||||
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
|
||||
PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
|
||||
PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
|
||||
PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
|
804
esp-hal/ld/esp32s2/rom/esp32s2.rom.ld
Normal file
804
esp-hal/ld/esp32s2/rom/esp32s2.rom.ld
Normal file
@ -0,0 +1,804 @@
|
||||
/**
|
||||
* ESP32-S2 ROM address table (except symbols from libgcc and libc)
|
||||
* Generated for ROM with MD5sum: 0a2c7ec5109c17884606d23b47045796
|
||||
*
|
||||
* These are all weak symbols that could be overwritten in ESP-IDF.
|
||||
*/
|
||||
|
||||
PROVIDE ( abort = 0x40019fb4 );
|
||||
PROVIDE ( acm_config_descr = 0x3ffaef0f );
|
||||
PROVIDE ( acm_usb_descriptors = 0x3ffaee68 );
|
||||
PROVIDE ( boot_prepare = 0x4000f348 );
|
||||
PROVIDE ( Cache_Address_Through_DCache = 0x400180f0 );
|
||||
PROVIDE ( Cache_Address_Through_ICache = 0x400180bc );
|
||||
PROVIDE ( Cache_Allocate_SRAM = 0x40018d6c );
|
||||
PROVIDE ( Cache_Clean_Addr = 0x40018370 );
|
||||
PROVIDE ( Cache_Clean_All = 0x40018438 );
|
||||
PROVIDE ( Cache_Clean_Items = 0x40018250 );
|
||||
PROVIDE ( Cache_Config_DCache_Autoload = 0x40018794 );
|
||||
PROVIDE ( Cache_Config_ICache_Autoload = 0x40018664 );
|
||||
PROVIDE ( rom_Cache_Count_Flash_Pages = 0x40018f70 );
|
||||
PROVIDE ( Cache_Dbus_MMU_Set = 0x40018eb0 );
|
||||
PROVIDE ( Cache_DCache_Preload_Done = 0x40018630 );
|
||||
PROVIDE ( Cache_Disable_DCache = 0x40018c68 );
|
||||
PROVIDE ( Cache_Disable_DCache_Autoload = 0x4001888c );
|
||||
PROVIDE ( Cache_Disable_DCache_PreLock = 0x40018a5c );
|
||||
PROVIDE ( Cache_Disable_ICache = 0x40018c2c );
|
||||
PROVIDE ( Cache_Disable_ICache_Autoload = 0x4001875c );
|
||||
PROVIDE ( Cache_Disable_ICache_PreLock = 0x4001892c );
|
||||
PROVIDE ( Cache_Enable_DCache = 0x40018d58 );
|
||||
PROVIDE ( Cache_Enable_DCache_Autoload = 0x40018874 );
|
||||
PROVIDE ( Cache_Enable_DCache_PreLock = 0x400189f0 );
|
||||
PROVIDE ( Cache_Enable_Defalut_DCache_Mode = 0x40018170 );
|
||||
PROVIDE ( Cache_Enable_ICache = 0x40018cf8 );
|
||||
PROVIDE ( Cache_Enable_ICache_Autoload = 0x40018744 );
|
||||
PROVIDE ( Cache_Enable_ICache_PreLock = 0x400188c0 );
|
||||
PROVIDE ( Cache_End_DCache_Preload = 0x40018644 );
|
||||
PROVIDE ( Cache_End_ICache_Preload = 0x400185b0 );
|
||||
PROVIDE ( Cache_Flash_To_SPIRAM_Copy = 0x40018fc4 );
|
||||
PROVIDE ( Cache_Get_DCache_Line_Size = 0x40017fd8 );
|
||||
PROVIDE ( Cache_Get_ICache_Line_Size = 0x40017fbc );
|
||||
PROVIDE ( Cache_Get_Memory_Addr = 0x4001929c );
|
||||
PROVIDE ( Cache_Get_Memory_BaseAddr = 0x40019244 );
|
||||
PROVIDE ( Cache_Get_Memory_value = 0x400192d8 );
|
||||
PROVIDE ( Cache_Get_Mode = 0x40017ff0 );
|
||||
PROVIDE ( Cache_Get_Virtual_Addr = 0x40019210 );
|
||||
PROVIDE ( Cache_Ibus_MMU_Set = 0x40018df4 );
|
||||
PROVIDE ( Cache_ICache_Preload_Done = 0x4001859c );
|
||||
PROVIDE ( Cache_Invalidate_Addr = 0x400182e4 );
|
||||
PROVIDE ( Cache_Invalidate_DCache_All = 0x4001842c );
|
||||
PROVIDE ( Cache_Invalidate_DCache_Items = 0x40018208 );
|
||||
PROVIDE ( Cache_Invalidate_ICache_All = 0x40018420 );
|
||||
PROVIDE ( Cache_Invalidate_ICache_Items = 0x400181b8 );
|
||||
PROVIDE ( Cache_Lock_Addr = 0x40018b10 );
|
||||
PROVIDE ( Cache_Lock_DCache_Items = 0x40018a80 );
|
||||
PROVIDE ( Cache_Lock_ICache_Items = 0x40018950 );
|
||||
PROVIDE ( Cache_Mask_All = 0x40018458 );
|
||||
PROVIDE ( cache_memory_baseaddrs = 0x3ffaf020 );
|
||||
PROVIDE ( Cache_MMU_Init = 0x40018dd8 );
|
||||
PROVIDE ( Cache_Resume_DCache = 0x40018d3c );
|
||||
PROVIDE ( Cache_Resume_DCache_Autoload = 0x4001850c );
|
||||
PROVIDE ( Cache_Resume_ICache = 0x40018cdc );
|
||||
PROVIDE ( Cache_Resume_ICache_Autoload = 0x400184c4 );
|
||||
PROVIDE ( Cache_Set_DCache_Mode = 0x40018074 );
|
||||
PROVIDE ( Cache_Set_Default_Mode = 0x4001810c );
|
||||
PROVIDE ( Cache_Set_ICache_Mode = 0x4001803c );
|
||||
PROVIDE ( Cache_Start_DCache_Preload = 0x400185c4 );
|
||||
PROVIDE ( Cache_Start_ICache_Preload = 0x40018530 );
|
||||
PROVIDE ( Cache_Suspend_DCache = 0x40018d04 );
|
||||
PROVIDE ( Cache_Suspend_DCache_Autoload = 0x400184e0 );
|
||||
PROVIDE ( Cache_Suspend_ICache = 0x40018ca4 );
|
||||
PROVIDE ( Cache_Suspend_ICache_Autoload = 0x40018498 );
|
||||
PROVIDE ( Cache_Travel_Tag_Memory = 0x4001908c );
|
||||
PROVIDE ( Cache_Unlock_Addr = 0x40018b9c );
|
||||
PROVIDE ( Cache_Unlock_DCache_Items = 0x40018ac8 );
|
||||
PROVIDE ( Cache_Unlock_ICache_Items = 0x40018998 );
|
||||
PROVIDE ( Cache_UnMask_Drom0 = 0x40018480 );
|
||||
PROVIDE ( Cache_WriteBack_Addr = 0x400183c8 );
|
||||
PROVIDE ( Cache_WriteBack_All = 0x40018444 );
|
||||
PROVIDE ( Cache_WriteBack_Items = 0x40018298 );
|
||||
PROVIDE ( cacl_rtc_memory_crc = 0x4000ffa0 );
|
||||
PROVIDE ( cdc_acm_class_handle_req = 0x40013050 );
|
||||
PROVIDE ( cdc_acm_config = 0x3ffffa10 );
|
||||
PROVIDE ( cdc_acm_dev = 0x3ffffce8 );
|
||||
PROVIDE ( cdc_acm_fifo_fill = 0x4001318c );
|
||||
PROVIDE ( cdc_acm_fifo_read = 0x40013200 );
|
||||
PROVIDE ( cdc_acm_init = 0x40013144 );
|
||||
PROVIDE ( cdc_acm_irq_callback_set = 0x400132d4 );
|
||||
PROVIDE ( cdc_acm_irq_is_pending = 0x400132b0 );
|
||||
PROVIDE ( cdc_acm_irq_rx_disable = 0x40013290 );
|
||||
PROVIDE ( cdc_acm_irq_rx_enable = 0x40013284 );
|
||||
PROVIDE ( cdc_acm_irq_rx_ready = 0x4001329c );
|
||||
PROVIDE ( cdc_acm_irq_state_disable = 0x40013264 );
|
||||
PROVIDE ( cdc_acm_irq_state_enable = 0x40013258 );
|
||||
PROVIDE ( cdc_acm_irq_tx_disable = 0x4001324c );
|
||||
PROVIDE ( cdc_acm_irq_tx_enable = 0x40013240 );
|
||||
PROVIDE ( cdc_acm_irq_tx_ready = 0x40013270 );
|
||||
PROVIDE ( cdc_acm_line_ctrl_get = 0x40013330 );
|
||||
PROVIDE ( cdc_acm_line_ctrl_set = 0x400132dc );
|
||||
PROVIDE ( cdc_acm_poll_out = 0x40013360 );
|
||||
PROVIDE ( cdc_acm_rx_fifo_cnt = 0x400131ec );
|
||||
PROVIDE ( chip723_phyrom_version = 0x4000a8a8 );
|
||||
PROVIDE ( chip_usb_detach = 0x40013508 );
|
||||
PROVIDE ( chip_usb_dw_did_persist = 0x4001337c );
|
||||
PROVIDE ( chip_usb_dw_init = 0x400133bc );
|
||||
PROVIDE ( chip_usb_dw_prepare_persist = 0x40013588 );
|
||||
PROVIDE ( chip_usb_get_persist_flags = 0x400135d8 );
|
||||
PROVIDE ( chip_usb_set_persist_flags = 0x400135e8 );
|
||||
PROVIDE ( context = 0x3fffeb34 );
|
||||
PROVIDE ( cpio_destroy = 0x4001599c );
|
||||
PROVIDE ( cpio_done = 0x40015968 );
|
||||
PROVIDE ( cpio_feed = 0x40015668 );
|
||||
PROVIDE ( cpio_start = 0x4001561c );
|
||||
PROVIDE ( crc16_le = 0x40011a10 );
|
||||
PROVIDE ( crc32_le = 0x400119dc );
|
||||
PROVIDE ( crc8_le = 0x40011a4c );
|
||||
PROVIDE ( _cvt = 0x4000f9b8 );
|
||||
PROVIDE ( _data_end_all_pro = 0x3fffff98 );
|
||||
PROVIDE ( _data_end_c = 0x3ffffd80 );
|
||||
PROVIDE ( _data_end_ets = 0x3fffe710 );
|
||||
PROVIDE ( _data_end_ets_delay = 0x3ffffd74 );
|
||||
PROVIDE ( _data_end_ets_printf = 0x3ffffd5c );
|
||||
PROVIDE ( _data_end_newlib = 0x3ffffd74 );
|
||||
PROVIDE ( _data_end_phyrom = 0x3fffff98 );
|
||||
PROVIDE ( _data_end_sip = 0x3fffeb70 );
|
||||
PROVIDE ( _data_end_slc = 0x3fffeb70 );
|
||||
PROVIDE ( _data_end_spi_flash = 0x3ffffd54 );
|
||||
PROVIDE ( _data_end_spi_slave = 0x3fffeb30 );
|
||||
PROVIDE ( _data_end_uart = 0x3ffffcf4 );
|
||||
PROVIDE ( _data_end_usbdev = 0x3ffffa6c );
|
||||
PROVIDE ( _data_end_xtos = 0x3fffef88 );
|
||||
PROVIDE ( _data_start_all_pro = 0x3fffff98 );
|
||||
PROVIDE ( _data_start_c = 0x3ffffd7c );
|
||||
PROVIDE ( _data_start_ets = 0x3fffe710 );
|
||||
PROVIDE ( _data_start_ets_delay = 0x3ffffd70 );
|
||||
PROVIDE ( _data_start_ets_printf = 0x3ffffd5c );
|
||||
PROVIDE ( _data_start_newlib = 0x3ffffd74 );
|
||||
PROVIDE ( _data_start_phyrom = 0x3ffffd90 );
|
||||
PROVIDE ( _data_start_sip = 0x3fffeb70 );
|
||||
PROVIDE ( _data_start_slc = 0x3fffeb70 );
|
||||
PROVIDE ( _data_start_spi_flash = 0x3ffffd38 );
|
||||
PROVIDE ( _data_start_spi_slave = 0x3fffeb30 );
|
||||
PROVIDE ( _data_start_uart = 0x3ffffcf4 );
|
||||
PROVIDE ( _data_start_usbdev = 0x3ffffa10 );
|
||||
PROVIDE ( _data_start_xtos = 0x3fffeb70 );
|
||||
PROVIDE ( dbus_baseaddrs = 0x3ffaf030 );
|
||||
PROVIDE ( _DebugExceptionVector = 0x40000280 );
|
||||
PROVIDE ( _DebugExceptionVector_text_end = 0x4000028b );
|
||||
PROVIDE ( _DebugExceptionVector_text_start = 0x40000280 );
|
||||
PROVIDE ( __default_global_locale = 0x3ffac600 );
|
||||
PROVIDE ( dfu_class_handle_req = 0x400152f0 );
|
||||
PROVIDE ( dfu_config_descr = 0x3ffaeeb2 );
|
||||
PROVIDE ( dfu_cpio_callback = 0x4001360c );
|
||||
PROVIDE ( dfu_custom_handle_req = 0x40015568 );
|
||||
PROVIDE ( dfu_flash_attach = 0x40015a34 );
|
||||
PROVIDE ( dfu_flash_deinit = 0x400159b4 );
|
||||
PROVIDE ( dfu_flash_erase = 0x400159bc );
|
||||
PROVIDE ( dfu_flash_init = 0x400159a4 );
|
||||
PROVIDE ( dfu_flash_program = 0x400159d0 );
|
||||
PROVIDE ( dfu_flash_read = 0x40015a24 );
|
||||
PROVIDE ( dfu_status_cb = 0x40015514 );
|
||||
PROVIDE ( dfu_updater_begin = 0x40013858 );
|
||||
PROVIDE ( dfu_updater_clear_err = 0x40013810 );
|
||||
PROVIDE ( dfu_updater_enable = 0x40013828 );
|
||||
PROVIDE ( dfu_updater_end = 0x40013900 );
|
||||
PROVIDE ( dfu_updater_feed = 0x400138b4 );
|
||||
PROVIDE ( dfu_updater_flash_read = 0x400139e8 );
|
||||
PROVIDE ( dfu_updater_get_err = 0x400137fc );
|
||||
PROVIDE ( dfu_updater_set_raw_addr = 0x400139d4 );
|
||||
PROVIDE ( dfu_usb_descriptors = 0x3ffaee4c );
|
||||
PROVIDE ( dh_group14_generator = 0x3ffadfec );
|
||||
PROVIDE ( dh_group14_prime = 0x3ffadeec );
|
||||
PROVIDE ( dh_group15_generator = 0x3ffadeeb );
|
||||
PROVIDE ( dh_group15_prime = 0x3ffadd6b );
|
||||
PROVIDE ( dh_group16_generator = 0x3ffadd6a );
|
||||
PROVIDE ( dh_group16_prime = 0x3ffadb6a );
|
||||
PROVIDE ( dh_group17_generator = 0x3ffadb69 );
|
||||
PROVIDE ( dh_group17_prime = 0x3ffad869 );
|
||||
PROVIDE ( dh_group18_generator = 0x3ffad868 );
|
||||
PROVIDE ( dh_group18_prime = 0x3ffad468 );
|
||||
PROVIDE ( dh_group1_generator = 0x3ffae18f );
|
||||
PROVIDE ( dh_group1_prime = 0x3ffae12f );
|
||||
PROVIDE ( dh_group2_generator = 0x3ffae12e );
|
||||
PROVIDE ( dh_group2_prime = 0x3ffae0ae );
|
||||
PROVIDE ( dh_group5_generator = 0x3ffae0ad );
|
||||
PROVIDE ( dh_group5_prime = 0x3ffadfed );
|
||||
PROVIDE ( disable_default_watchdog = 0x4000f270 );
|
||||
PROVIDE ( Disable_QMode = 0x400166e0 );
|
||||
PROVIDE ( dmadesc_rx = 0x3fffeb4c );
|
||||
PROVIDE ( dmadesc_tx = 0x3fffeb40 );
|
||||
PROVIDE ( _DoubleExceptionVector = 0x400003c0 );
|
||||
PROVIDE ( _DoubleExceptionVector_text_end = 0x400003c6 );
|
||||
PROVIDE ( _DoubleExceptionVector_text_start = 0x400003c0 );
|
||||
PROVIDE ( _dram0_0_start = 0x3ffeab00 );
|
||||
PROVIDE ( _dram0_rtos_reserved_start = 0x3ffffa10 );
|
||||
PROVIDE ( dummy_len_plus = 0x3ffffd54 );
|
||||
PROVIDE ( Enable_QMode = 0x40016690 );
|
||||
PROVIDE ( esp_crc8 = 0x40011a78 );
|
||||
PROVIDE ( esp_rom_config_pad_power_select = 0x40016e58 );
|
||||
PROVIDE ( esp_rom_opiflash_cache_mode_config = 0x40016754 );
|
||||
PROVIDE ( esp_rom_opiflash_exec_cmd = 0x40017e30 );
|
||||
PROVIDE ( esp_rom_opiflash_exit_continuous_read_mode = 0x40017ee8 );
|
||||
PROVIDE ( esp_rom_opiflash_mode_reset = 0x40017f90 );
|
||||
PROVIDE ( esp_rom_opiflash_pin_config = 0x400177f8 );
|
||||
PROVIDE ( esp_rom_opiflash_soft_reset = 0x40017f24 );
|
||||
PROVIDE ( esp_rom_spi_cmd_config = 0x40017c58 );
|
||||
PROVIDE ( esp_rom_spi_cmd_start = 0x40017ba8 );
|
||||
PROVIDE ( esp_rom_spi_flash_auto_sus_res = 0x400175e0 );
|
||||
PROVIDE ( esp_rom_spi_flash_auto_wait_idle = 0x4001751c );
|
||||
PROVIDE ( esp_rom_spi_flash_send_resume = 0x40017570 );
|
||||
PROVIDE ( esp_rom_spi_flash_update_id = 0x40016e44 );
|
||||
PROVIDE ( esp_rom_spi_reset_rw_mode = 0x40017984 );
|
||||
PROVIDE ( esp_rom_spi_set_dtr_swap_mode = 0x40017b60 );
|
||||
PROVIDE ( esp_rom_spi_set_op_mode = 0x400179e8 );
|
||||
PROVIDE ( _etext = 0x4001bed0 );
|
||||
PROVIDE ( ets_aes_block = 0x4000d610 );
|
||||
PROVIDE ( ets_aes_disable = 0x4000d4f8 );
|
||||
PROVIDE ( ets_aes_enable = 0x4000d4cc );
|
||||
PROVIDE ( ets_aes_set_endian = 0x4000d528 );
|
||||
PROVIDE ( ets_aes_setkey = 0x4000d594 );
|
||||
PROVIDE ( ets_aes_setkey_dec = 0x4000d5f0 );
|
||||
PROVIDE ( ets_aes_setkey_enc = 0x4000d5e0 );
|
||||
PROVIDE ( ets_bigint_disable = 0x4000d750 );
|
||||
PROVIDE ( ets_bigint_enable = 0x4000d708 );
|
||||
PROVIDE ( ets_bigint_getz = 0x4000d858 );
|
||||
PROVIDE ( ets_bigint_modexp = 0x4000d818 );
|
||||
PROVIDE ( ets_bigint_modmult = 0x4000d7f4 );
|
||||
PROVIDE ( ets_bigint_multiply = 0x4000d790 );
|
||||
PROVIDE ( ets_bigint_wait_finish = 0x4000d840 );
|
||||
PROVIDE ( ets_config_flash_by_image_hdr = 0x40010e40 );
|
||||
PROVIDE ( ets_delay_us = 0x4000d888 );
|
||||
PROVIDE ( ets_ds_disable = 0x4000d910 );
|
||||
PROVIDE ( ets_ds_enable = 0x4000d8e4 );
|
||||
PROVIDE ( ets_ds_encrypt_params = 0x4000da90 );
|
||||
PROVIDE ( ets_ds_finish_sign = 0x4000d9f8 );
|
||||
PROVIDE ( ets_ds_is_busy = 0x4000d93c );
|
||||
PROVIDE ( ets_ds_start_sign = 0x4000d96c );
|
||||
PROVIDE ( ets_efuse_cache_encryption_enabled = 0x4000e690 );
|
||||
PROVIDE ( ets_efuse_clear_program_registers = 0x4000e100 );
|
||||
PROVIDE ( ets_efuse_count_unused_key_blocks = 0x4000e2c4 );
|
||||
PROVIDE ( ets_efuse_download_modes_disabled = 0x4000e594 );
|
||||
PROVIDE ( ets_efuse_find_purpose = 0x4000e224 );
|
||||
PROVIDE ( ets_efuse_find_unused_key_block = 0x4000e2ac );
|
||||
PROVIDE ( ets_efuse_flash_opi_5pads_power_sel_vddspi = 0x4000e640 );
|
||||
PROVIDE ( ets_efuse_flash_opi_mode = 0x4000e650 );
|
||||
PROVIDE ( ets_efuse_force_send_resume = 0x4000e660 );
|
||||
PROVIDE ( ets_efuse_get_flash_delay_us = 0x4000e6d4 );
|
||||
PROVIDE ( ets_efuse_get_key_purpose = 0x4000e1b0 );
|
||||
PROVIDE ( ets_efuse_get_opiconfig = 0x4000e4fc );
|
||||
PROVIDE ( ets_efuse_get_read_register_address = 0x4000e18c );
|
||||
PROVIDE ( ets_efuse_get_spiconfig = 0x4000e4a0 );
|
||||
PROVIDE ( ets_efuse_get_uart_print_channel = 0x4000e5b4 );
|
||||
PROVIDE ( ets_efuse_get_uart_print_control = 0x4000e5a4 );
|
||||
PROVIDE ( ets_efuse_get_wp_pad = 0x4000e444 );
|
||||
PROVIDE ( ets_efuse_key_block_unused = 0x4000e250 );
|
||||
PROVIDE ( ets_efuse_legacy_spi_boot_mode_disabled = 0x4000e6b0 );
|
||||
PROVIDE ( ets_efuse_program = 0x4000e134 );
|
||||
PROVIDE ( ets_efuse_read = 0x4000e0c0 );
|
||||
PROVIDE ( ets_efuse_rs_calculate = 0x4000e6f8 );
|
||||
PROVIDE ( ets_efuse_secure_boot_aggressive_revoke_enabled = 0x4000e680 );
|
||||
PROVIDE ( ets_efuse_secure_boot_enabled = 0x4000e670 );
|
||||
PROVIDE ( ets_efuse_security_download_modes_enabled = 0x4000e5d4 );
|
||||
PROVIDE ( ets_efuse_set_timing = 0x4000df3c );
|
||||
PROVIDE ( ets_efuse_start = 0x4000e084 );
|
||||
PROVIDE ( ets_efuse_usb_download_mode_disabled = 0x4000e5f4 );
|
||||
PROVIDE ( ets_efuse_usb_force_nopersist = 0x4000e630 );
|
||||
PROVIDE ( ets_efuse_usb_module_disabled = 0x4000e5c4 );
|
||||
PROVIDE ( ets_efuse_usb_use_ext_phy = 0x4000e620 );
|
||||
PROVIDE ( ets_efuse_write_key = 0x4000e2f4 );
|
||||
PROVIDE ( ets_emsa_pss_verify = 0x40011818 );
|
||||
PROVIDE ( ets_get_apb_freq = 0x40010c58 );
|
||||
PROVIDE ( ets_get_cpu_frequency = 0x4000d8b0 );
|
||||
PROVIDE ( ets_get_printf_channel = 0x4000ff48 );
|
||||
PROVIDE ( ets_get_xtal_div = 0x40010bfc );
|
||||
PROVIDE ( ets_get_xtal_freq = 0x40010c38 );
|
||||
PROVIDE ( ets_hmac_calculate_downstream = 0x4000f120 );
|
||||
PROVIDE ( ets_hmac_calculate_message = 0x4000f020 );
|
||||
PROVIDE ( ets_hmac_disable = 0x4000eff4 );
|
||||
PROVIDE ( ets_hmac_enable = 0x4000efd8 );
|
||||
PROVIDE ( ets_hmac_invalidate_downstream = 0x4000f140 );
|
||||
PROVIDE ( ets_install_lock = 0x4000fea0 );
|
||||
PROVIDE ( ets_install_putc1 = 0x4000feb0 );
|
||||
PROVIDE ( ets_install_putc2 = 0x4000fed0 );
|
||||
PROVIDE ( ets_install_uart_printf = 0x4000fec0 );
|
||||
PROVIDE ( ets_intr_count = 0x3fffe710 );
|
||||
PROVIDE ( ets_intr_lock = 0x4000f168 );
|
||||
PROVIDE ( ets_intr_unlock = 0x4000f17c );
|
||||
PROVIDE ( ets_is_print_boot = 0x4000f2a0 );
|
||||
PROVIDE ( ets_isr_attach = 0x4000f1a4 );
|
||||
PROVIDE ( ets_isr_mask = 0x4000f1b4 );
|
||||
PROVIDE ( ets_isr_unmask = 0x4000f1c0 );
|
||||
PROVIDE ( ets_jtag_enable_temporarily = 0x4000e548 );
|
||||
PROVIDE ( ets_loader_map_range = 0x40010d4c );
|
||||
PROVIDE ( ets_mgf1_sha256 = 0x400117b0 );
|
||||
PROVIDE ( ets_printf = 0x4000fee0 );
|
||||
PROVIDE ( ets_printf_lock = 0x3ffffd64 );
|
||||
PROVIDE ( ets_printf_uart = 0x3ffffd5c );
|
||||
PROVIDE ( ets_printf_unlock = 0x3ffffd60 );
|
||||
PROVIDE ( ets_rsa_pss_verify = 0x4001191c );
|
||||
PROVIDE ( ets_run_flash_bootloader = 0x40010f58 );
|
||||
PROVIDE ( ets_secure_boot_read_key_digests = 0x400101ac );
|
||||
PROVIDE ( ets_secure_boot_revoke_public_key_digest = 0x4001025c );
|
||||
PROVIDE ( ets_secure_boot_verify_bootloader_with_keys = 0x40010444 );
|
||||
PROVIDE ( ets_secure_boot_verify_signature = 0x400102cc );
|
||||
PROVIDE ( ets_secure_boot_verify_stage_bootloader = 0x40010720 );
|
||||
PROVIDE ( ets_set_printf_channel = 0x4000ff3c );
|
||||
PROVIDE ( ets_set_user_start = 0x4000f25c );
|
||||
PROVIDE ( ets_set_xtal_div = 0x40010c18 );
|
||||
PROVIDE ( ets_sha_clone = 0x4001095c );
|
||||
PROVIDE ( ets_sha_disable = 0x400107b4 );
|
||||
PROVIDE ( ets_sha_enable = 0x40010788 );
|
||||
PROVIDE ( ets_sha_finish = 0x40010ab8 );
|
||||
PROVIDE ( ets_sha_get_state = 0x40010934 );
|
||||
PROVIDE ( ets_sha_init = 0x400107e0 );
|
||||
PROVIDE ( ets_sha_process = 0x40010988 );
|
||||
PROVIDE ( ets_sha_starts = 0x40010828 );
|
||||
PROVIDE ( ets_sha_update = 0x400109f8 );
|
||||
PROVIDE ( ets_startup_callback = 0x3fffe718 );
|
||||
PROVIDE ( ets_unpack_flash_code_legacy = 0x40011430 );
|
||||
PROVIDE ( ets_update_cpu_frequency = 0x4000d8a4 );
|
||||
PROVIDE ( ets_vprintf = 0x4000fa3c );
|
||||
PROVIDE ( ets_waiti0 = 0x4000f190 );
|
||||
PROVIDE ( ets_wdt_reset_cpu = 0x4001a82c );
|
||||
PROVIDE ( ets_write_char = 0x4000f974 );
|
||||
PROVIDE ( ets_write_char_uart = 0x4000f998 );
|
||||
PROVIDE ( exc_cause_table = 0x3ffacbe8 );
|
||||
PROVIDE ( FilePacketSendDeflatedReqMsgProc = 0x40011ed8 );
|
||||
PROVIDE ( FilePacketSendReqMsgProc = 0x40011bd8 );
|
||||
PROVIDE ( flashchip = 0x3ffffd38 );
|
||||
PROVIDE ( FlashDwnLdDeflatedStartMsgProc = 0x40011e80 );
|
||||
PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x40011cc0 );
|
||||
PROVIDE ( FlashDwnLdStartMsgProc = 0x40011b74 );
|
||||
PROVIDE ( FlashDwnLdStopDeflatedReqMsgProc = 0x40011fd8 );
|
||||
PROVIDE ( FlashDwnLdStopReqMsgProc = 0x40011c90 );
|
||||
PROVIDE ( general_device_descr = 0x3ffffa58 );
|
||||
PROVIDE ( _GeneralException = 0x400073cf );
|
||||
PROVIDE ( get_id = 0x4001610c );
|
||||
PROVIDE ( GetSecurityInfoProc = 0x40012098 );
|
||||
PROVIDE ( GetUartDevice = 0x40012f60 );
|
||||
PROVIDE ( __global_locale_ptr = 0x3ffffd7c );
|
||||
PROVIDE ( g_phyFuns = 0x3ffffd90 );
|
||||
PROVIDE ( g_phyFuns_instance = 0x3ffffd94 );
|
||||
PROVIDE ( gpio_input_get = 0x400193a0 );
|
||||
PROVIDE ( gpio_input_get_high = 0x400193b4 );
|
||||
PROVIDE ( gpio_matrix_in = 0x40019430 );
|
||||
PROVIDE ( gpio_matrix_out = 0x40019460 );
|
||||
PROVIDE ( gpio_output_disable = 0x400194dc );
|
||||
PROVIDE ( gpio_output_enable = 0x400194b0 );
|
||||
PROVIDE ( gpio_output_set = 0x4001933c );
|
||||
PROVIDE ( gpio_output_set_high = 0x40019374 );
|
||||
PROVIDE ( gpio_pad_hold = 0x40019654 );
|
||||
PROVIDE ( gpio_pad_input_disable = 0x400195f0 );
|
||||
PROVIDE ( gpio_pad_input_enable = 0x400195cc );
|
||||
PROVIDE ( gpio_pad_pulldown = 0x40019598 );
|
||||
PROVIDE ( gpio_pad_pullup = 0x40019564 );
|
||||
PROVIDE ( gpio_pad_select_gpio = 0x40019510 );
|
||||
PROVIDE ( gpio_pad_set_drv = 0x40019538 );
|
||||
PROVIDE ( gpio_pad_unhold = 0x4001961c );
|
||||
PROVIDE ( gpio_pin_wakeup_disable = 0x40019404 );
|
||||
PROVIDE ( gpio_pin_wakeup_enable = 0x400193c8 );
|
||||
PROVIDE ( g_shared_buffers = 0x3ffeab04 );
|
||||
PROVIDE ( g_ticks_per_us = 0x3ffffd70 );
|
||||
PROVIDE ( hmac_md5 = 0x40005490 );
|
||||
PROVIDE ( hmac_md5_vector = 0x400053a0 );
|
||||
PROVIDE ( ibus_baseaddrs = 0x3ffaf03c );
|
||||
PROVIDE ( intr_matrix_set = 0x4000f1d0 );
|
||||
PROVIDE ( _iram0_text_end = 0x40000540 );
|
||||
PROVIDE ( _iram0_text_start = 0x40000540 );
|
||||
PROVIDE ( _iram1_text_end = 0x60021100 );
|
||||
PROVIDE ( _iram1_text_start = 0x60021100 );
|
||||
PROVIDE ( _KernelExceptionVector = 0x40000300 );
|
||||
PROVIDE ( _KernelExceptionVector_text_end = 0x40000306 );
|
||||
PROVIDE ( _KernelExceptionVector_text_start = 0x40000300 );
|
||||
PROVIDE ( _Level2FromVector = 0x400074f8 );
|
||||
PROVIDE ( _Level2HandlerLabel = 0x00000000 );
|
||||
PROVIDE ( _Level2InterruptVector_text_end = 0x40000186 );
|
||||
PROVIDE ( _Level2InterruptVector_text_start = 0x40000180 );
|
||||
PROVIDE ( _Level2Vector = 0x40000180 );
|
||||
PROVIDE ( _Level3FromVector = 0x40007594 );
|
||||
PROVIDE ( _Level3HandlerLabel = 0x00000000 );
|
||||
PROVIDE ( _Level3InterruptVector_text_end = 0x400001c6 );
|
||||
PROVIDE ( _Level3InterruptVector_text_start = 0x400001c0 );
|
||||
PROVIDE ( _Level3Vector = 0x400001c0 );
|
||||
PROVIDE ( _Level4FromVector = 0x4000762c );
|
||||
PROVIDE ( _Level4HandlerLabel = 0x00000000 );
|
||||
PROVIDE ( _Level4InterruptVector_text_end = 0x40000206 );
|
||||
PROVIDE ( _Level4InterruptVector_text_start = 0x40000200 );
|
||||
PROVIDE ( _Level4Vector = 0x40000200 );
|
||||
PROVIDE ( _Level5FromVector = 0x4000775c );
|
||||
PROVIDE ( _Level5HandlerLabel = 0x00000000 );
|
||||
PROVIDE ( _Level5InterruptVector_text_end = 0x40000246 );
|
||||
PROVIDE ( _Level5InterruptVector_text_start = 0x40000240 );
|
||||
PROVIDE ( _Level5Vector = 0x40000240 );
|
||||
PROVIDE ( _LevelOneInterrupt = 0x4000740a );
|
||||
PROVIDE ( _lit4_end = 0x40000540 );
|
||||
PROVIDE ( _lit4_start = 0x40000540 );
|
||||
PROVIDE ( lldesc_build_chain = 0x4000907c );
|
||||
PROVIDE ( lldesc_num2link = 0x4000916c );
|
||||
PROVIDE ( lldesc_set_owner = 0x40009198 );
|
||||
PROVIDE ( lldesc_setup = 0x40019ed8 );
|
||||
PROVIDE ( main = 0x4000f6c4 );
|
||||
PROVIDE ( MD5Final = 0x4000530c );
|
||||
PROVIDE ( MD5Init = 0x4000526c );
|
||||
PROVIDE ( MD5Update = 0x4000528c );
|
||||
PROVIDE ( md5_vector = 0x40005374 );
|
||||
PROVIDE ( MemDwnLdStartMsgProc = 0x40011cec );
|
||||
PROVIDE ( MemDwnLdStopReqMsgProc = 0x40011d80 );
|
||||
PROVIDE ( _memmap_cacheattr_bp_allvalid = 0x22222222 );
|
||||
PROVIDE ( _memmap_cacheattr_bp_base = 0x00000220 );
|
||||
PROVIDE ( _memmap_cacheattr_bp_strict = 0xfffff22f );
|
||||
PROVIDE ( _memmap_cacheattr_bp_trapnull = 0x2222222f );
|
||||
PROVIDE ( _memmap_cacheattr_reset = 0x2222211f );
|
||||
PROVIDE ( _memmap_cacheattr_unused_mask = 0xfffff00f );
|
||||
PROVIDE ( _memmap_cacheattr_wb_allvalid = 0x22222112 );
|
||||
PROVIDE ( _memmap_cacheattr_wba_trapnull = 0x2222211f );
|
||||
PROVIDE ( _memmap_cacheattr_wb_base = 0x00000110 );
|
||||
PROVIDE ( _memmap_cacheattr_wbna_trapnull = 0x2222211f );
|
||||
PROVIDE ( _memmap_cacheattr_wb_strict = 0xfffff11f );
|
||||
PROVIDE ( _memmap_cacheattr_wb_trapnull = 0x2222211f );
|
||||
PROVIDE ( _memmap_cacheattr_wt_allvalid = 0x22222112 );
|
||||
PROVIDE ( _memmap_cacheattr_wt_base = 0x00000110 );
|
||||
PROVIDE ( _memmap_cacheattr_wt_strict = 0xfffff11f );
|
||||
PROVIDE ( _memmap_cacheattr_wt_trapnull = 0x2222211f );
|
||||
PROVIDE ( _memmap_vecbase_reset = 0x40000000 );
|
||||
PROVIDE ( MemPacketSendReqMsgProc = 0x40011d1c );
|
||||
PROVIDE ( multofup = 0x4001bce0 );
|
||||
PROVIDE ( must_reset = 0x3ffffcf4 );
|
||||
PROVIDE ( mz_adler32 = 0x40002e90 );
|
||||
PROVIDE ( mz_crc32 = 0x40002f58 );
|
||||
PROVIDE ( mz_free = 0x40002fa4 );
|
||||
PROVIDE ( _NMIExceptionVector = 0x400002c0 );
|
||||
PROVIDE ( _NMIExceptionVector_text_end = 0x400002c3 );
|
||||
PROVIDE ( _NMIExceptionVector_text_start = 0x400002c0 );
|
||||
PROVIDE ( __packed = 0x3ffffcec );
|
||||
PROVIDE ( phy_get_romfuncs = 0x4000a88c );
|
||||
PROVIDE ( _Pri_4_HandlerAddress = 0x3fffed78 );
|
||||
PROVIDE ( _Pri_5_HandlerAddress = 0x3fffed7c );
|
||||
PROVIDE ( pthread_setcancelstate = 0x40019fa8 );
|
||||
PROVIDE ( _putc1 = 0x3ffffd6c );
|
||||
PROVIDE ( _putc2 = 0x3ffffd68 );
|
||||
PROVIDE ( RcvMsg = 0x40012f10 );
|
||||
PROVIDE ( recv_packet = 0x40012de8 );
|
||||
PROVIDE ( _ResetHandler = 0x4000044c );
|
||||
PROVIDE ( _ResetVector = 0x40000400 );
|
||||
PROVIDE ( _ResetVector_literal_end = 0x40000540 );
|
||||
PROVIDE ( _ResetVector_literal_start = 0x40000540 );
|
||||
PROVIDE ( _ResetVector_text_end = 0x4000053d );
|
||||
PROVIDE ( _ResetVector_text_start = 0x40000400 );
|
||||
PROVIDE ( _rodata_end = 0x3ffaff2c );
|
||||
PROVIDE ( _rodata_start = 0x3ffac600 );
|
||||
PROVIDE ( rom_abs_temp = 0x4000c330 );
|
||||
PROVIDE ( rom_ant_btrx_cfg = 0x4000a0fc );
|
||||
PROVIDE ( rom_ant_bttx_cfg = 0x4000a0c0 );
|
||||
PROVIDE ( rom_ant_dft_cfg = 0x40009fc8 );
|
||||
PROVIDE ( rom_ant_wifirx_cfg = 0x4000a03c );
|
||||
PROVIDE ( rom_ant_wifitx_cfg = 0x40009ff8 );
|
||||
PROVIDE ( rom_bb_bss_cbw40_dig = 0x40009a84 );
|
||||
PROVIDE ( rom_bb_wdg_cfg = 0x40009eb8 );
|
||||
PROVIDE ( rom_bb_wdg_test_en = 0x40009a48 );
|
||||
PROVIDE ( rom_bb_wdt_get_status = 0x40009d18 );
|
||||
PROVIDE ( rom_bb_wdt_int_enable = 0x40009cd4 );
|
||||
PROVIDE ( rom_bb_wdt_rst_enable = 0x40009cb4 );
|
||||
PROVIDE ( rom_bb_wdt_timeout_clear = 0x40009cfc );
|
||||
PROVIDE ( rom_cbw2040_cfg = 0x4000a550 );
|
||||
PROVIDE ( rom_check_noise_floor = 0x40009b4c );
|
||||
PROVIDE ( rom_chip_i2c_readReg = 0x4000a8e4 );
|
||||
PROVIDE ( rom_chip_i2c_writeReg = 0x4000a960 );
|
||||
PROVIDE ( rom_correct_rf_ana_gain = 0x4000d2b4 );
|
||||
PROVIDE ( rom_dc_iq_est = 0x4000c414 );
|
||||
PROVIDE ( rom_disable_agc = 0x400091cc );
|
||||
PROVIDE ( rom_enable_agc = 0x400091e4 );
|
||||
PROVIDE ( rom_freq_get_i2c_data = 0x4000bb84 );
|
||||
PROVIDE ( rom_freq_i2c_set_wifi_data = 0x4000b948 );
|
||||
PROVIDE ( rom_freq_i2c_write_set = 0x4000b3bc );
|
||||
PROVIDE ( rom_gen_rx_gain_table = 0x4000a300 );
|
||||
PROVIDE ( rom_get_bbgain_db = 0x400094ec );
|
||||
PROVIDE ( rom_get_data_sat = 0x40009338 );
|
||||
PROVIDE ( rom_get_fm_sar_dout = 0x4000c024 );
|
||||
PROVIDE ( rom_get_i2c_read_mask = 0x4000a8c0 );
|
||||
PROVIDE ( rom_get_power_db = 0x4000ce28 );
|
||||
PROVIDE ( rom_get_pwctrl_correct = 0x4000d470 );
|
||||
PROVIDE ( rom_get_rfcal_rxiq_data = 0x4000cab0 );
|
||||
PROVIDE ( rom_get_rf_gain_qdb = 0x4000d29c );
|
||||
PROVIDE ( rom_get_sar_dout = 0x4000d400 );
|
||||
PROVIDE ( rom_i2c_clk_sel = 0x4000a788 );
|
||||
PROVIDE ( rom_i2c_readReg = 0x4000a940 );
|
||||
PROVIDE ( rom_i2c_readReg_Mask = 0x4000a9c4 );
|
||||
PROVIDE ( rom_i2c_writeReg = 0x4000a9a8 );
|
||||
PROVIDE ( rom_i2c_writeReg_Mask = 0x4000aa00 );
|
||||
PROVIDE ( rom_index_to_txbbgain = 0x4000bd10 );
|
||||
PROVIDE ( rom_iq_est_disable = 0x4000c3d8 );
|
||||
PROVIDE ( rom_iq_est_enable = 0x4000c358 );
|
||||
PROVIDE ( rom_linear_to_db = 0x4000cdbc );
|
||||
PROVIDE ( rom_loopback_mode_en = 0x40009304 );
|
||||
PROVIDE ( rom_mac_enable_bb = 0x40009e48 );
|
||||
PROVIDE ( rom_meas_tone_pwr_db = 0x4000ce64 );
|
||||
PROVIDE ( rom_mhz2ieee = 0x4000a4e8 );
|
||||
PROVIDE ( rom_noise_floor_auto_set = 0x40009ab4 );
|
||||
PROVIDE ( rom_pbus_debugmode = 0x4000ac70 );
|
||||
PROVIDE ( rom_pbus_force_mode = 0x4000aa6c );
|
||||
PROVIDE ( rom_pbus_force_test = 0x4000abd0 );
|
||||
PROVIDE ( rom_pbus_rd = 0x4000ac2c );
|
||||
PROVIDE ( rom_pbus_rd_addr = 0x4000ab34 );
|
||||
PROVIDE ( rom_pbus_rd_shift = 0x4000ab80 );
|
||||
PROVIDE ( rom_pbus_rx_dco_cal = 0x4000c49c );
|
||||
PROVIDE ( rom_pbus_set_dco = 0x4000ae2c );
|
||||
PROVIDE ( rom_pbus_set_rxgain = 0x4000ac98 );
|
||||
PROVIDE ( rom_pbus_workmode = 0x4000ac84 );
|
||||
PROVIDE ( rom_pbus_xpd_rx_off = 0x4000acfc );
|
||||
PROVIDE ( rom_pbus_xpd_rx_on = 0x4000ad30 );
|
||||
PROVIDE ( rom_pbus_xpd_tx_off = 0x4000ad84 );
|
||||
PROVIDE ( rom_pbus_xpd_tx_on = 0x4000add4 );
|
||||
PROVIDE ( rom_phy_ant_init = 0x40009f48 );
|
||||
PROVIDE ( rom_phy_byte_to_word = 0x40009d60 );
|
||||
PROVIDE ( rom_phy_chan_dump_cfg = 0x4000a180 );
|
||||
PROVIDE ( rom_phy_chan_filt_set = 0x4000a614 );
|
||||
PROVIDE ( rom_phy_close_pa = 0x4000a810 );
|
||||
PROVIDE ( rom_phy_disable_cca = 0x40009208 );
|
||||
PROVIDE ( rom_phy_disable_low_rate = 0x4000a2b8 );
|
||||
PROVIDE ( rom_phy_enable_cca = 0x40009234 );
|
||||
PROVIDE ( rom_phy_enable_low_rate = 0x4000a280 );
|
||||
PROVIDE ( rom_phy_freq_correct = 0x4000b0b4 );
|
||||
PROVIDE ( rom_phy_get_noisefloor = 0x40009b04 );
|
||||
PROVIDE ( rom_phy_get_rx_freq = 0x4000a6ac );
|
||||
PROVIDE ( rom_phy_get_tx_rate = 0x40009d50 );
|
||||
PROVIDE ( rom_phy_rx11blr_cfg = 0x40009c5c );
|
||||
PROVIDE ( rom_phy_rx_sense_set = 0x4000a704 );
|
||||
PROVIDE ( rom_phy_set_bbfreq_init = 0x4000d3d0 );
|
||||
PROVIDE ( rom_pll_correct_dcap = 0x4000bad4 );
|
||||
PROVIDE ( rom_pow_usr = 0x4000924c );
|
||||
PROVIDE ( rom_read_hw_noisefloor = 0x40009c38 );
|
||||
PROVIDE ( rom_read_sar_dout = 0x4000bfd4 );
|
||||
PROVIDE ( rom_restart_cal = 0x4000ae74 );
|
||||
PROVIDE ( rom_rfcal_pwrctrl = 0x4000d098 );
|
||||
PROVIDE ( rom_rfcal_rxiq = 0x4000ca3c );
|
||||
PROVIDE ( rom_rfcal_txcap = 0x4000ccac );
|
||||
PROVIDE ( rom_rfpll_set_freq = 0x4000afa4 );
|
||||
PROVIDE ( rom_rftx_init = 0x4000b24c );
|
||||
PROVIDE ( rom_rx_gain_force = 0x40009558 );
|
||||
PROVIDE ( rom_rxiq_cover_mg_mp = 0x4000c954 );
|
||||
PROVIDE ( rom_rxiq_get_mis = 0x4000c7d8 );
|
||||
PROVIDE ( rom_rxiq_set_reg = 0x4000c8ec );
|
||||
PROVIDE ( rom_set_cal_rxdc = 0x400092c4 );
|
||||
PROVIDE ( rom_set_cca = 0x4000a59c );
|
||||
PROVIDE ( rom_set_chan_cal_interp = 0x4000cba4 );
|
||||
PROVIDE ( rom_set_channel_freq = 0x4000b00c );
|
||||
PROVIDE ( rom_set_loopback_gain = 0x40009268 );
|
||||
PROVIDE ( rom_set_noise_floor = 0x40009bf4 );
|
||||
PROVIDE ( rom_set_pbus_mem = 0x40009380 );
|
||||
PROVIDE ( rom_set_rf_freq_offset = 0x4000b214 );
|
||||
PROVIDE ( rom_set_rxclk_en = 0x400095cc );
|
||||
PROVIDE ( rom_set_txcap_reg = 0x4000cc34 );
|
||||
PROVIDE ( rom_set_txclk_en = 0x4000959c );
|
||||
PROVIDE ( rom_set_tx_dig_gain = 0x40009514 );
|
||||
PROVIDE ( rom_set_xpd_sar = 0x40009f08 );
|
||||
PROVIDE ( rom_spur_cal = 0x4000a47c );
|
||||
PROVIDE ( rom_spur_reg_write_one_tone = 0x400097c4 );
|
||||
PROVIDE ( rom_start_tx_tone = 0x400096f0 );
|
||||
PROVIDE ( rom_start_tx_tone_step = 0x40009608 );
|
||||
PROVIDE ( rom_stop_tx_tone = 0x4000a428 );
|
||||
PROVIDE ( _rom_store = 0x4001bed0 );
|
||||
PROVIDE ( _rom_store_table = 0x4001bd64 );
|
||||
PROVIDE ( rom_target_power_add_backoff = 0x4000d278 );
|
||||
PROVIDE ( rom_txbbgain_to_index = 0x4000bce0 );
|
||||
PROVIDE ( rom_txcal_work_mode = 0x4000bf30 );
|
||||
PROVIDE ( rom_txdc_cal_init = 0x4000bd2c );
|
||||
PROVIDE ( rom_txdc_cal_v70 = 0x4000bdc0 );
|
||||
PROVIDE ( rom_txiq_cover = 0x4000c1ac );
|
||||
PROVIDE ( rom_txiq_get_mis_pwr = 0x4000c0f8 );
|
||||
PROVIDE ( rom_txiq_set_reg = 0x4000bf64 );
|
||||
PROVIDE ( rom_tx_paon_set = 0x40009db8 );
|
||||
PROVIDE ( rom_tx_pwr_backoff = 0x4000ceb8 );
|
||||
PROVIDE ( rom_txtone_linear_pwr = 0x4000c0b0 );
|
||||
PROVIDE ( rom_usb_dev = 0x3ffffb9c ); /* static "usb_dev" */
|
||||
PROVIDE ( rom_usb_dev_end = 0x3ffffc78 ); /* end of "usb_dev" */
|
||||
PROVIDE ( rom_usb_dw_ctrl = 0x3ffffa74 ); /* static "usb_dw_ctrl" */
|
||||
PROVIDE ( rom_usb_dw_ctrl_end = 0x3ffffb9c ); /* end of "usb_dw_ctrl" */
|
||||
PROVIDE ( rom_usb_curr_desc = 0x3ffffa54 ); /* static "s_curr_descr" */
|
||||
PROVIDE ( rom_wait_rfpll_cal_end = 0x4000af3c );
|
||||
PROVIDE ( rom_wifi_11g_rate_chg = 0x4000d260 );
|
||||
PROVIDE ( rom_wifi_rifs_mode_en = 0x40009d2c );
|
||||
PROVIDE ( rom_write_dac_gain2 = 0x4000a210 );
|
||||
PROVIDE ( rom_write_gain_mem = 0x400094bc );
|
||||
PROVIDE ( rom_write_pll_cap_mem = 0x4000ba58 );
|
||||
PROVIDE ( rom_write_rfpll_sdm = 0x4000aed4 );
|
||||
PROVIDE ( rom_wr_rf_freq_mem = 0x4000b2f0 );
|
||||
PROVIDE ( roundup2 = 0x4001bcd0 );
|
||||
PROVIDE ( rtc_boot_control = 0x4001002c );
|
||||
PROVIDE ( rtc_get_reset_reason = 0x4000ff58 );
|
||||
PROVIDE ( rtc_get_wakeup_cause = 0x4000ff7c );
|
||||
PROVIDE ( rtc_select_apb_bridge = 0x400100a0 );
|
||||
PROVIDE ( s_cdcacm_old_rts = 0x3ffffd34 );
|
||||
PROVIDE ( SelectSpiFunction = 0x40015d08 );
|
||||
PROVIDE ( SelectSpiQIO = 0x40015b88 );
|
||||
PROVIDE ( SendMsg = 0x40012d0c );
|
||||
PROVIDE ( send_packet = 0x40012cc8 );
|
||||
PROVIDE ( set_rtc_memory_crc = 0x40010010 );
|
||||
PROVIDE ( SetSpiDrvs = 0x40015c18 );
|
||||
PROVIDE ( sig_matrix = 0x3ffffd57 );
|
||||
PROVIDE ( software_reset = 0x40010068 );
|
||||
PROVIDE ( software_reset_cpu = 0x40010080 );
|
||||
PROVIDE ( SPI_block_erase = 0x4001623c );
|
||||
PROVIDE ( spi_cache_mode_switch = 0x40016a00 );
|
||||
PROVIDE ( SPI_chip_erase = 0x400161b8 );
|
||||
PROVIDE ( SPIClkConfig = 0x400170a0 );
|
||||
PROVIDE ( SPI_Common_Command = 0x400162e8 );
|
||||
PROVIDE ( spi_common_set_flash_cs_timing = 0x40016c0c );
|
||||
PROVIDE ( spi_dummy_len_fix = 0x40015b50 );
|
||||
PROVIDE ( SPI_Encrypt_Write = 0x400177e0 );
|
||||
PROVIDE ( SPI_Encrypt_Write_Dest = 0x400176cc );
|
||||
PROVIDE ( SPIEraseArea = 0x40017470 );
|
||||
PROVIDE ( SPIEraseBlock = 0x4001710c );
|
||||
PROVIDE ( SPIEraseChip = 0x400170ec );
|
||||
PROVIDE ( SPIEraseSector = 0x4001716c );
|
||||
PROVIDE ( esp_rom_spiflash_attach = 0x40017004 );
|
||||
PROVIDE ( spi_flash_boot_attach = 0x40016fc0 );
|
||||
PROVIDE ( spi_flash_check_suspend_cb = 0x3ffffd58 );
|
||||
PROVIDE ( SPI_flashchip_data = 0x3ffffd3c );
|
||||
PROVIDE ( spi_flash_set_check_suspend_cb = 0x40015b3c );
|
||||
PROVIDE ( SPI_init = 0x40016ce8 );
|
||||
PROVIDE ( SPILock = 0x40016ed4 );
|
||||
PROVIDE ( SPIMasterReadModeCnfig = 0x40017014 );
|
||||
PROVIDE ( SPI_page_program = 0x400165a8 );
|
||||
PROVIDE ( SPIParamCfg = 0x40017500 );
|
||||
PROVIDE ( SPIRead = 0x4001728c );
|
||||
PROVIDE ( SPI_read_data = 0x40015ed8 );
|
||||
PROVIDE ( SPIReadModeCnfig = 0x40016f1c );
|
||||
PROVIDE ( SPI_read_status = 0x40016084 );
|
||||
PROVIDE ( SPI_read_status_high = 0x40016284 );
|
||||
PROVIDE ( SPI_sector_erase = 0x400161ec );
|
||||
PROVIDE ( spi_slave_download = 0x4001998c );
|
||||
PROVIDE ( spi_slave_rom_check_conn = 0x40019724 );
|
||||
PROVIDE ( spi_slave_rom_init = 0x40019774 );
|
||||
PROVIDE ( spi_slave_rom_init_hw = 0x40019b5c );
|
||||
PROVIDE ( spi_slave_rom_intr_enable = 0x40019b3c );
|
||||
PROVIDE ( spi_slave_rom_rxdma_load = 0x40019da8 );
|
||||
PROVIDE ( spi_slave_rom_txdma_load = 0x40019e3c );
|
||||
PROVIDE ( SPIUnlock = 0x40016e88 );
|
||||
PROVIDE ( SPI_user_command_read = 0x40015fc8 );
|
||||
PROVIDE ( SPI_Wait_Idle = 0x40016680 );
|
||||
PROVIDE ( SPI_WakeUp = 0x400160f4 );
|
||||
PROVIDE ( SPIWrite = 0x400171cc );
|
||||
PROVIDE ( SPI_write_enable = 0x4001655c );
|
||||
PROVIDE ( SPI_Write_Encrypt_Disable = 0x40017694 );
|
||||
PROVIDE ( SPI_Write_Encrypt_Enable = 0x40017678 );
|
||||
PROVIDE ( SPI_write_status = 0x400162a4 );
|
||||
PROVIDE ( __stack = 0x3fffe710 );
|
||||
PROVIDE ( _stack_sentry = 0x3fffc410 );
|
||||
PROVIDE ( _start = 0x4000726c );
|
||||
PROVIDE ( _stext = 0x40007118 );
|
||||
PROVIDE ( string0_descr = 0x3ffaeeae );
|
||||
PROVIDE ( str_manu_descr = 0x3ffaee9a );
|
||||
PROVIDE ( str_prod_descr = 0x3ffaee88 );
|
||||
PROVIDE ( str_serial_descr = 0x3ffaee84 );
|
||||
PROVIDE ( rom_usb_osglue = 0x3ffffcdc );
|
||||
PROVIDE ( _SyscallException = 0x4000732a );
|
||||
PROVIDE ( syscall_table_ptr_pro = 0x3ffffd78 );
|
||||
PROVIDE ( tdefl_compress = 0x400041dc );
|
||||
PROVIDE ( tdefl_compress_buffer = 0x40004938 );
|
||||
PROVIDE ( tdefl_compress_mem_to_mem = 0x40004a50 );
|
||||
PROVIDE ( tdefl_compress_mem_to_output = 0x40004a30 );
|
||||
PROVIDE ( tdefl_get_adler32 = 0x40004a28 );
|
||||
PROVIDE ( tdefl_get_prev_return_status = 0x40004a20 );
|
||||
PROVIDE ( tdefl_init = 0x40004954 );
|
||||
PROVIDE ( tdefl_write_image_to_png_file_in_memory = 0x40004a64 );
|
||||
PROVIDE ( tdefl_write_image_to_png_file_in_memory_ex = 0x40004a58 );
|
||||
PROVIDE ( _text_end = 0x4001bed0 );
|
||||
PROVIDE ( _text_start = 0x40007118 );
|
||||
PROVIDE ( tinfl_decompress = 0x40003000 );
|
||||
PROVIDE ( tinfl_decompress_mem_to_callback = 0x400041a8 );
|
||||
PROVIDE ( tinfl_decompress_mem_to_mem = 0x40004168 );
|
||||
PROVIDE ( uart_acm_dev = 0x3ffffcf8 );
|
||||
PROVIDE ( uartAttach = 0x40012890 );
|
||||
PROVIDE ( uart_baudrate_detect = 0x400128f0 );
|
||||
PROVIDE ( uart_buff_switch = 0x40012d64 );
|
||||
PROVIDE ( UartConnCheck = 0x40011ab4 );
|
||||
PROVIDE ( UartConnectProc = 0x40011da8 );
|
||||
PROVIDE ( UartDev = 0x3ffffcfc );
|
||||
PROVIDE ( uart_div_modify = 0x40012984 );
|
||||
PROVIDE ( uart_div_reinit = 0x400129d0 );
|
||||
PROVIDE ( UartDwnLdProc = 0x400121ac );
|
||||
PROVIDE ( UartGetCmdLn = 0x40012f28 );
|
||||
PROVIDE ( Uart_Init = 0x40012a04 );
|
||||
PROVIDE ( Uart_Init_USB = 0x40012818 );
|
||||
PROVIDE ( UartRegReadProc = 0x40011df8 );
|
||||
PROVIDE ( UartRegWriteProc = 0x40011db8 );
|
||||
PROVIDE ( uart_rx_intr_handler = 0x40012690 );
|
||||
PROVIDE ( uart_rx_one_char = 0x40012bf0 );
|
||||
PROVIDE ( uart_rx_one_char_block = 0x40012b9c );
|
||||
PROVIDE ( uart_rx_readbuff = 0x40012d1c );
|
||||
PROVIDE ( UartRxString = 0x40012c84 );
|
||||
PROVIDE ( UartSecureDwnLdProc = 0x40012464 );
|
||||
PROVIDE ( UartSetBaudProc = 0x40011e54 );
|
||||
PROVIDE ( UartSpiAttachProc = 0x40011e0c );
|
||||
PROVIDE ( UartSpiReadProc = 0x40011e28 );
|
||||
PROVIDE ( uart_tx_flush = 0x40012b40 );
|
||||
PROVIDE ( uart_tx_one_char = 0x40012b10 );
|
||||
PROVIDE ( uart_tx_one_char2 = 0x40012b28 );
|
||||
PROVIDE ( uart_tx_switch = 0x400128e4 );
|
||||
PROVIDE ( uart_tx_wait_idle = 0x40012b6c );
|
||||
PROVIDE ( uart_usb_enable_reset_on_rts = 0x40012858 );
|
||||
PROVIDE ( Uart_USB_Send_Testament = 0x400127d8 );
|
||||
PROVIDE ( usb_cancel_transfer = 0x40015200 );
|
||||
PROVIDE ( usb_data_stuff = 0x3ffacc88 );
|
||||
PROVIDE ( usb_dc_attach = 0x40013ecc );
|
||||
PROVIDE ( usb_dc_check_poll_for_interrupts = 0x40014980 );
|
||||
PROVIDE ( usb_dc_detach = 0x40014010 );
|
||||
PROVIDE ( usb_dc_ep_check_cap = 0x40014094 );
|
||||
PROVIDE ( usb_dc_ep_clear_stall = 0x400142f0 );
|
||||
PROVIDE ( usb_dc_ep_configure = 0x400140d8 );
|
||||
PROVIDE ( usb_dc_ep_disable = 0x400144ec );
|
||||
PROVIDE ( usb_dc_ep_enable = 0x4001442c );
|
||||
PROVIDE ( usb_dc_ep_flush = 0x400145b8 );
|
||||
PROVIDE ( usb_dc_ep_halt = 0x4001435c );
|
||||
PROVIDE ( usb_dc_ep_is_stalled = 0x400143bc );
|
||||
PROVIDE ( usb_dc_ep_mps = 0x40014958 );
|
||||
PROVIDE ( usb_dc_ep_read = 0x400148d8 );
|
||||
PROVIDE ( usb_dc_ep_read_continue = 0x40014898 );
|
||||
PROVIDE ( usb_dc_ep_read_wait = 0x400147bc );
|
||||
PROVIDE ( usb_dc_ep_set_callback = 0x40014910 );
|
||||
PROVIDE ( usb_dc_ep_set_stall = 0x40014290 );
|
||||
PROVIDE ( usb_dc_ep_write = 0x40014684 );
|
||||
PROVIDE ( usb_dc_ep_write_would_block = 0x40014624 );
|
||||
PROVIDE ( usb_dc_prepare_persist = 0x40013bec );
|
||||
PROVIDE ( usb_dc_reset = 0x40014044 );
|
||||
PROVIDE ( usb_dc_set_address = 0x4001405c );
|
||||
PROVIDE ( usb_dc_set_status_callback = 0x4001494c );
|
||||
PROVIDE ( usb_deconfig = 0x40014fa8 );
|
||||
PROVIDE ( usb_dev_get_configuration = 0x40014f4c );
|
||||
PROVIDE ( usb_dev_resume = 0x40014f38 );
|
||||
PROVIDE ( usb_dfu_force_detach = 0x400155b0 );
|
||||
PROVIDE ( usb_dfu_init = 0x40015598 );
|
||||
PROVIDE ( usb_dfu_set_detach_cb = 0x400152dc );
|
||||
PROVIDE ( usb_disable = 0x40015058 );
|
||||
PROVIDE ( usb_dw_isr_handler = 0x40013c48 );
|
||||
PROVIDE ( usb_enable = 0x40014fc8 );
|
||||
PROVIDE ( usb_ep_clear_stall = 0x400150c8 );
|
||||
PROVIDE ( usb_ep_read_continue = 0x400150f0 );
|
||||
PROVIDE ( usb_ep_read_wait = 0x400150d8 );
|
||||
PROVIDE ( usb_ep_set_stall = 0x400150b8 );
|
||||
PROVIDE ( usb_get_descriptor = 0x400149c0 );
|
||||
PROVIDE ( usb_read = 0x400150a0 );
|
||||
PROVIDE ( usb_set_config = 0x40014f64 );
|
||||
PROVIDE ( usb_set_current_descriptor = 0x400149a8 );
|
||||
PROVIDE ( usb_transfer = 0x40015150 );
|
||||
PROVIDE ( usb_transfer_ep_callback = 0x40015100 );
|
||||
PROVIDE ( usb_transfer_sync = 0x40015250 );
|
||||
PROVIDE ( usb_write = 0x40015088 );
|
||||
PROVIDE ( usb_write_would_block = 0x40015078 );
|
||||
PROVIDE ( user_code_start = 0x3fffe714 );
|
||||
PROVIDE ( _UserExceptionVector = 0x40000340 );
|
||||
PROVIDE ( _UserExceptionVector_text_end = 0x40000357 );
|
||||
PROVIDE ( _UserExceptionVector_text_start = 0x40000340 );
|
||||
PROVIDE ( VerifyFlashMd5Proc = 0x40012004 );
|
||||
PROVIDE ( Wait_SPI_Idle = 0x40016188 );
|
||||
PROVIDE ( _WindowOverflow12 = 0x40000100 );
|
||||
PROVIDE ( _WindowOverflow4 = 0x40000000 );
|
||||
PROVIDE ( _WindowOverflow8 = 0x40000080 );
|
||||
PROVIDE ( _WindowUnderflow12 = 0x40000140 );
|
||||
PROVIDE ( _WindowUnderflow4 = 0x40000040 );
|
||||
PROVIDE ( _WindowUnderflow8 = 0x400000c0 );
|
||||
PROVIDE ( _WindowVectors_text_end = 0x40000170 );
|
||||
PROVIDE ( _WindowVectors_text_start = 0x40000000 );
|
||||
PROVIDE ( __XT_EXCEPTION_DESCS__ = 0x3ffaff2c );
|
||||
PROVIDE ( __XT_EXCEPTION_DESCS_END__ = 0x3ffaff2c );
|
||||
PROVIDE ( __XT_EXCEPTION_TABLE__ = 0x3ffafe3a );
|
||||
PROVIDE ( xthal_bcopy = 0x4001a918 );
|
||||
PROVIDE ( xthal_copy123 = 0x4001a9ac );
|
||||
PROVIDE ( xthal_get_ccompare = 0x4001aabc );
|
||||
PROVIDE ( xthal_get_ccount = 0x4001aa90 );
|
||||
PROVIDE ( xthal_get_interrupt = 0x4001aadc );
|
||||
PROVIDE ( Xthal_intlevel = 0x3ffaf06c );
|
||||
PROVIDE ( xthal_memcpy = 0x4001a93c );
|
||||
PROVIDE ( xthal_set_ccompare = 0x4001aa98 );
|
||||
PROVIDE ( xthal_set_intclear = 0x4001aae4 );
|
||||
PROVIDE ( xthals_hw_configid0 = 0xc2ecfafe );
|
||||
PROVIDE ( xthals_hw_configid1 = 0x224787b1 );
|
||||
PROVIDE ( xthals_release_major = 0x00002ee0 );
|
||||
PROVIDE ( xthals_release_minor = 0x00000009 );
|
||||
PROVIDE ( _xtos_alloca_handler = 0x40000010 );
|
||||
PROVIDE ( xtos_cause3_handler = 0x40007370 );
|
||||
PROVIDE ( xtos_c_handler_table = 0x3fffec78 );
|
||||
PROVIDE ( xtos_c_wrapper_handler = 0x40007380 );
|
||||
PROVIDE ( _xtos_enabled = 0x3fffed80 );
|
||||
PROVIDE ( xtos_exc_handler_table = 0x3fffeb78 );
|
||||
PROVIDE ( xtos_interrupt_mask_table = 0x3fffee88 );
|
||||
PROVIDE ( xtos_interrupt_table = 0x3fffed88 );
|
||||
PROVIDE ( _xtos_ints_off = 0x4001a3e0 );
|
||||
PROVIDE ( _xtos_ints_on = 0x4001a3bc );
|
||||
PROVIDE ( _xtos_intstruct = 0x3fffed80 );
|
||||
PROVIDE ( _xtos_l1int_handler = 0x400073ec );
|
||||
PROVIDE ( xtos_p_none = 0x4001a8a0 );
|
||||
PROVIDE ( _xtos_restore_intlevel = 0x400074cc );
|
||||
PROVIDE ( _xtos_return_from_exc = 0x4001a8a8 );
|
||||
PROVIDE ( _xtos_set_exception_handler = 0x400072b4 );
|
||||
PROVIDE ( _xtos_set_interrupt_handler = 0x4001a380 );
|
||||
PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4001a344 );
|
||||
PROVIDE ( _xtos_set_intlevel = 0x4001a8c0 );
|
||||
PROVIDE ( _xtos_set_min_intlevel = 0x4001a8dc );
|
||||
PROVIDE ( _xtos_set_vpri = 0x400074d8 );
|
||||
PROVIDE ( _xtos_syscall_handler = 0x400072fc );
|
||||
PROVIDE ( xtos_unhandled_exception = 0x4001a900 );
|
||||
PROVIDE ( xtos_unhandled_interrupt = 0x4001a910 );
|
||||
PROVIDE ( _xtos_vectors_ref_ = 0x00000000 );
|
||||
PROVIDE ( _xtos_vpri_enabled = 0x3fffed84 );
|
99
esp-hal/ld/esp32s2/rom/esp32s2.rom.libgcc.ld
Normal file
99
esp-hal/ld/esp32s2/rom/esp32s2.rom.libgcc.ld
Normal file
@ -0,0 +1,99 @@
|
||||
/**
|
||||
* Unlike other ROM functions which are exported using PROVIDE, which declares weak symbols,
|
||||
* these libgcc functions are exported using assignment, which declare strong symbols.
|
||||
* This is done so that ROM functions are always used instead of the ones provided by libgcc.a.
|
||||
*/
|
||||
|
||||
__absvdi2 = 0x40005ad8;
|
||||
__absvsi2 = 0x40005ac4;
|
||||
__adddf3 = 0x40008660;
|
||||
__addsf3 = 0x400081b8;
|
||||
__addvdi3 = 0x40008d90;
|
||||
__addvsi3 = 0x40008d6c;
|
||||
__ashldi3 = 0x4001b000;
|
||||
__ashrdi3 = 0x4001b018;
|
||||
__bswapdi2 = 0x40006d34;
|
||||
__bswapsi2 = 0x40006d0c;
|
||||
__clear_cache = 0x40005abc;
|
||||
__clrsbdi2 = 0x40006da8;
|
||||
__clrsbsi2 = 0x40006d90;
|
||||
__clzdi2 = 0x4001b238;
|
||||
__clzsi2 = 0x4001afd0;
|
||||
__cmpdi2 = 0x40005a7c;
|
||||
__ctzdi2 = 0x4001b24c;
|
||||
__ctzsi2 = 0x4001afd8;
|
||||
__divdc3 = 0x40006854;
|
||||
__divdf3 = 0x40008a24;
|
||||
__divdi3 = 0x4001b26c;
|
||||
__divsc3 = 0x40006544;
|
||||
__divsf3 = 0x4000841c;
|
||||
__divsi3 = 0x4001afa0;
|
||||
__eqdf2 = 0x40005904;
|
||||
__eqsf2 = 0x400055d0;
|
||||
__extendsfdf2 = 0x40008d08;
|
||||
__ffsdi2 = 0x4001b214;
|
||||
__ffssi2 = 0x4001afec;
|
||||
__fixdfdi = 0x40008b98;
|
||||
__fixdfsi = 0x40008b4c;
|
||||
__fixsfdi = 0x4000851c;
|
||||
__fixsfsi = 0x400084dc;
|
||||
__fixunsdfsi = 0x40008c04;
|
||||
__fixunssfdi = 0x400085d4;
|
||||
__fixunssfsi = 0x4000857c;
|
||||
__floatdidf = 0x4001b170;
|
||||
__floatdisf = 0x4001b0a8;
|
||||
__floatsidf = 0x4001b12c;
|
||||
__floatsisf = 0x4001b058;
|
||||
__floatundidf = 0x4001b160;
|
||||
__floatundisf = 0x4001b098;
|
||||
__floatunsidf = 0x4001b120;
|
||||
__floatunsisf = 0x4001b04c;
|
||||
__gcc_bcmp = 0x40006de0;
|
||||
__gedf2 = 0x400059c4;
|
||||
__gesf2 = 0x40005668;
|
||||
__gtdf2 = 0x40005938;
|
||||
__gtsf2 = 0x400055fc;
|
||||
__ledf2 = 0x40005960;
|
||||
__lesf2 = 0x4000561c;
|
||||
__lshrdi3 = 0x4001b034;
|
||||
__ltdf2 = 0x400059ec;
|
||||
__ltsf2 = 0x40005688;
|
||||
__moddi3 = 0x4001b534;
|
||||
__modsi3 = 0x4001afa8;
|
||||
__muldc3 = 0x40005f0c;
|
||||
__muldf3 = 0x400057e8;
|
||||
__muldi3 = 0x4001b1e4;
|
||||
__mulsc3 = 0x40005ba4;
|
||||
__mulsf3 = 0x40005524;
|
||||
__mulsi3 = 0x4001af98;
|
||||
__mulvdi3 = 0x40008e50;
|
||||
__mulvsi3 = 0x40008e38;
|
||||
__nedf2 = 0x40005904;
|
||||
__negdf2 = 0x400056fc;
|
||||
__negdi2 = 0x4001b1fc;
|
||||
__negsf2 = 0x40008190;
|
||||
__negvdi2 = 0x40008f6c;
|
||||
__negvsi2 = 0x40008f4c;
|
||||
__nesf2 = 0x400055d0;
|
||||
__nsau_data = 0x3ffac870;
|
||||
__paritysi2 = 0x40009038;
|
||||
__popcountdi2 = 0x40008fe0;
|
||||
__popcountsi2 = 0x40008fa8;
|
||||
__popcount_tab = 0x3ffac870;
|
||||
__powidf2 = 0x40005b40;
|
||||
__powisf2 = 0x40005af8;
|
||||
__subdf3 = 0x400087b4;
|
||||
__subsf3 = 0x400082a0;
|
||||
__subvdi3 = 0x40008df4;
|
||||
__subvsi3 = 0x40008dd0;
|
||||
__truncdfsf2 = 0x40008c64;
|
||||
__ucmpdi2 = 0x40005a9c;
|
||||
__udivdi3 = 0x4001b7dc;
|
||||
__udivmoddi4 = 0x40006e20;
|
||||
__udivsi3 = 0x4001afb0;
|
||||
__udiv_w_sdiv = 0x40006e18;
|
||||
__umoddi3 = 0x4001ba60;
|
||||
__umodsi3 = 0x4001afb8;
|
||||
__umulsidi3 = 0x4001afc0;
|
||||
__unorddf2 = 0x40005a50;
|
||||
__unordsf2 = 0x400056d4;
|
31
esp-hal/ld/esp32s2/rom/esp32s2.rom.spiflash_legacy.ld
Normal file
31
esp-hal/ld/esp32s2/rom/esp32s2.rom.spiflash_legacy.ld
Normal file
@ -0,0 +1,31 @@
|
||||
/*
|
||||
* SPDX-FileCopyrightText: 2024 Espressif Systems (Shanghai) CO LTD
|
||||
*
|
||||
* SPDX-License-Identifier: Apache-2.0
|
||||
*/
|
||||
/**
|
||||
* SPI flash driver function, compatibility names.
|
||||
*/
|
||||
|
||||
PROVIDE ( g_rom_spiflash_dummy_len_plus = dummy_len_plus);
|
||||
PROVIDE ( g_ticks_per_us_pro = g_ticks_per_us );
|
||||
PROVIDE ( g_rom_flashchip = SPI_flashchip_data );
|
||||
PROVIDE ( g_rom_spiflash_chip = SPI_flashchip_data );
|
||||
PROVIDE ( esp_rom_spiflash_config_param = SPIParamCfg );
|
||||
PROVIDE ( esp_rom_spiflash_read = SPIRead );
|
||||
PROVIDE ( esp_rom_spiflash_read_status = SPI_read_status );
|
||||
PROVIDE ( esp_rom_spiflash_read_statushigh = SPI_read_status_high );
|
||||
PROVIDE ( esp_rom_spiflash_read_user_cmd = SPI_user_command_read );
|
||||
PROVIDE ( esp_rom_spiflash_write = SPIWrite );
|
||||
PROVIDE ( esp_rom_spiflash_write_encrypted_disable = SPI_Write_Encrypt_Disable );
|
||||
PROVIDE ( esp_rom_spiflash_write_encrypted_enable = SPI_Write_Encrypt_Enable );
|
||||
PROVIDE ( esp_rom_spiflash_config_clk = SPIClkConfig );
|
||||
PROVIDE ( esp_rom_spiflash_select_qio_pins = SelectSpiQIO );
|
||||
PROVIDE ( esp_rom_spiflash_unlock = SPIUnlock );
|
||||
PROVIDE ( esp_rom_spiflash_erase_sector = SPIEraseSector );
|
||||
PROVIDE ( esp_rom_spiflash_erase_block = SPIEraseBlock );
|
||||
PROVIDE ( esp_rom_spiflash_wait_idle = SPI_Wait_Idle );
|
||||
PROVIDE ( esp_rom_spiflash_config_readmode = SPIReadModeCnfig );
|
||||
PROVIDE ( esp_rom_spiflash_erase_block = SPIEraseBlock );
|
||||
PROVIDE ( esp_rom_spiflash_write_encrypted = SPI_Encrypt_Write );
|
||||
PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
|
@ -1,47 +1,6 @@
|
||||
PROVIDE(ets_delay_us = 0x40000600);
|
||||
PROVIDE(ets_update_cpu_frequency_rom = 0x40001a4c);
|
||||
PROVIDE(rom_i2c_writeReg = 0x40005d60);
|
||||
PROVIDE(rom_i2c_writeReg_Mask = 0x40005d6c);
|
||||
PROVIDE(rtc_get_reset_reason = 0x4000057c);
|
||||
PROVIDE(rom_config_instruction_cache_mode = 0x40001a1c);
|
||||
PROVIDE(software_reset = 0x400006d8);
|
||||
PROVIDE(software_reset_cpu = 0x400006e4);
|
||||
PROVIDE(cache_dbus_mmu_set = 0x400019b0);
|
||||
PROVIDE(ets_efuse_get_spiconfig = 0x40001f74);
|
||||
PROVIDE(esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig);
|
||||
PROVIDE(esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad);
|
||||
PROVIDE(esp_rom_spiflash_select_qio_pins = 0x40000a68 );
|
||||
PROVIDE(esp_rom_spi_set_op_mode = 0x400008a0 );
|
||||
PROVIDE(esp_rom_spi_cmd_start = 0x40000888);
|
||||
PROVIDE(esp_rom_spi_cmd_config = 0x4000087c);
|
||||
PROVIDE(Cache_Get_DCache_Line_Size = 0x40001608 );
|
||||
PROVIDE(Cache_Invalidate_Addr = 0x400016b0 );
|
||||
PROVIDE(Cache_Suspend_DCache = 0x400018b4 );
|
||||
PROVIDE(Cache_Resume_DCache = 0x400018c0 );
|
||||
PROVIDE(Cache_Suspend_DCache_Autoload = 0x40001734 );
|
||||
PROVIDE(Cache_Resume_DCache_Autoload = 0x40001740 );
|
||||
PROVIDE(Cache_WriteBack_Addr = 0x400016c8 );
|
||||
PROVIDE(rom_config_data_cache_mode = 0x40001a28 );
|
||||
PROVIDE(rom_config_instruction_cache_mode = 0x40001a1c );
|
||||
PROVIDE(ets_efuse_get_wp_pad = 0x40001fa4);
|
||||
PROVIDE(ets_set_appcpu_boot_addr = 0x40000720);
|
||||
INCLUDE "rom/esp32s3.rom.api.ld"
|
||||
INCLUDE "rom/esp32s3.rom.ld"
|
||||
INCLUDE "rom/esp32s3.rom.libgcc.ld"
|
||||
INCLUDE "rom/esp32s3.rom.version.ld"
|
||||
|
||||
PROVIDE(esp_rom_crc32_be = 0x40001ca4);
|
||||
PROVIDE(esp_rom_crc16_be = 0x40001cbc);
|
||||
PROVIDE(esp_rom_crc8_be = 0x40001cd4);
|
||||
PROVIDE(esp_rom_crc32_le = 0x40001c98);
|
||||
PROVIDE(esp_rom_crc16_le = 0x40001cb0);
|
||||
PROVIDE(esp_rom_crc8_le = 0x40001cc8);
|
||||
|
||||
PROVIDE(esp_rom_md5_init = 0x40001c5c);
|
||||
PROVIDE(esp_rom_md5_update = 0x40001c68);
|
||||
PROVIDE(esp_rom_md5_final = 0x40001c74);
|
||||
|
||||
PROVIDE (esp_rom_opiflash_exec_cmd = 0x400008b8);
|
||||
PROVIDE( esp_rom_spi_set_dtr_swap_mode = 0x4000093c );
|
||||
PROVIDE( esp_rom_opiflash_pin_config = 0x40000894 );
|
||||
|
||||
memset = 0x400011e8;
|
||||
memcpy = 0x400011f4;
|
||||
memmove = 0x40001200;
|
||||
memcmp = 0x4000120c;
|
||||
INCLUDE "rom/additional.ld"
|
||||
|
14
esp-hal/ld/esp32s3/rom/additional.ld
Normal file
14
esp-hal/ld/esp32s3/rom/additional.ld
Normal file
@ -0,0 +1,14 @@
|
||||
memset = 0x400011e8;
|
||||
memcpy = 0x400011f4;
|
||||
memmove = 0x40001200;
|
||||
memcmp = 0x4000120c;
|
||||
|
||||
strcpy = 0x40001218;
|
||||
strncpy = 0x40001224;
|
||||
strncmp = 0x4000123c;
|
||||
|
||||
bzero = 0x40001260;
|
||||
|
||||
PROVIDE(cache_dbus_mmu_set = 0x400019b0);
|
||||
PROVIDE( Cache_Suspend_DCache_Autoload = 0x40001734 );
|
||||
PROVIDE( Cache_Suspend_DCache = 0x400018b4 );
|
69
esp-hal/ld/esp32s3/rom/esp32s3.rom.api.ld
Normal file
69
esp-hal/ld/esp32s3/rom/esp32s3.rom.api.ld
Normal file
@ -0,0 +1,69 @@
|
||||
/**
|
||||
* ROM APIs
|
||||
*/
|
||||
PROVIDE ( esp_rom_crc32_le = crc32_le );
|
||||
PROVIDE ( esp_rom_crc16_le = crc16_le );
|
||||
PROVIDE ( esp_rom_crc8_le = crc8_le );
|
||||
PROVIDE ( esp_rom_crc32_be = crc32_be );
|
||||
PROVIDE ( esp_rom_crc16_be = crc16_be );
|
||||
PROVIDE ( esp_rom_crc8_be = crc8_be );
|
||||
|
||||
PROVIDE ( esp_rom_gpio_pad_select_gpio = gpio_pad_select_gpio );
|
||||
PROVIDE ( esp_rom_gpio_pad_pullup_only = gpio_pad_pullup );
|
||||
PROVIDE ( esp_rom_gpio_pad_set_drv = gpio_pad_set_drv );
|
||||
PROVIDE ( esp_rom_gpio_pad_unhold = gpio_pad_unhold );
|
||||
PROVIDE ( esp_rom_gpio_connect_in_signal = gpio_matrix_in );
|
||||
PROVIDE ( esp_rom_gpio_connect_out_signal = gpio_matrix_out );
|
||||
|
||||
PROVIDE ( esp_rom_efuse_mac_address_crc8 = esp_crc8 );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_gpio_info = ets_efuse_get_spiconfig );
|
||||
PROVIDE ( esp_rom_efuse_get_flash_wp_gpio = ets_efuse_get_wp_pad );
|
||||
PROVIDE ( esp_rom_efuse_is_secure_boot_enabled = ets_efuse_secure_boot_enabled );
|
||||
|
||||
PROVIDE ( esp_rom_uart_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_uart_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_uart_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_uart_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_uart_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_uart_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_uart_usb_acm_init = Uart_Init_USB );
|
||||
PROVIDE ( esp_rom_uart_putc = ets_write_char_uart );
|
||||
|
||||
PROVIDE ( esp_rom_output_flush_tx = uart_tx_flush );
|
||||
PROVIDE ( esp_rom_output_tx_one_char = uart_tx_one_char );
|
||||
PROVIDE ( esp_rom_output_tx_wait_idle = uart_tx_wait_idle );
|
||||
PROVIDE ( esp_rom_output_rx_one_char = uart_rx_one_char );
|
||||
PROVIDE ( esp_rom_output_rx_string = UartRxString );
|
||||
PROVIDE ( esp_rom_output_set_as_console = uart_tx_switch );
|
||||
PROVIDE ( esp_rom_output_usb_acm_init = Uart_Init_USB );
|
||||
PROVIDE ( esp_rom_output_putc = ets_write_char_uart );
|
||||
|
||||
PROVIDE ( esp_rom_md5_init = MD5Init );
|
||||
PROVIDE ( esp_rom_md5_update = MD5Update );
|
||||
PROVIDE ( esp_rom_md5_final = MD5Final );
|
||||
|
||||
PROVIDE ( esp_rom_software_reset_system = software_reset );
|
||||
PROVIDE ( esp_rom_software_reset_cpu = software_reset_cpu );
|
||||
|
||||
PROVIDE ( esp_rom_printf = ets_printf );
|
||||
PROVIDE ( esp_rom_delay_us = ets_delay_us );
|
||||
PROVIDE ( esp_rom_install_uart_printf = ets_install_uart_printf );
|
||||
PROVIDE ( esp_rom_get_reset_reason = rtc_get_reset_reason );
|
||||
PROVIDE ( esp_rom_route_intr_matrix = intr_matrix_set );
|
||||
PROVIDE ( esp_rom_get_cpu_ticks_per_us = ets_get_cpu_frequency );
|
||||
PROVIDE ( esp_rom_set_cpu_ticks_per_us = ets_update_cpu_frequency );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_attach = spi_flash_attach );
|
||||
PROVIDE ( esp_rom_spiflash_clear_bp = esp_rom_spiflash_unlock );
|
||||
PROVIDE ( esp_rom_spiflash_write_enable = SPI_write_enable);
|
||||
PROVIDE ( esp_rom_spiflash_erase_area = SPIEraseArea );
|
||||
|
||||
PROVIDE ( esp_rom_spiflash_fix_dummylen = spi_dummy_len_fix );
|
||||
PROVIDE ( esp_rom_spiflash_set_drvs = SetSpiDrvs);
|
||||
PROVIDE ( esp_rom_spiflash_select_padsfunc = SelectSpiFunction );
|
||||
PROVIDE ( esp_rom_spiflash_common_cmd = SPI_Common_Command );
|
||||
|
||||
PROVIDE ( esp_rom_regi2c_read = rom_i2c_readReg );
|
||||
PROVIDE ( esp_rom_regi2c_read_mask = rom_i2c_readReg_Mask );
|
||||
PROVIDE ( esp_rom_regi2c_write = rom_i2c_writeReg );
|
||||
PROVIDE ( esp_rom_regi2c_write_mask = rom_i2c_writeReg_Mask );
|
2247
esp-hal/ld/esp32s3/rom/esp32s3.rom.ld
Normal file
2247
esp-hal/ld/esp32s3/rom/esp32s3.rom.ld
Normal file
File diff suppressed because it is too large
Load Diff
105
esp-hal/ld/esp32s3/rom/esp32s3.rom.libgcc.ld
Normal file
105
esp-hal/ld/esp32s3/rom/esp32s3.rom.libgcc.ld
Normal file
@ -0,0 +1,105 @@
|
||||
/* ROM function interface esp32s3.rom.libgcc.ld for esp32s3
|
||||
*
|
||||
*
|
||||
* Generated from ./interface-esp32s3.yml md5sum 39c4ce259b11323b9404c192b01b712b
|
||||
*
|
||||
* Compatible with ROM where ECO version equal or greater to 0.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
|
||||
/***************************************
|
||||
Group libgcc
|
||||
***************************************/
|
||||
|
||||
/* Functions */
|
||||
__absvdi2 = 0x4000216c;
|
||||
__absvsi2 = 0x40002178;
|
||||
__adddf3 = 0x40002184;
|
||||
__addsf3 = 0x40002190;
|
||||
__addvdi3 = 0x4000219c;
|
||||
__addvsi3 = 0x400021a8;
|
||||
__ashldi3 = 0x400021b4;
|
||||
__ashrdi3 = 0x400021c0;
|
||||
__bswapdi2 = 0x400021cc;
|
||||
__bswapsi2 = 0x400021d8;
|
||||
__clear_cache = 0x400021e4;
|
||||
__clrsbdi2 = 0x400021f0;
|
||||
__clrsbsi2 = 0x400021fc;
|
||||
__clzdi2 = 0x40002208;
|
||||
__clzsi2 = 0x40002214;
|
||||
__cmpdi2 = 0x40002220;
|
||||
__ctzdi2 = 0x4000222c;
|
||||
__ctzsi2 = 0x40002238;
|
||||
__divdc3 = 0x40002244;
|
||||
__divdf3 = 0x40002250;
|
||||
__divdi3 = 0x4000225c;
|
||||
__divsc3 = 0x40002268;
|
||||
__divsf3 = 0x40002274;
|
||||
__divsi3 = 0x40002280;
|
||||
__eqdf2 = 0x4000228c;
|
||||
__eqsf2 = 0x40002298;
|
||||
__extendsfdf2 = 0x400022a4;
|
||||
__ffsdi2 = 0x400022b0;
|
||||
__ffssi2 = 0x400022bc;
|
||||
__fixdfdi = 0x400022c8;
|
||||
__fixdfsi = 0x400022d4;
|
||||
__fixsfdi = 0x400022e0;
|
||||
__fixsfsi = 0x400022ec;
|
||||
__fixunsdfsi = 0x400022f8;
|
||||
__fixunssfdi = 0x40002304;
|
||||
__fixunssfsi = 0x40002310;
|
||||
__floatdidf = 0x4000231c;
|
||||
__floatdisf = 0x40002328;
|
||||
__floatsidf = 0x40002334;
|
||||
__floatsisf = 0x40002340;
|
||||
__floatundidf = 0x4000234c;
|
||||
__floatundisf = 0x40002358;
|
||||
__floatunsidf = 0x40002364;
|
||||
__floatunsisf = 0x40002370;
|
||||
__gcc_bcmp = 0x4000237c;
|
||||
__gedf2 = 0x40002388;
|
||||
__gesf2 = 0x40002394;
|
||||
__gtdf2 = 0x400023a0;
|
||||
__gtsf2 = 0x400023ac;
|
||||
__ledf2 = 0x400023b8;
|
||||
__lesf2 = 0x400023c4;
|
||||
__lshrdi3 = 0x400023d0;
|
||||
__ltdf2 = 0x400023dc;
|
||||
__ltsf2 = 0x400023e8;
|
||||
__moddi3 = 0x400023f4;
|
||||
__modsi3 = 0x40002400;
|
||||
__muldc3 = 0x4000240c;
|
||||
__muldf3 = 0x40002418;
|
||||
__muldi3 = 0x40002424;
|
||||
__mulsc3 = 0x40002430;
|
||||
__mulsf3 = 0x4000243c;
|
||||
__mulsi3 = 0x40002448;
|
||||
__mulvdi3 = 0x40002454;
|
||||
__mulvsi3 = 0x40002460;
|
||||
__nedf2 = 0x4000246c;
|
||||
__negdf2 = 0x40002478;
|
||||
__negdi2 = 0x40002484;
|
||||
__negsf2 = 0x40002490;
|
||||
__negvdi2 = 0x4000249c;
|
||||
__negvsi2 = 0x400024a8;
|
||||
__nesf2 = 0x400024b4;
|
||||
__paritysi2 = 0x400024c0;
|
||||
__popcountdi2 = 0x400024cc;
|
||||
__popcountsi2 = 0x400024d8;
|
||||
__powidf2 = 0x400024e4;
|
||||
__powisf2 = 0x400024f0;
|
||||
__subdf3 = 0x400024fc;
|
||||
__subsf3 = 0x40002508;
|
||||
__subvdi3 = 0x40002514;
|
||||
__subvsi3 = 0x40002520;
|
||||
__truncdfsf2 = 0x4000252c;
|
||||
__ucmpdi2 = 0x40002538;
|
||||
__udivdi3 = 0x40002544;
|
||||
__udivmoddi4 = 0x40002550;
|
||||
__udivsi3 = 0x4000255c;
|
||||
__udiv_w_sdiv = 0x40002568;
|
||||
__umoddi3 = 0x40002574;
|
||||
__umodsi3 = 0x40002580;
|
||||
__unorddf2 = 0x4000258c;
|
||||
__unordsf2 = 0x40002598;
|
8
esp-hal/ld/esp32s3/rom/esp32s3.rom.version.ld
Normal file
8
esp-hal/ld/esp32s3/rom/esp32s3.rom.version.ld
Normal file
@ -0,0 +1,8 @@
|
||||
/* ROM version variables for esp32s3
|
||||
*
|
||||
* These addresses should be compatible with any ROM version for this chip.
|
||||
*
|
||||
* THIS FILE WAS AUTOMATICALLY GENERATED. DO NOT EDIT.
|
||||
*/
|
||||
_rom_chip_id = 0x40000570;
|
||||
_rom_eco_version = 0x40000574;
|
@ -95,10 +95,10 @@ pub(crate) fn ets_delay_us(us: u32) {
|
||||
#[inline(always)]
|
||||
pub(crate) fn ets_update_cpu_frequency_rom(ticks_per_us: u32) {
|
||||
extern "C" {
|
||||
fn ets_update_cpu_frequency_rom(ticks_per_us: u32);
|
||||
fn ets_update_cpu_frequency(ticks_per_us: u32);
|
||||
}
|
||||
|
||||
unsafe { ets_update_cpu_frequency_rom(ticks_per_us) };
|
||||
unsafe { ets_update_cpu_frequency(ticks_per_us) };
|
||||
}
|
||||
|
||||
#[inline(always)]
|
||||
|
@ -169,13 +169,13 @@ pub extern "Rust" fn __init_data() -> bool {
|
||||
#[link_section = ".rwtext"]
|
||||
pub unsafe fn cache_writeback_addr(addr: u32, size: u32) {
|
||||
extern "C" {
|
||||
fn Cache_WriteBack_Addr(addr: u32, size: u32);
|
||||
fn rom_Cache_WriteBack_Addr(addr: u32, size: u32);
|
||||
fn Cache_Suspend_DCache_Autoload() -> u32;
|
||||
fn Cache_Resume_DCache_Autoload(value: u32);
|
||||
}
|
||||
// suspend autoload, avoid load cachelines being written back
|
||||
let autoload = Cache_Suspend_DCache_Autoload();
|
||||
Cache_WriteBack_Addr(addr, size);
|
||||
rom_Cache_WriteBack_Addr(addr, size);
|
||||
Cache_Resume_DCache_Autoload(autoload);
|
||||
}
|
||||
|
||||
|
@ -13,6 +13,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
|
||||
|
||||
### Changed
|
||||
|
||||
- No need to add `rom_functions.x` manually anymore (#2374)
|
||||
|
||||
### Fixed
|
||||
|
||||
### Removed
|
||||
|
@ -1 +1,12 @@
|
||||
# Migration Guide from 0.10.x to v0.11.x
|
||||
|
||||
## No need to include `rom_functions.x` manually
|
||||
|
||||
Don't include `rom_functions.x` from esp-wifi
|
||||
|
||||
```diff
|
||||
rustflags = [
|
||||
"-C", "link-arg=-Tlinkall.x",
|
||||
- "-C", "link-arg=-Trom_functions.x",
|
||||
]
|
||||
```
|
||||
|
@ -25,22 +25,6 @@
|
||||
//! features = ["esp32s3", "wifi", "esp-now"]
|
||||
//! ```
|
||||
//!
|
||||
//! ### Link configuration
|
||||
//!
|
||||
//! Make sure to include the rom functions for your target:
|
||||
//!
|
||||
//! ```toml
|
||||
//! # .cargo/config.toml
|
||||
//! rustflags = [
|
||||
//! "-C", "link-arg=-Tlinkall.x",
|
||||
//! "-C", "link-arg=-Trom_functions.x",
|
||||
//! ]
|
||||
//! ```
|
||||
//!
|
||||
//! At the time of writing, you will already have the `linkall` flag if you used
|
||||
//! `cargo generate`. Generating from a template does not include the
|
||||
//! `rom_functions` flag.
|
||||
//!
|
||||
//! ### Optimization Level
|
||||
//!
|
||||
//! It is necessary to build with optimization level 2 or 3 since otherwise, it
|
||||
|
@ -1,14 +1,4 @@
|
||||
fn main() {
|
||||
if cfg!(feature = "esp32c6") || cfg!(feature = "esp32h2") {
|
||||
println!("cargo::rustc-link-arg=-Trom_coexist.x");
|
||||
println!("cargo::rustc-link-arg=-Trom_functions.x");
|
||||
println!("cargo::rustc-link-arg=-Trom_phy.x");
|
||||
}
|
||||
|
||||
if cfg!(feature = "esp-wifi") {
|
||||
println!("cargo::rustc-link-arg=-Trom_functions.x");
|
||||
}
|
||||
|
||||
// Allow building examples in CI in debug mode
|
||||
println!("cargo:rustc-check-cfg=cfg(is_not_release)");
|
||||
println!("cargo:rerun-if-env-changed=CI");
|
||||
|
@ -37,9 +37,5 @@ fn main() -> Result<(), Box<dyn Error>> {
|
||||
// Define all necessary configuration symbols for the configured device:
|
||||
config.define_symbols();
|
||||
|
||||
if cfg!(feature = "esp-wifi") {
|
||||
println!("cargo::rustc-link-arg=-Trom_functions.x");
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
Loading…
x
Reference in New Issue
Block a user