From c6153fa06772d24239aadaaadc70c930f7d4299b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?D=C3=A1niel=20Buga?= <bugadani@gmail.com>
Date: Thu, 5 Jun 2025 13:55:51 +0200
Subject: [PATCH] Remove chip features from xtensa-lx-rt (#3598)

---
 esp-hal/Cargo.toml        |  3 ---
 xtask/src/lib.rs          |  1 -
 xtensa-lx-rt/CHANGELOG.md |  1 +
 xtensa-lx-rt/Cargo.toml   |  8 --------
 xtensa-lx-rt/build.rs     | 33 ++++++++++++++++++++++++---------
 5 files changed, 25 insertions(+), 21 deletions(-)

diff --git a/esp-hal/Cargo.toml b/esp-hal/Cargo.toml
index 17de40020..c62a96c41 100644
--- a/esp-hal/Cargo.toml
+++ b/esp-hal/Cargo.toml
@@ -124,7 +124,6 @@ __usb_otg = [
 esp32   = [
     "dep:esp32",
     "procmacros/rtc-slow",
-    "xtensa-lx-rt/esp32",
 ]
 # Target the ESP32-C2.
 esp32c2 = [
@@ -154,7 +153,6 @@ esp32s2 = [
     "portable-atomic/unsafe-assume-single-core",
     "procmacros/has-ulp-core",
     "procmacros/rtc-slow",
-    "xtensa-lx-rt/esp32s2",
     "__usb_otg",
 ]
 # Target the ESP32-S3.
@@ -162,7 +160,6 @@ esp32s3 = [
     "dep:esp32s3",
     "procmacros/has-ulp-core",
     "procmacros/rtc-slow",
-    "xtensa-lx-rt/esp32s3",
     "__usb_otg",
 ]
 
diff --git a/xtask/src/lib.rs b/xtask/src/lib.rs
index 433522392..fea6dae53 100644
--- a/xtask/src/lib.rs
+++ b/xtask/src/lib.rs
@@ -81,7 +81,6 @@ impl Package {
                 | EspPrintln
                 | EspStorage
                 | EspWifi
-                | XtensaLxRt
         )
     }
 
diff --git a/xtensa-lx-rt/CHANGELOG.md b/xtensa-lx-rt/CHANGELOG.md
index e4795a876..570eb879c 100644
--- a/xtensa-lx-rt/CHANGELOG.md
+++ b/xtensa-lx-rt/CHANGELOG.md
@@ -18,6 +18,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ### Removed
 
+- The `esp32`, `esp32s2` and `esp32s3` features have been removed. (#3598)
 
 ## [v0.19.0] - 2025-06-03
 
diff --git a/xtensa-lx-rt/Cargo.toml b/xtensa-lx-rt/Cargo.toml
index cc29dee4e..3736aaef5 100644
--- a/xtensa-lx-rt/Cargo.toml
+++ b/xtensa-lx-rt/Cargo.toml
@@ -35,13 +35,5 @@ toml            = "0.8.20"
 ## Save and restore float registers for exceptions
 float-save-restore = []
 
-#! ### Chip Support Feature Flags
-## Target the ESP32
-esp32   = []
-## Target the ESP32-S2
-esp32s2 = []
-## Target the ESP32-S3
-esp32s3 = []
-
 [lints.rust]
 unexpected_cfgs = "allow"
diff --git a/xtensa-lx-rt/build.rs b/xtensa-lx-rt/build.rs
index 008538079..94f753d0e 100644
--- a/xtensa-lx-rt/build.rs
+++ b/xtensa-lx-rt/build.rs
@@ -26,6 +26,14 @@ enum Chip {
     Esp32s3,
 }
 
+impl Chip {
+    const TARGET_TO_CHIP: &'static [(&'static str, Chip)] = &[
+        ("xtensa-esp32-none-elf", Chip::Esp32),
+        ("xtensa-esp32s2-none-elf", Chip::Esp32s2),
+        ("xtensa-esp32s3-none-elf", Chip::Esp32s3),
+    ];
+}
+
 /// The valid interrupt types declared in the `core-isa.h` headers
 #[derive(Debug, Clone, Copy, PartialEq, EnumString, Deserialize)]
 enum InterruptType {
@@ -97,15 +105,22 @@ fn handle_esp32() -> Result<()> {
             })
     }
 
-    let chip = match (
-        cfg!(feature = "esp32"),
-        cfg!(feature = "esp32s2"),
-        cfg!(feature = "esp32s3"),
-    ) {
-        (true, false, false) => Chip::Esp32,
-        (false, true, false) => Chip::Esp32s2,
-        (false, false, true) => Chip::Esp32s3,
-        _ => panic!("Either the esp32, esp32s2, esp32s3 feature must be enabled"),
+    // Based on the build target, determine which chip to use.
+    let target = std::env::var("TARGET");
+    let target = target.as_deref().unwrap_or("unspecified target");
+    let Some(chip) = Chip::TARGET_TO_CHIP
+        .iter()
+        .copied()
+        .find_map(|(t, chip)| (t == target).then_some(chip))
+    else {
+        panic!(
+            "Unsupported target: {target}. Expected one of: {}",
+            Chip::TARGET_TO_CHIP
+                .iter()
+                .map(|(t, _)| t.to_string())
+                .collect::<Vec<_>>()
+                .join(", ")
+        );
     };
 
     let isa_toml = fs::read_to_string(format!("config/{chip}.toml"))?;