diff --git a/esp-hal/src/debugger.rs b/esp-hal/src/debugger.rs index 94bdca385..c116efcf0 100644 --- a/esp-hal/src/debugger.rs +++ b/esp-hal/src/debugger.rs @@ -2,24 +2,19 @@ /// Checks if a debugger is connected. pub fn debugger_connected() -> bool { - #[cfg(xtensa)] - { - xtensa_lx::is_debugger_attached() - } - - #[cfg(riscv)] - { - crate::peripherals::ASSIST_DEBUG::regs() - .cpu(0) - .debug_mode() - .read() - .debug_module_active() - .bit_is_set() - } - - #[cfg(not(any(xtensa, riscv)))] - { - false + cfg_if::cfg_if! { + if #[cfg(xtensa)] { + xtensa_lx::is_debugger_attached() + } else if #[cfg(all(riscv, soc_has_assist_debug))] { + crate::peripherals::ASSIST_DEBUG::regs() + .cpu(0) + .debug_mode() + .read() + .debug_module_active() + .bit_is_set() + } else { + false + } } } diff --git a/esp-hal/src/gpio/mod.rs b/esp-hal/src/gpio/mod.rs index baafda636..776430415 100644 --- a/esp-hal/src/gpio/mod.rs +++ b/esp-hal/src/gpio/mod.rs @@ -55,7 +55,7 @@ crate::unstable_module! { pub mod interconnect; - #[cfg(soc_has_etm)] + #[cfg(etm)] pub mod etm; #[cfg(soc_has_lp_io)] diff --git a/esp-hal/src/lib.rs b/esp-hal/src/lib.rs index 2a77573f3..12e389715 100644 --- a/esp-hal/src/lib.rs +++ b/esp-hal/src/lib.rs @@ -332,7 +332,6 @@ mod exception_handler; unstable_module! { pub mod asynch; pub mod debugger; - #[cfg(any(soc_has_dport, soc_has_interrupt_core0, soc_has_interrupt_core1))] pub mod interrupt; pub mod rom; #[doc(hidden)] @@ -346,9 +345,9 @@ unstable_module! { pub mod rtc_cntl; #[cfg(any(gdma, pdma))] pub mod dma; - #[cfg(soc_has_etm)] + #[cfg(etm)] pub mod etm; - #[cfg(soc_has_usb0)] + #[cfg(usb_otg)] pub mod otg_fs; #[cfg(psram)] // DMA needs some things from here pub mod psram; @@ -358,34 +357,34 @@ unstable_module! { mod work_queue; unstable_driver! { - #[cfg(soc_has_aes)] + #[cfg(aes)] pub mod aes; - #[cfg(soc_has_assist_debug)] + #[cfg(assist_debug)] pub mod assist_debug; pub mod delay; - #[cfg(soc_has_ecc)] + #[cfg(ecc)] pub mod ecc; - #[cfg(soc_has_hmac)] + #[cfg(hmac)] pub mod hmac; - #[cfg(any(soc_has_i2s0, soc_has_i2s1))] + #[cfg(i2s)] pub mod i2s; #[cfg(soc_has_lcd_cam)] pub mod lcd_cam; - #[cfg(soc_has_ledc)] + #[cfg(ledc)] pub mod ledc; - #[cfg(any(soc_has_mcpwm0, soc_has_mcpwm1))] + #[cfg(mcpwm)] pub mod mcpwm; - #[cfg(soc_has_parl_io)] + #[cfg(parl_io)] pub mod parl_io; - #[cfg(soc_has_pcnt)] + #[cfg(pcnt)] pub mod pcnt; - #[cfg(soc_has_rmt)] + #[cfg(rmt)] pub mod rmt; - #[cfg(soc_has_rng)] + #[cfg(rng)] pub mod rng; - #[cfg(soc_has_rsa)] + #[cfg(rsa)] pub mod rsa; - #[cfg(soc_has_sha)] + #[cfg(sha)] pub mod sha; #[cfg(touch)] pub mod touch; @@ -393,9 +392,9 @@ unstable_driver! { pub mod trace; #[cfg(soc_has_tsens)] pub mod tsens; - #[cfg(any(soc_has_twai0, soc_has_twai1))] + #[cfg(twai)] pub mod twai; - #[cfg(soc_has_usb_device)] + #[cfg(usb_serial_jtag)] pub mod usb_serial_jtag; } @@ -740,10 +739,11 @@ pub fn init(config: Config) -> Peripherals { // RTC domain must be enabled before we try to disable let mut rtc = crate::rtc_cntl::Rtc::new(peripherals.LPWR.reborrow()); + #[cfg(sleep)] crate::rtc_cntl::sleep::RtcSleepConfig::base_settings(&rtc); // Disable watchdog timers - #[cfg(not(any(esp32, esp32s2)))] + #[cfg(swd)] rtc.swd.disable(); rtc.rwdt.disable(); @@ -756,6 +756,7 @@ pub fn init(config: Config) -> Peripherals { crate::time::implem::time_init(); + #[cfg(gpio)] crate::gpio::interrupt::bind_default_interrupt_handler(); #[cfg(feature = "psram")] diff --git a/esp-hal/src/time.rs b/esp-hal/src/time.rs index 9fc7d8b20..33dcc4f4f 100644 --- a/esp-hal/src/time.rs +++ b/esp-hal/src/time.rs @@ -762,7 +762,7 @@ pub(crate) mod implem { } } -#[cfg(soc_has_systimer)] +#[cfg(systimer)] pub(crate) mod implem { use super::Instant; use crate::timer::systimer::{SystemTimer, Unit}; diff --git a/esp-hal/src/timer/systimer.rs b/esp-hal/src/timer/systimer.rs index 0c58fdf3c..779c2a105 100644 --- a/esp-hal/src/timer/systimer.rs +++ b/esp-hal/src/timer/systimer.rs @@ -218,7 +218,7 @@ impl<'d> SystemTimer<'d> { // Don't reset Systimer as it will break `time::Instant::now`, only enable it PeripheralClockControl::enable(PeripheralEnable::Systimer); - #[cfg(soc_has_etm)] + #[cfg(etm)] etm::enable_etm(); Self { @@ -792,7 +792,7 @@ mod asynch { } } -#[cfg(soc_has_etm)] +#[cfg(etm)] pub mod etm { #![cfg_attr(docsrs, procmacros::doc_replace)] //! # Event Task Matrix Function diff --git a/esp-hal/src/timer/timg.rs b/esp-hal/src/timer/timg.rs index 127c4c0fc..ca337595c 100644 --- a/esp-hal/src/timer/timg.rs +++ b/esp-hal/src/timer/timg.rs @@ -924,7 +924,7 @@ mod asynch { } /// Event Task Matrix -#[cfg(soc_has_etm)] +#[cfg(etm)] pub mod etm { use super::*; use crate::etm::{EtmEvent, EtmTask};