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https://github.com/esp-rs/esp-hal.git
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cc9ccb3f83
@ -10,6 +10,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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### Added
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### Fixed
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- Fixing `esp-wifi` + `TRNG` issue on `ESP32-S2` (#1272)
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### Changed
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@ -76,7 +76,7 @@ pub struct Rng {
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impl Rng {
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/// Create a new random number generator instance
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pub fn new(_rng: impl Peripheral<P = RNG>) -> Self {
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#[cfg(not(any(esp32p4, esp32s2)))]
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#[cfg(not(esp32p4))]
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crate::soc::trng::ensure_randomness();
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Self {
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@ -138,5 +138,5 @@ impl rand_core::RngCore for Rng {
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}
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}
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#[cfg(not(any(esp32p4, esp32s2)))]
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#[cfg(not(esp32p4))]
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impl rand_core::CryptoRng for Rng {}
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@ -18,7 +18,7 @@ pub mod peripherals;
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#[cfg(psram)]
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pub mod psram;
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pub mod radio_clocks;
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// pub mod trng;
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pub mod trng;
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pub mod ulp_core;
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pub(crate) mod constants {
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@ -211,10 +211,6 @@ fn reg_get_bit(reg: u32, b: u32) -> u32 {
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unsafe { (reg as *mut u32).read_volatile() & b }
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}
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fn reg_get_field(reg: u32, s: u32, v: u32) -> u32 {
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unsafe { ((reg as *mut u32).read_volatile() >> s) & v }
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}
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fn reg_clr_bit(reg: u32, bit: u32) {
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unsafe {
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(reg as *mut u32).write_volatile((reg as *mut u32).read_volatile() & !bit);
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@ -282,10 +278,8 @@ pub(crate) fn regi2c_write_mask(block: u8, _host_id: u8, reg_add: u8, msb: u8, l
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| (reg_add as u32 & I2C_RTC_ADDR_V as u32) << I2C_RTC_ADDR_S as u32;
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reg_write(I2C_RTC_CONFIG2, temp);
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while reg_get_bit(I2C_RTC_CONFIG2, I2C_RTC_BUSY) != 0 {}
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temp = reg_get_field(I2C_RTC_CONFIG2, I2C_RTC_DATA_S, I2C_RTC_DATA_V);
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// Write the i2c bus register
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temp &= (!(0xFFFFFFFF << lsb)) | (0xFFFFFFFF << (msb + 1));
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temp |= (data as u32 & (!(0xFFFFFFFF << (msb as u32 - lsb as u32 + 1)))) << (lsb as u32);
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temp = (data as u32 & (!(0xFFFFFFFF << (msb as u32 - lsb as u32 + 1)))) << (lsb as u32);
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temp = ((block as u32 & I2C_RTC_SLAVE_ID_V as u32) << I2C_RTC_SLAVE_ID_S as u32)
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| ((reg_add as u32 & I2C_RTC_ADDR_V as u32) << I2C_RTC_ADDR_S as u32)
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| ((0x1 & I2C_RTC_WR_CNTL_V as u32) << I2C_RTC_WR_CNTL_S as u32)
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